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rtl8723ds: Initial commit of files
This repository contains the Realtek driver V5.1.1.5_20523.20161209_BTCOEX20161208-1212. At inclusion, the only changes from the Realtek version were to fix any compile warnings or errors. With these changes, the driver builds on kernels through 4.11. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger
@@ -0,0 +1,161 @@
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/******************************************************************************
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*
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* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
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||||
*
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||||
* You should have received a copy of the GNU General Public License along with
|
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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/*++
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Copyright (c) Realtek Semiconductor Corp. All rights reserved.
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Module Name:
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HalPwrSeqCmd.c
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Abstract:
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Implement HW Power sequence configuration CMD handling routine for Realtek devices.
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Major Change History:
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When Who What
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---------- --------------- -------------------------------
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2011-10-26 Lucas Modify to be compatible with SD4-CE driver.
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2011-07-07 Roger Create.
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--*/
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#include <HalPwrSeqCmd.h>
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/*
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* Description:
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* This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC.
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*
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* Assumption:
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* We should follow specific format which was released from HW SD.
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*
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* 2011.07.07, added by Roger.
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* */
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u8 HalPwrSeqCmdParsing(
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PADAPTER padapter,
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u8 CutVersion,
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u8 FabVersion,
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u8 InterfaceType,
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WLAN_PWR_CFG PwrSeqCmd[])
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{
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WLAN_PWR_CFG PwrCfgCmd = {0};
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u8 bPollingBit = _FALSE;
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u32 AryIdx = 0;
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u8 value = 0;
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u32 offset = 0;
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u32 pollingCount = 0; /* polling autoload done. */
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u32 maxPollingCnt = 5000;
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do {
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PwrCfgCmd = PwrSeqCmd[AryIdx];
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/* 2 Only Handle the command whose FAB, CUT, and Interface are matched */
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if ((GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) &&
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(GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) &&
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(GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType)) {
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switch (GET_PWR_CFG_CMD(PwrCfgCmd)) {
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case PWR_CMD_READ:
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break;
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case PWR_CMD_WRITE:
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offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
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#ifdef CONFIG_SDIO_HCI
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/* */
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/* <Roger_Notes> We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface */
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/* 2011.07.07. */
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/* */
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if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) {
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/* Read Back SDIO Local value */
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value = SdioLocalCmd52Read1Byte(padapter, offset);
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value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
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value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
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/* Write Back SDIO Local value */
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SdioLocalCmd52Write1Byte(padapter, offset, value);
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} else
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#endif
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{
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#ifdef CONFIG_GSPI_HCI
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if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
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offset = SPI_LOCAL_OFFSET | offset;
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#endif
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/* Read the value from system register */
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value = rtw_read8(padapter, offset);
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value = value & (~(GET_PWR_CFG_MASK(PwrCfgCmd)));
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value = value | (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
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/* Write the value back to sytem register */
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rtw_write8(padapter, offset, value);
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}
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break;
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case PWR_CMD_POLLING:
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bPollingBit = _FALSE;
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offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
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#ifdef CONFIG_GSPI_HCI
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if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
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offset = SPI_LOCAL_OFFSET | offset;
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#endif
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do {
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#ifdef CONFIG_SDIO_HCI
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if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
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value = SdioLocalCmd52Read1Byte(padapter, offset);
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else
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#endif
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value = rtw_read8(padapter, offset);
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value = value & GET_PWR_CFG_MASK(PwrCfgCmd);
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if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)))
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bPollingBit = _TRUE;
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else
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rtw_udelay_os(10);
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if (pollingCount++ > maxPollingCnt) {
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RTW_ERR("HalPwrSeqCmdParsing: Fail to polling Offset[%#x]=%02x\n", offset, value);
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return _FALSE;
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}
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} while (!bPollingBit);
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break;
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case PWR_CMD_DELAY:
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if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US)
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rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd));
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else
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rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd) * 1000);
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break;
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case PWR_CMD_END:
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/* When this command is parsed, end the process */
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return _TRUE;
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break;
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default:
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break;
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}
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}
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AryIdx++;/* Add Array Index */
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} while (1);
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return _TRUE;
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}
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,149 @@
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//===========================================
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// The following is for 8188C 2Ant BT Co-exist definition
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//===========================================
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#define BTC_RSSI_COEX_THRESH_TOL_8188C_2ANT 6
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typedef enum _BT_INFO_SRC_8188C_2ANT{
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BT_INFO_SRC_8188C_2ANT_WIFI_FW = 0x0,
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BT_INFO_SRC_8188C_2ANT_BT_RSP = 0x1,
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BT_INFO_SRC_8188C_2ANT_BT_ACTIVE_SEND = 0x2,
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BT_INFO_SRC_8188C_2ANT_MAX
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}BT_INFO_SRC_8188C_2ANT,*PBT_INFO_SRC_8188C_2ANT;
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typedef enum _BT_8188C_2ANT_BT_STATUS{
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BT_8188C_2ANT_BT_STATUS_IDLE = 0x0,
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BT_8188C_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
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BT_8188C_2ANT_BT_STATUS_NON_IDLE = 0x2,
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BT_8188C_2ANT_BT_STATUS_MAX
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}BT_8188C_2ANT_BT_STATUS,*PBT_8188C_2ANT_BT_STATUS;
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typedef enum _BT_8188C_2ANT_COEX_ALGO{
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BT_8188C_2ANT_COEX_ALGO_UNDEFINED = 0x0,
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BT_8188C_2ANT_COEX_ALGO_SCO = 0x1,
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BT_8188C_2ANT_COEX_ALGO_HID = 0x2,
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BT_8188C_2ANT_COEX_ALGO_A2DP = 0x3,
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BT_8188C_2ANT_COEX_ALGO_PAN = 0x4,
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BT_8188C_2ANT_COEX_ALGO_HID_A2DP = 0x5,
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BT_8188C_2ANT_COEX_ALGO_HID_PAN = 0x6,
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BT_8188C_2ANT_COEX_ALGO_PAN_A2DP = 0x7,
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BT_8188C_2ANT_COEX_ALGO_MAX
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}BT_8188C_2ANT_COEX_ALGO,*PBT_8188C_2ANT_COEX_ALGO;
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typedef struct _COEX_DM_8188C_2ANT{
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// fw mechanism
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BOOLEAN bPreBalanceOn;
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BOOLEAN bCurBalanceOn;
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// diminishWifi
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BOOLEAN bPreDacOn;
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BOOLEAN bCurDacOn;
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BOOLEAN bPreInterruptOn;
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BOOLEAN bCurInterruptOn;
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u1Byte preFwDacSwingLvl;
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u1Byte curFwDacSwingLvl;
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BOOLEAN bPreNavOn;
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BOOLEAN bCurNavOn;
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// sw mechanism
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BOOLEAN bPreRfRxLpfShrink;
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BOOLEAN bCurRfRxLpfShrink;
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u4Byte btRf0x1eBackup;
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BOOLEAN bPreLowPenaltyRa;
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BOOLEAN bCurLowPenaltyRa;
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BOOLEAN bPreDacSwingOn;
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u4Byte preDacSwingLvl;
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BOOLEAN bCurDacSwingOn;
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u4Byte curDacSwingLvl;
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BOOLEAN bPreAdcBackOff;
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BOOLEAN bCurAdcBackOff;
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BOOLEAN bPreAgcTableEn;
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BOOLEAN bCurAgcTableEn;
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//u4Byte preVal0x6c0;
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//u4Byte curVal0x6c0;
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u4Byte preVal0x6c4;
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u4Byte curVal0x6c4;
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u4Byte preVal0x6c8;
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u4Byte curVal0x6c8;
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u4Byte preVal0x6cc;
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u4Byte curVal0x6cc;
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//BOOLEAN bLimitedDig;
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// algorithm related
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u1Byte preAlgorithm;
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u1Byte curAlgorithm;
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//u1Byte btStatus;
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//u1Byte wifiChnlInfo[3];
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} COEX_DM_8188C_2ANT, *PCOEX_DM_8188C_2ANT;
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typedef struct _COEX_STA_8188C_2ANT{
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u1Byte preWifiRssiState[4];
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BOOLEAN bBtBusy;
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BOOLEAN bBtUplink;
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BOOLEAN bBtDownLink;
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BOOLEAN bA2dpBusy;
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}COEX_STA_8188C_2ANT, *PCOEX_STA_8188C_2ANT;
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//===========================================
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// The following is interface which will notify coex module.
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//===========================================
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VOID
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EXhalbtc8188c2ant_PowerOnSetting(
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IN PBTC_COEXIST pBtCoexist
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);
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VOID
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EXhalbtc8188c2ant_InitHwConfig(
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IN PBTC_COEXIST pBtCoexist,
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IN BOOLEAN bWifiOnly
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);
|
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VOID
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EXhalbtc8188c2ant_InitCoexDm(
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IN PBTC_COEXIST pBtCoexist
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);
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VOID
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EXhalbtc8188c2ant_IpsNotify(
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IN PBTC_COEXIST pBtCoexist,
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IN u1Byte type
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);
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VOID
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EXhalbtc8188c2ant_LpsNotify(
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IN PBTC_COEXIST pBtCoexist,
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IN u1Byte type
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);
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VOID
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EXhalbtc8188c2ant_ScanNotify(
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IN PBTC_COEXIST pBtCoexist,
|
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IN u1Byte type
|
||||
);
|
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VOID
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EXhalbtc8188c2ant_ConnectNotify(
|
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IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8188c2ant_MediaStatusNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8188c2ant_SpecialPacketNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8188c2ant_HaltNotify(
|
||||
IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8188c2ant_Periodical(
|
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IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8188c2ant_BtInfoNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN pu1Byte tmpBuf,
|
||||
IN u1Byte length
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8188c2ant_DisplayCoexInfo(
|
||||
IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,170 @@
|
||||
//===========================================
|
||||
// The following is for 8192D 2Ant BT Co-exist definition
|
||||
//===========================================
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT 6
|
||||
|
||||
typedef enum _BT_INFO_SRC_8192D_2ANT{
|
||||
BT_INFO_SRC_8192D_2ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8192D_2ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8192D_2ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8192D_2ANT_MAX
|
||||
}BT_INFO_SRC_8192D_2ANT,*PBT_INFO_SRC_8192D_2ANT;
|
||||
|
||||
typedef enum _BT_8192D_2ANT_BT_STATUS{
|
||||
BT_8192D_2ANT_BT_STATUS_IDLE = 0x0,
|
||||
BT_8192D_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8192D_2ANT_BT_STATUS_NON_IDLE = 0x2,
|
||||
BT_8192D_2ANT_BT_STATUS_MAX
|
||||
}BT_8192D_2ANT_BT_STATUS,*PBT_8192D_2ANT_BT_STATUS;
|
||||
|
||||
typedef enum _BT_8192D_2ANT_COEX_ALGO{
|
||||
BT_8192D_2ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8192D_2ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8192D_2ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8192D_2ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8192D_2ANT_COEX_ALGO_PAN = 0x4,
|
||||
BT_8192D_2ANT_COEX_ALGO_HID_A2DP = 0x5,
|
||||
BT_8192D_2ANT_COEX_ALGO_HID_PAN = 0x6,
|
||||
BT_8192D_2ANT_COEX_ALGO_PAN_A2DP = 0x7,
|
||||
BT_8192D_2ANT_COEX_ALGO_MAX
|
||||
}BT_8192D_2ANT_COEX_ALGO,*PBT_8192D_2ANT_COEX_ALGO;
|
||||
|
||||
typedef struct _COEX_DM_8192D_2ANT{
|
||||
// fw mechanism
|
||||
BOOLEAN bPreBalanceOn;
|
||||
BOOLEAN bCurBalanceOn;
|
||||
|
||||
// diminishWifi
|
||||
BOOLEAN bPreDacOn;
|
||||
BOOLEAN bCurDacOn;
|
||||
BOOLEAN bPreInterruptOn;
|
||||
BOOLEAN bCurInterruptOn;
|
||||
u1Byte preFwDacSwingLvl;
|
||||
u1Byte curFwDacSwingLvl;
|
||||
BOOLEAN bPreNavOn;
|
||||
BOOLEAN bCurNavOn;
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
//BOOLEAN bPreDecBtPwr;
|
||||
//BOOLEAN bCurDecBtPwr;
|
||||
|
||||
//u1Byte preFwDacSwingLvl;
|
||||
//u1Byte curFwDacSwingLvl;
|
||||
//BOOLEAN bCurIgnoreWlanAct;
|
||||
//BOOLEAN bPreIgnoreWlanAct;
|
||||
//u1Byte prePsTdma;
|
||||
//u1Byte curPsTdma;
|
||||
//u1Byte psTdmaPara[5];
|
||||
//u1Byte psTdmaDuAdjType;
|
||||
//BOOLEAN bResetTdmaAdjust;
|
||||
//BOOLEAN bPrePsTdmaOn;
|
||||
//BOOLEAN bCurPsTdmaOn;
|
||||
//BOOLEAN bPreBtAutoReport;
|
||||
//BOOLEAN bCurBtAutoReport;
|
||||
|
||||
// sw mechanism
|
||||
BOOLEAN bPreRfRxLpfShrink;
|
||||
BOOLEAN bCurRfRxLpfShrink;
|
||||
u4Byte btRf0x1eBackup;
|
||||
BOOLEAN bPreLowPenaltyRa;
|
||||
BOOLEAN bCurLowPenaltyRa;
|
||||
BOOLEAN bPreDacSwingOn;
|
||||
u4Byte preDacSwingLvl;
|
||||
BOOLEAN bCurDacSwingOn;
|
||||
u4Byte curDacSwingLvl;
|
||||
BOOLEAN bPreAdcBackOff;
|
||||
BOOLEAN bCurAdcBackOff;
|
||||
BOOLEAN bPreAgcTableEn;
|
||||
BOOLEAN bCurAgcTableEn;
|
||||
//u4Byte preVal0x6c0;
|
||||
//u4Byte curVal0x6c0;
|
||||
u4Byte preVal0x6c4;
|
||||
u4Byte curVal0x6c4;
|
||||
u4Byte preVal0x6c8;
|
||||
u4Byte curVal0x6c8;
|
||||
u4Byte preVal0x6cc;
|
||||
u4Byte curVal0x6cc;
|
||||
//BOOLEAN bLimitedDig;
|
||||
|
||||
// algorithm related
|
||||
u1Byte preAlgorithm;
|
||||
u1Byte curAlgorithm;
|
||||
//u1Byte btStatus;
|
||||
//u1Byte wifiChnlInfo[3];
|
||||
} COEX_DM_8192D_2ANT, *PCOEX_DM_8192D_2ANT;
|
||||
|
||||
typedef struct _COEX_STA_8192D_2ANT{
|
||||
u1Byte preWifiRssiState[4];
|
||||
BOOLEAN bBtBusy;
|
||||
BOOLEAN bBtUplink;
|
||||
BOOLEAN bBtDownLink;
|
||||
BOOLEAN bA2dpBusy;
|
||||
}COEX_STA_8192D_2ANT, *PCOEX_STA_8192D_2ANT;
|
||||
|
||||
//===========================================
|
||||
// The following is interface which will notify coex module.
|
||||
//===========================================
|
||||
VOID
|
||||
EXhalbtc8192d2ant_PowerOnSetting(
|
||||
IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8192d2ant_InitHwConfig(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN BOOLEAN bWifiOnly
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8192d2ant_InitCoexDm(
|
||||
IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8192d2ant_IpsNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8192d2ant_LpsNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8192d2ant_ScanNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8192d2ant_ConnectNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8192d2ant_MediaStatusNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8192d2ant_SpecialPacketNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8192d2ant_HaltNotify(
|
||||
IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8192d2ant_Periodical(
|
||||
IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8192d2ant_BtInfoNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN pu1Byte tmpBuf,
|
||||
IN u1Byte length
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8192d2ant_DisplayCoexInfo(
|
||||
IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,226 @@
|
||||
|
||||
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
|
||||
|
||||
#if (RTL8192E_SUPPORT == 1)
|
||||
|
||||
/* *******************************************
|
||||
* The following is for 8192E 1ANT BT Co-exist definition
|
||||
* ******************************************* */
|
||||
#define BT_AUTO_REPORT_ONLY_8192E_1ANT 1
|
||||
|
||||
#define BT_INFO_8192E_1ANT_B_FTP BIT(7)
|
||||
#define BT_INFO_8192E_1ANT_B_A2DP BIT(6)
|
||||
#define BT_INFO_8192E_1ANT_B_HID BIT(5)
|
||||
#define BT_INFO_8192E_1ANT_B_SCO_BUSY BIT(4)
|
||||
#define BT_INFO_8192E_1ANT_B_ACL_BUSY BIT(3)
|
||||
#define BT_INFO_8192E_1ANT_B_INQ_PAGE BIT(2)
|
||||
#define BT_INFO_8192E_1ANT_B_SCO_ESCO BIT(1)
|
||||
#define BT_INFO_8192E_1ANT_B_CONNECTION BIT(0)
|
||||
|
||||
#define BT_INFO_8192E_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
|
||||
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT 2
|
||||
|
||||
#define BT_8192E_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
|
||||
|
||||
enum bt_info_src_8192e_1ant {
|
||||
BT_INFO_SRC_8192E_1ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8192E_1ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8192E_1ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8192E_1ANT_MAX
|
||||
};
|
||||
|
||||
enum bt_8192e_1ant_bt_status {
|
||||
BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8192E_1ANT_BT_STATUS_INQ_PAGE = 0x2,
|
||||
BT_8192E_1ANT_BT_STATUS_ACL_BUSY = 0x3,
|
||||
BT_8192E_1ANT_BT_STATUS_SCO_BUSY = 0x4,
|
||||
BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8192E_1ANT_BT_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8192e_1ant_wifi_status {
|
||||
BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
|
||||
BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
|
||||
BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
|
||||
BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
|
||||
BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
|
||||
BT_8192E_1ANT_WIFI_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8192e_1ant_coex_algo {
|
||||
BT_8192E_1ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8192E_1ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8192E_1ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8192E_1ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8192E_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
|
||||
BT_8192E_1ANT_COEX_ALGO_PANEDR = 0x5,
|
||||
BT_8192E_1ANT_COEX_ALGO_PANHS = 0x6,
|
||||
BT_8192E_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
|
||||
BT_8192E_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
|
||||
BT_8192E_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
|
||||
BT_8192E_1ANT_COEX_ALGO_HID_A2DP = 0xa,
|
||||
BT_8192E_1ANT_COEX_ALGO_MAX = 0xb,
|
||||
};
|
||||
|
||||
struct coex_dm_8192e_1ant {
|
||||
/* fw mechanism */
|
||||
boolean cur_ignore_wlan_act;
|
||||
boolean pre_ignore_wlan_act;
|
||||
u8 pre_ps_tdma;
|
||||
u8 cur_ps_tdma;
|
||||
u8 ps_tdma_para[5];
|
||||
u8 ps_tdma_du_adj_type;
|
||||
boolean auto_tdma_adjust;
|
||||
boolean pre_ps_tdma_on;
|
||||
boolean cur_ps_tdma_on;
|
||||
boolean pre_bt_auto_report;
|
||||
boolean cur_bt_auto_report;
|
||||
u8 pre_lps;
|
||||
u8 cur_lps;
|
||||
u8 pre_rpwm;
|
||||
u8 cur_rpwm;
|
||||
|
||||
/* sw mechanism */
|
||||
boolean pre_low_penalty_ra;
|
||||
boolean cur_low_penalty_ra;
|
||||
u32 pre_val0x6c0;
|
||||
u32 cur_val0x6c0;
|
||||
u32 pre_val0x6c4;
|
||||
u32 cur_val0x6c4;
|
||||
u32 pre_val0x6c8;
|
||||
u32 cur_val0x6c8;
|
||||
u8 pre_val0x6cc;
|
||||
u8 cur_val0x6cc;
|
||||
boolean limited_dig;
|
||||
|
||||
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
|
||||
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
|
||||
u16 backup_retry_limit;
|
||||
u8 backup_ampdu_max_time;
|
||||
|
||||
/* algorithm related */
|
||||
u8 pre_algorithm;
|
||||
u8 cur_algorithm;
|
||||
u8 bt_status;
|
||||
u8 wifi_chnl_info[3];
|
||||
|
||||
u32 pre_ra_mask;
|
||||
u32 cur_ra_mask;
|
||||
u8 pre_arfr_type;
|
||||
u8 cur_arfr_type;
|
||||
u8 pre_retry_limit_type;
|
||||
u8 cur_retry_limit_type;
|
||||
u8 pre_ampdu_time_type;
|
||||
u8 cur_ampdu_time_type;
|
||||
u32 arp_cnt;
|
||||
|
||||
u8 error_condition;
|
||||
};
|
||||
|
||||
struct coex_sta_8192e_1ant {
|
||||
boolean bt_disabled;
|
||||
boolean bt_link_exist;
|
||||
boolean sco_exist;
|
||||
boolean a2dp_exist;
|
||||
boolean hid_exist;
|
||||
boolean pan_exist;
|
||||
|
||||
boolean under_lps;
|
||||
boolean under_ips;
|
||||
u32 specific_pkt_period_cnt;
|
||||
u32 high_priority_tx;
|
||||
u32 high_priority_rx;
|
||||
u32 low_priority_tx;
|
||||
u32 low_priority_rx;
|
||||
s8 bt_rssi;
|
||||
boolean bt_tx_rx_mask;
|
||||
u8 pre_bt_rssi_state;
|
||||
u8 pre_wifi_rssi_state[4];
|
||||
boolean c2h_bt_info_req_sent;
|
||||
u8 bt_info_c2h[BT_INFO_SRC_8192E_1ANT_MAX][10];
|
||||
u32 bt_info_c2h_cnt[BT_INFO_SRC_8192E_1ANT_MAX];
|
||||
boolean c2h_bt_inquiry_page;
|
||||
boolean c2h_bt_page; /* Add for win8.1 page out issue */
|
||||
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
|
||||
u8 bt_retry_cnt;
|
||||
u8 bt_info_ext;
|
||||
u32 pop_event_cnt;
|
||||
u8 scan_ap_num;
|
||||
|
||||
u32 crc_ok_cck;
|
||||
u32 crc_ok_11g;
|
||||
u32 crc_ok_11n;
|
||||
u32 crc_ok_11n_agg;
|
||||
|
||||
u32 crc_err_cck;
|
||||
u32 crc_err_11g;
|
||||
u32 crc_err_11n;
|
||||
u32 crc_err_11n_agg;
|
||||
|
||||
boolean cck_lock;
|
||||
boolean pre_ccklock;
|
||||
u8 coex_table_type;
|
||||
|
||||
boolean force_lps_on;
|
||||
};
|
||||
|
||||
/* *******************************************
|
||||
* The following is interface which will notify coex module.
|
||||
* ******************************************* */
|
||||
void ex_halbtc8192e1ant_power_on_setting(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8192e1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8192e1ant_init_hw_config(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only);
|
||||
void ex_halbtc8192e1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8192e1ant_ips_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8192e1ant_lps_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8192e1ant_scan_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8192e1ant_connect_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8192e1ant_media_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8192e1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8192e1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8192e1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8192e1ant_halt_notify(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8192e1ant_pnp_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 pnp_state);
|
||||
void ex_halbtc8192e1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8192e1ant_periodical(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8192e1ant_display_coex_info(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8192e1ant_dbg_control(IN struct btc_coexist *btcoexist,
|
||||
IN u8 op_code, IN u8 op_len, IN u8 *pdata);
|
||||
|
||||
#else /* #if (RTL8192E_SUPPORT == 1) */
|
||||
#define ex_halbtc8192e1ant_power_on_setting(btcoexist)
|
||||
#define ex_halbtc8192e1ant_pre_load_firmware(btcoexist)
|
||||
#define ex_halbtc8192e1ant_init_hw_config(btcoexist, wifi_only)
|
||||
#define ex_halbtc8192e1ant_init_coex_dm(btcoexist)
|
||||
#define ex_halbtc8192e1ant_ips_notify(btcoexist, type)
|
||||
#define ex_halbtc8192e1ant_lps_notify(btcoexist, type)
|
||||
#define ex_halbtc8192e1ant_scan_notify(btcoexist, type)
|
||||
#define ex_halbtc8192e1ant_connect_notify(btcoexist, type)
|
||||
#define ex_halbtc8192e1ant_media_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8192e1ant_specific_packet_notify(btcoexist, type)
|
||||
#define ex_halbtc8192e1ant_bt_info_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8192e1ant_rf_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8192e1ant_halt_notify(btcoexist)
|
||||
#define ex_halbtc8192e1ant_pnp_notify(btcoexist, pnp_state)
|
||||
#define ex_halbtc8192e1ant_coex_dm_reset(btcoexist)
|
||||
#define ex_halbtc8192e1ant_periodical(btcoexist)
|
||||
#define ex_halbtc8192e1ant_display_coex_info(btcoexist)
|
||||
#define ex_halbtc8192e1ant_dbg_control(btcoexist, op_code, op_len, pdata)
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,199 @@
|
||||
|
||||
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
|
||||
|
||||
#if (RTL8192E_SUPPORT == 1)
|
||||
/* *******************************************
|
||||
* The following is for 8192E 2Ant BT Co-exist definition
|
||||
* ******************************************* */
|
||||
#define BT_AUTO_REPORT_ONLY_8192E_2ANT 0
|
||||
|
||||
#define BT_INFO_8192E_2ANT_B_FTP BIT(7)
|
||||
#define BT_INFO_8192E_2ANT_B_A2DP BIT(6)
|
||||
#define BT_INFO_8192E_2ANT_B_HID BIT(5)
|
||||
#define BT_INFO_8192E_2ANT_B_SCO_BUSY BIT(4)
|
||||
#define BT_INFO_8192E_2ANT_B_ACL_BUSY BIT(3)
|
||||
#define BT_INFO_8192E_2ANT_B_INQ_PAGE BIT(2)
|
||||
#define BT_INFO_8192E_2ANT_B_SCO_ESCO BIT(1)
|
||||
#define BT_INFO_8192E_2ANT_B_CONNECTION BIT(0)
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT 2
|
||||
#define NOISY_AP_NUM_THRESH_8192E 10
|
||||
|
||||
enum bt_info_src_8192e_2ant {
|
||||
BT_INFO_SRC_8192E_2ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8192E_2ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8192E_2ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8192E_2ANT_MAX
|
||||
};
|
||||
|
||||
enum bt_8192e_2ant_bt_status {
|
||||
BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8192E_2ANT_BT_STATUS_INQ_PAGE = 0x2,
|
||||
BT_8192E_2ANT_BT_STATUS_ACL_BUSY = 0x3,
|
||||
BT_8192E_2ANT_BT_STATUS_SCO_BUSY = 0x4,
|
||||
BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8192E_2ANT_BT_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8192e_2ant_coex_algo {
|
||||
BT_8192E_2ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8192E_2ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8192E_2ANT_COEX_ALGO_SCO_PAN = 0x2,
|
||||
BT_8192E_2ANT_COEX_ALGO_HID = 0x3,
|
||||
BT_8192E_2ANT_COEX_ALGO_A2DP = 0x4,
|
||||
BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS = 0x5,
|
||||
BT_8192E_2ANT_COEX_ALGO_PANEDR = 0x6,
|
||||
BT_8192E_2ANT_COEX_ALGO_PANHS = 0x7,
|
||||
BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP = 0x8,
|
||||
BT_8192E_2ANT_COEX_ALGO_PANEDR_HID = 0x9,
|
||||
BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0xa,
|
||||
BT_8192E_2ANT_COEX_ALGO_HID_A2DP = 0xb,
|
||||
BT_8192E_2ANT_COEX_ALGO_MAX = 0xc
|
||||
};
|
||||
|
||||
struct coex_dm_8192e_2ant {
|
||||
/* fw mechanism */
|
||||
u8 pre_bt_dec_pwr_lvl;
|
||||
u8 cur_bt_dec_pwr_lvl;
|
||||
u8 pre_fw_dac_swing_lvl;
|
||||
u8 cur_fw_dac_swing_lvl;
|
||||
boolean cur_ignore_wlan_act;
|
||||
boolean pre_ignore_wlan_act;
|
||||
u8 pre_ps_tdma;
|
||||
u8 cur_ps_tdma;
|
||||
u8 ps_tdma_para[5];
|
||||
u8 ps_tdma_du_adj_type;
|
||||
boolean reset_tdma_adjust;
|
||||
boolean auto_tdma_adjust;
|
||||
boolean auto_tdma_adjust_low_rssi;
|
||||
boolean pre_ps_tdma_on;
|
||||
boolean cur_ps_tdma_on;
|
||||
boolean pre_bt_auto_report;
|
||||
boolean cur_bt_auto_report;
|
||||
|
||||
/* sw mechanism */
|
||||
boolean pre_rf_rx_lpf_shrink;
|
||||
boolean cur_rf_rx_lpf_shrink;
|
||||
u32 bt_rf_0x1e_backup;
|
||||
boolean pre_low_penalty_ra;
|
||||
boolean cur_low_penalty_ra;
|
||||
boolean pre_dac_swing_on;
|
||||
u32 pre_dac_swing_lvl;
|
||||
boolean cur_dac_swing_on;
|
||||
u32 cur_dac_swing_lvl;
|
||||
boolean pre_adc_back_off;
|
||||
boolean cur_adc_back_off;
|
||||
boolean pre_agc_table_en;
|
||||
boolean cur_agc_table_en;
|
||||
u32 pre_val0x6c0;
|
||||
u32 cur_val0x6c0;
|
||||
u32 pre_val0x6c4;
|
||||
u32 cur_val0x6c4;
|
||||
u32 pre_val0x6c8;
|
||||
u32 cur_val0x6c8;
|
||||
u8 pre_val0x6cc;
|
||||
u8 cur_val0x6cc;
|
||||
boolean limited_dig;
|
||||
|
||||
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
|
||||
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
|
||||
u16 backup_retry_limit;
|
||||
u8 backup_ampdu_max_time;
|
||||
|
||||
/* algorithm related */
|
||||
u8 pre_algorithm;
|
||||
u8 cur_algorithm;
|
||||
u8 bt_status;
|
||||
u8 wifi_chnl_info[3];
|
||||
|
||||
u8 pre_ss_type;
|
||||
u8 cur_ss_type;
|
||||
|
||||
u8 pre_lps;
|
||||
u8 cur_lps;
|
||||
u8 pre_rpwm;
|
||||
u8 cur_rpwm;
|
||||
|
||||
|
||||
u32 pre_ra_mask;
|
||||
u32 cur_ra_mask;
|
||||
u8 cur_ra_mask_type;
|
||||
u8 pre_arfr_type;
|
||||
u8 cur_arfr_type;
|
||||
u8 pre_retry_limit_type;
|
||||
u8 cur_retry_limit_type;
|
||||
u8 pre_ampdu_time_type;
|
||||
u8 cur_ampdu_time_type;
|
||||
};
|
||||
|
||||
struct coex_sta_8192e_2ant {
|
||||
boolean bt_disabled;
|
||||
boolean bt_link_exist;
|
||||
boolean sco_exist;
|
||||
boolean a2dp_exist;
|
||||
boolean hid_exist;
|
||||
boolean pan_exist;
|
||||
|
||||
boolean under_lps;
|
||||
boolean under_ips;
|
||||
u32 high_priority_tx;
|
||||
u32 high_priority_rx;
|
||||
u32 low_priority_tx;
|
||||
u32 low_priority_rx;
|
||||
u8 bt_rssi;
|
||||
u8 pre_bt_rssi_state;
|
||||
u8 pre_wifi_rssi_state[4];
|
||||
boolean c2h_bt_info_req_sent;
|
||||
u8 bt_info_c2h[BT_INFO_SRC_8192E_2ANT_MAX][10];
|
||||
u32 bt_info_c2h_cnt[BT_INFO_SRC_8192E_2ANT_MAX];
|
||||
boolean c2h_bt_inquiry_page;
|
||||
u8 bt_retry_cnt;
|
||||
u8 bt_info_ext;
|
||||
u8 scan_ap_num;
|
||||
};
|
||||
|
||||
/* *******************************************
|
||||
* The following is interface which will notify coex module.
|
||||
* ******************************************* */
|
||||
void ex_halbtc8192e2ant_power_on_setting(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only);
|
||||
void ex_halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8192e2ant_ips_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8192e2ant_lps_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8192e2ant_scan_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8192e2ant_connect_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8192e2ant_media_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8192e2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8192e2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8192e2ant_halt_notify(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8192e2ant_periodical(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8192e2ant_display_coex_info(IN struct btc_coexist *btcoexist);
|
||||
|
||||
#else /* #if (RTL8192E_SUPPORT == 1) */
|
||||
#define ex_halbtc8192e2ant_power_on_setting(btcoexist)
|
||||
#define ex_halbtc8192e2ant_init_hw_config(btcoexist, wifi_only)
|
||||
#define ex_halbtc8192e2ant_init_coex_dm(btcoexist)
|
||||
#define ex_halbtc8192e2ant_ips_notify(btcoexist, type)
|
||||
#define ex_halbtc8192e2ant_lps_notify(btcoexist, type)
|
||||
#define ex_halbtc8192e2ant_scan_notify(btcoexist, type)
|
||||
#define ex_halbtc8192e2ant_connect_notify(btcoexist, type)
|
||||
#define ex_halbtc8192e2ant_media_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8192e2ant_specific_packet_notify(btcoexist, type)
|
||||
#define ex_halbtc8192e2ant_bt_info_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8192e2ant_halt_notify(btcoexist)
|
||||
#define ex_halbtc8192e2ant_periodical(btcoexist)
|
||||
#define ex_halbtc8192e2ant_display_coex_info(btcoexist)
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,348 @@
|
||||
|
||||
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
|
||||
|
||||
#if (RTL8703B_SUPPORT == 1)
|
||||
/* *******************************************
|
||||
* The following is for 8703B 1ANT BT Co-exist definition
|
||||
* ******************************************* */
|
||||
#define BT_AUTO_REPORT_ONLY_8703B_1ANT 1
|
||||
#define BT_8703B_1ANT_ENABLE_GNTBT_TO_GPIO14 0
|
||||
|
||||
#define BT_INFO_8703B_1ANT_B_FTP BIT(7)
|
||||
#define BT_INFO_8703B_1ANT_B_A2DP BIT(6)
|
||||
#define BT_INFO_8703B_1ANT_B_HID BIT(5)
|
||||
#define BT_INFO_8703B_1ANT_B_SCO_BUSY BIT(4)
|
||||
#define BT_INFO_8703B_1ANT_B_ACL_BUSY BIT(3)
|
||||
#define BT_INFO_8703B_1ANT_B_INQ_PAGE BIT(2)
|
||||
#define BT_INFO_8703B_1ANT_B_SCO_ESCO BIT(1)
|
||||
#define BT_INFO_8703B_1ANT_B_CONNECTION BIT(0)
|
||||
|
||||
#define BT_INFO_8703B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
|
||||
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT 2
|
||||
|
||||
#define BT_8703B_1ANT_WIFI_NOISY_THRESH 50 /* max: 255 */
|
||||
|
||||
/* for Antenna detection */
|
||||
#define BT_8703B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
|
||||
#define BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
|
||||
#define BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
|
||||
#define BT_8703B_1ANT_ANTDET_PSDTHRES_1ANT 35
|
||||
#define BT_8703B_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
|
||||
#define BT_8703B_1ANT_ANTDET_SWEEPPOINT_DELAY 40000
|
||||
#define BT_8703B_1ANT_ANTDET_ENABLE 0
|
||||
#define BT_8703B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 0
|
||||
|
||||
#define BT_8703B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
|
||||
|
||||
enum bt_8703b_1ant_signal_state {
|
||||
BT_8703B_1ANT_SIG_STA_SET_TO_LOW = 0x0,
|
||||
BT_8703B_1ANT_SIG_STA_SET_BY_HW = 0x0,
|
||||
BT_8703B_1ANT_SIG_STA_SET_TO_HIGH = 0x1,
|
||||
BT_8703B_1ANT_SIG_STA_MAX
|
||||
};
|
||||
|
||||
enum bt_8703b_1ant_path_ctrl_owner {
|
||||
BT_8703B_1ANT_PCO_BTSIDE = 0x0,
|
||||
BT_8703B_1ANT_PCO_WLSIDE = 0x1,
|
||||
BT_8703B_1ANT_PCO_MAX
|
||||
};
|
||||
|
||||
enum bt_8703b_1ant_gnt_ctrl_type {
|
||||
BT_8703B_1ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
|
||||
BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
|
||||
BT_8703B_1ANT_GNT_TYPE_MAX
|
||||
};
|
||||
|
||||
enum bt_8703b_1ant_gnt_ctrl_block {
|
||||
BT_8703B_1ANT_GNT_BLOCK_RFC_BB = 0x0,
|
||||
BT_8703B_1ANT_GNT_BLOCK_RFC = 0x1,
|
||||
BT_8703B_1ANT_GNT_BLOCK_BB = 0x2,
|
||||
BT_8703B_1ANT_GNT_BLOCK_MAX
|
||||
};
|
||||
|
||||
enum bt_8703b_1ant_lte_coex_table_type {
|
||||
BT_8703B_1ANT_CTT_WL_VS_LTE = 0x0,
|
||||
BT_8703B_1ANT_CTT_BT_VS_LTE = 0x1,
|
||||
BT_8703B_1ANT_CTT_MAX
|
||||
};
|
||||
|
||||
enum bt_8703b_1ant_lte_break_table_type {
|
||||
BT_8703B_1ANT_LBTT_WL_BREAK_LTE = 0x0,
|
||||
BT_8703B_1ANT_LBTT_BT_BREAK_LTE = 0x1,
|
||||
BT_8703B_1ANT_LBTT_LTE_BREAK_WL = 0x2,
|
||||
BT_8703B_1ANT_LBTT_LTE_BREAK_BT = 0x3,
|
||||
BT_8703B_1ANT_LBTT_MAX
|
||||
};
|
||||
|
||||
enum bt_info_src_8703b_1ant {
|
||||
BT_INFO_SRC_8703B_1ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8703B_1ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8703B_1ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8703B_1ANT_MAX
|
||||
};
|
||||
|
||||
enum bt_8703b_1ant_bt_status {
|
||||
BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8703B_1ANT_BT_STATUS_INQ_PAGE = 0x2,
|
||||
BT_8703B_1ANT_BT_STATUS_ACL_BUSY = 0x3,
|
||||
BT_8703B_1ANT_BT_STATUS_SCO_BUSY = 0x4,
|
||||
BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8703B_1ANT_BT_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8703b_1ant_wifi_status {
|
||||
BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
|
||||
BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
|
||||
BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
|
||||
BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
|
||||
BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
|
||||
BT_8703B_1ANT_WIFI_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8703b_1ant_coex_algo {
|
||||
BT_8703B_1ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8703B_1ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8703B_1ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8703B_1ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
|
||||
BT_8703B_1ANT_COEX_ALGO_PANEDR = 0x5,
|
||||
BT_8703B_1ANT_COEX_ALGO_PANHS = 0x6,
|
||||
BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
|
||||
BT_8703B_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
|
||||
BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
|
||||
BT_8703B_1ANT_COEX_ALGO_HID_A2DP = 0xa,
|
||||
BT_8703B_1ANT_COEX_ALGO_MAX = 0xb,
|
||||
};
|
||||
|
||||
struct coex_dm_8703b_1ant {
|
||||
/* hw setting */
|
||||
u8 pre_ant_pos_type;
|
||||
u8 cur_ant_pos_type;
|
||||
/* fw mechanism */
|
||||
boolean cur_ignore_wlan_act;
|
||||
boolean pre_ignore_wlan_act;
|
||||
u8 pre_ps_tdma;
|
||||
u8 cur_ps_tdma;
|
||||
u8 ps_tdma_para[5];
|
||||
u8 ps_tdma_du_adj_type;
|
||||
boolean auto_tdma_adjust;
|
||||
boolean pre_ps_tdma_on;
|
||||
boolean cur_ps_tdma_on;
|
||||
boolean pre_bt_auto_report;
|
||||
boolean cur_bt_auto_report;
|
||||
u8 pre_lps;
|
||||
u8 cur_lps;
|
||||
u8 pre_rpwm;
|
||||
u8 cur_rpwm;
|
||||
|
||||
/* sw mechanism */
|
||||
boolean pre_low_penalty_ra;
|
||||
boolean cur_low_penalty_ra;
|
||||
u32 pre_val0x6c0;
|
||||
u32 cur_val0x6c0;
|
||||
u32 pre_val0x6c4;
|
||||
u32 cur_val0x6c4;
|
||||
u32 pre_val0x6c8;
|
||||
u32 cur_val0x6c8;
|
||||
u8 pre_val0x6cc;
|
||||
u8 cur_val0x6cc;
|
||||
boolean limited_dig;
|
||||
|
||||
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
|
||||
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
|
||||
u16 backup_retry_limit;
|
||||
u8 backup_ampdu_max_time;
|
||||
|
||||
/* algorithm related */
|
||||
u8 pre_algorithm;
|
||||
u8 cur_algorithm;
|
||||
u8 bt_status;
|
||||
u8 wifi_chnl_info[3];
|
||||
|
||||
u32 pre_ra_mask;
|
||||
u32 cur_ra_mask;
|
||||
u8 pre_arfr_type;
|
||||
u8 cur_arfr_type;
|
||||
u8 pre_retry_limit_type;
|
||||
u8 cur_retry_limit_type;
|
||||
u8 pre_ampdu_time_type;
|
||||
u8 cur_ampdu_time_type;
|
||||
u32 arp_cnt;
|
||||
|
||||
u8 error_condition;
|
||||
};
|
||||
|
||||
struct coex_sta_8703b_1ant {
|
||||
boolean bt_disabled;
|
||||
boolean bt_link_exist;
|
||||
boolean sco_exist;
|
||||
boolean a2dp_exist;
|
||||
boolean hid_exist;
|
||||
boolean pan_exist;
|
||||
boolean bt_hi_pri_link_exist;
|
||||
u8 num_of_profile;
|
||||
|
||||
boolean under_lps;
|
||||
boolean under_ips;
|
||||
u32 specific_pkt_period_cnt;
|
||||
u32 high_priority_tx;
|
||||
u32 high_priority_rx;
|
||||
u32 low_priority_tx;
|
||||
u32 low_priority_rx;
|
||||
s8 bt_rssi;
|
||||
boolean bt_tx_rx_mask;
|
||||
u8 pre_bt_rssi_state;
|
||||
u8 pre_wifi_rssi_state[4];
|
||||
boolean c2h_bt_info_req_sent;
|
||||
u8 bt_info_c2h[BT_INFO_SRC_8703B_1ANT_MAX][10];
|
||||
u32 bt_info_c2h_cnt[BT_INFO_SRC_8703B_1ANT_MAX];
|
||||
boolean bt_whck_test;
|
||||
boolean c2h_bt_inquiry_page;
|
||||
boolean c2h_bt_page; /* Add for win8.1 page out issue */
|
||||
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
|
||||
u8 bt_retry_cnt;
|
||||
u8 bt_info_ext;
|
||||
u32 pop_event_cnt;
|
||||
u8 scan_ap_num;
|
||||
|
||||
u32 crc_ok_cck;
|
||||
u32 crc_ok_11g;
|
||||
u32 crc_ok_11n;
|
||||
u32 crc_ok_11n_agg;
|
||||
|
||||
u32 crc_err_cck;
|
||||
u32 crc_err_11g;
|
||||
u32 crc_err_11n;
|
||||
u32 crc_err_11n_agg;
|
||||
|
||||
boolean cck_lock;
|
||||
boolean pre_ccklock;
|
||||
boolean cck_ever_lock;
|
||||
u8 coex_table_type;
|
||||
|
||||
boolean force_lps_on;
|
||||
u32 wrong_profile_notification;
|
||||
|
||||
boolean concurrent_rx_mode_on;
|
||||
|
||||
u16 score_board;
|
||||
|
||||
u8 a2dp_bit_pool;
|
||||
u8 cut_version;
|
||||
boolean acl_busy;
|
||||
boolean wl_rf_off_on_event;
|
||||
boolean bt_create_connection;
|
||||
boolean gnt_control_by_PTA;
|
||||
};
|
||||
|
||||
#define BT_8703B_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
|
||||
#define BT_8703B_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
|
||||
#define BT_8703B_1ANT_ANTDET_BUF_LEN 16
|
||||
|
||||
struct psdscan_sta_8703b_1ant {
|
||||
|
||||
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
|
||||
u32 ant_det_bt_tx_time;
|
||||
u32 ant_det_pre_psdscan_peak_val;
|
||||
boolean ant_det_is_ant_det_available;
|
||||
u32 ant_det_psd_scan_peak_val;
|
||||
boolean ant_det_is_btreply_available;
|
||||
u32 ant_det_psd_scan_peak_freq;
|
||||
|
||||
u8 ant_det_result;
|
||||
u8 ant_det_peak_val[BT_8703B_1ANT_ANTDET_BUF_LEN];
|
||||
u8 ant_det_peak_freq[BT_8703B_1ANT_ANTDET_BUF_LEN];
|
||||
u32 ant_det_try_count;
|
||||
u32 ant_det_fail_count;
|
||||
u32 ant_det_inteval_count;
|
||||
u32 ant_det_thres_offset;
|
||||
|
||||
u32 real_cent_freq;
|
||||
s32 real_offset;
|
||||
u32 real_span;
|
||||
|
||||
u32 psd_band_width; /* unit: Hz */
|
||||
u32 psd_point; /* 128/256/512/1024 */
|
||||
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_start_point;
|
||||
u32 psd_stop_point;
|
||||
u32 psd_max_value_point;
|
||||
u32 psd_max_value;
|
||||
u32 psd_start_base;
|
||||
u32 psd_avg_num; /* 1/8/16/32 */
|
||||
u32 psd_gen_count;
|
||||
boolean is_psd_running;
|
||||
boolean is_psd_show_max_only;
|
||||
};
|
||||
|
||||
/* *******************************************
|
||||
* The following is interface which will notify coex module.
|
||||
* ******************************************* */
|
||||
void ex_halbtc8703b1ant_power_on_setting(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8703b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8703b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only);
|
||||
void ex_halbtc8703b1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8703b1ant_ips_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8703b1ant_lps_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8703b1ant_scan_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8703b1ant_connect_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8703b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8703b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8703b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8703b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8703b1ant_halt_notify(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8703b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 pnp_state);
|
||||
void ex_halbtc8703b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8703b1ant_periodical(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8703b1ant_display_coex_info(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8703b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
void ex_halbtc8703b1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
|
||||
void ex_halbtc8703b1ant_psd_scan(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
void ex_halbtc8703b1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
|
||||
|
||||
#else
|
||||
#define ex_halbtc8703b1ant_power_on_setting(btcoexist)
|
||||
#define ex_halbtc8703b1ant_pre_load_firmware(btcoexist)
|
||||
#define ex_halbtc8703b1ant_init_hw_config(btcoexist, wifi_only)
|
||||
#define ex_halbtc8703b1ant_init_coex_dm(btcoexist)
|
||||
#define ex_halbtc8703b1ant_ips_notify(btcoexist, type)
|
||||
#define ex_halbtc8703b1ant_lps_notify(btcoexist, type)
|
||||
#define ex_halbtc8703b1ant_scan_notify(btcoexist, type)
|
||||
#define ex_halbtc8703b1ant_connect_notify(btcoexist, type)
|
||||
#define ex_halbtc8703b1ant_media_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8703b1ant_specific_packet_notify(btcoexist, type)
|
||||
#define ex_halbtc8703b1ant_bt_info_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8703b1ant_rf_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8703b1ant_halt_notify(btcoexist)
|
||||
#define ex_halbtc8703b1ant_pnp_notify(btcoexist, pnp_state)
|
||||
#define ex_halbtc8703b1ant_coex_dm_reset(btcoexist)
|
||||
#define ex_halbtc8703b1ant_periodical(btcoexist)
|
||||
#define ex_halbtc8703b1ant_display_coex_info(btcoexist)
|
||||
#define ex_halbtc8703b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
|
||||
#define ex_halbtc8703b1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
|
||||
#define ex_halbtc8703b1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
|
||||
#define ex_halbtc8703b1ant_display_ant_detection(btcoexist)
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,171 @@
|
||||
//===========================================
|
||||
// The following is for 8723A 1Ant BT Co-exist definition
|
||||
//===========================================
|
||||
#define BT_INFO_8723A_1ANT_B_FTP BIT7
|
||||
#define BT_INFO_8723A_1ANT_B_A2DP BIT6
|
||||
#define BT_INFO_8723A_1ANT_B_HID BIT5
|
||||
#define BT_INFO_8723A_1ANT_B_SCO_BUSY BIT4
|
||||
#define BT_INFO_8723A_1ANT_B_ACL_BUSY BIT3
|
||||
#define BT_INFO_8723A_1ANT_B_INQ_PAGE BIT2
|
||||
#define BT_INFO_8723A_1ANT_B_SCO_ESCO BIT1
|
||||
#define BT_INFO_8723A_1ANT_B_CONNECTION BIT0
|
||||
|
||||
typedef enum _BT_STATE_8723A_1ANT{
|
||||
BT_STATE_8723A_1ANT_DISABLED = 0,
|
||||
BT_STATE_8723A_1ANT_NO_CONNECTION = 1,
|
||||
BT_STATE_8723A_1ANT_CONNECT_IDLE = 2,
|
||||
BT_STATE_8723A_1ANT_INQ_OR_PAG = 3,
|
||||
BT_STATE_8723A_1ANT_ACL_ONLY_BUSY = 4,
|
||||
BT_STATE_8723A_1ANT_SCO_ONLY_BUSY = 5,
|
||||
BT_STATE_8723A_1ANT_ACL_SCO_BUSY = 6,
|
||||
BT_STATE_8723A_1ANT_HID_BUSY = 7,
|
||||
BT_STATE_8723A_1ANT_HID_SCO_BUSY = 8,
|
||||
BT_STATE_8723A_1ANT_MAX
|
||||
}BT_STATE_8723A_1ANT, *PBT_STATE_8723A_1ANT;
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8723A_1ANT 2
|
||||
|
||||
typedef enum _BT_INFO_SRC_8723A_1ANT{
|
||||
BT_INFO_SRC_8723A_1ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8723A_1ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8723A_1ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8723A_1ANT_MAX
|
||||
}BT_INFO_SRC_8723A_1ANT,*PBT_INFO_SRC_8723A_1ANT;
|
||||
|
||||
typedef enum _BT_8723A_1ANT_BT_STATUS{
|
||||
BT_8723A_1ANT_BT_STATUS_IDLE = 0x0,
|
||||
BT_8723A_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8723A_1ANT_BT_STATUS_NON_IDLE = 0x2,
|
||||
BT_8723A_1ANT_BT_STATUS_MAX
|
||||
}BT_8723A_1ANT_BT_STATUS,*PBT_8723A_1ANT_BT_STATUS;
|
||||
|
||||
typedef enum _BT_8723A_1ANT_COEX_ALGO{
|
||||
BT_8723A_1ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8723A_1ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8723A_1ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8723A_1ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8723A_1ANT_COEX_ALGO_PANEDR = 0x4,
|
||||
BT_8723A_1ANT_COEX_ALGO_PANHS = 0x5,
|
||||
BT_8723A_1ANT_COEX_ALGO_PANEDR_A2DP = 0x6,
|
||||
BT_8723A_1ANT_COEX_ALGO_PANEDR_HID = 0x7,
|
||||
BT_8723A_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x8,
|
||||
BT_8723A_1ANT_COEX_ALGO_HID_A2DP = 0x9,
|
||||
BT_8723A_1ANT_COEX_ALGO_MAX
|
||||
}BT_8723A_1ANT_COEX_ALGO,*PBT_8723A_1ANT_COEX_ALGO;
|
||||
|
||||
typedef struct _COEX_DM_8723A_1ANT{
|
||||
// fw mechanism
|
||||
BOOLEAN bCurIgnoreWlanAct;
|
||||
BOOLEAN bPreIgnoreWlanAct;
|
||||
u1Byte prePsTdma;
|
||||
u1Byte curPsTdma;
|
||||
u1Byte psTdmaPara[5];
|
||||
u1Byte psTdmaDuAdjType;
|
||||
u4Byte psTdmaMonitorCnt;
|
||||
u4Byte psTdmaGlobalCnt;
|
||||
BOOLEAN bResetTdmaAdjust;
|
||||
BOOLEAN bPrePsTdmaOn;
|
||||
BOOLEAN bCurPsTdmaOn;
|
||||
|
||||
// sw mechanism
|
||||
BOOLEAN bPreRfRxLpfShrink;
|
||||
BOOLEAN bCurRfRxLpfShrink;
|
||||
u4Byte btRf0x1eBackup;
|
||||
BOOLEAN bPreLowPenaltyRa;
|
||||
BOOLEAN bCurLowPenaltyRa;
|
||||
u4Byte preVal0x6c0;
|
||||
u4Byte curVal0x6c0;
|
||||
u4Byte preVal0x6c8;
|
||||
u4Byte curVal0x6c8;
|
||||
u1Byte preVal0x6cc;
|
||||
u1Byte curVal0x6cc;
|
||||
BOOLEAN bLimitedDig;
|
||||
|
||||
// algorithm related
|
||||
u1Byte preAlgorithm;
|
||||
u1Byte curAlgorithm;
|
||||
u1Byte btStatus;
|
||||
u1Byte wifiChnlInfo[3];
|
||||
} COEX_DM_8723A_1ANT, *PCOEX_DM_8723A_1ANT;
|
||||
|
||||
typedef struct _COEX_STA_8723A_1ANT{
|
||||
u4Byte highPriorityTx;
|
||||
u4Byte highPriorityRx;
|
||||
u4Byte lowPriorityTx;
|
||||
u4Byte lowPriorityRx;
|
||||
u1Byte btRssi;
|
||||
u1Byte preBtRssiState;
|
||||
u1Byte preBtRssiState1;
|
||||
u1Byte preWifiRssiState[4];
|
||||
BOOLEAN bC2hBtInfoReqSent;
|
||||
u1Byte btInfoC2h[BT_INFO_SRC_8723A_1ANT_MAX][10];
|
||||
u4Byte btInfoC2hCnt[BT_INFO_SRC_8723A_1ANT_MAX];
|
||||
BOOLEAN bC2hBtInquiryPage;
|
||||
u1Byte btRetryCnt;
|
||||
u1Byte btInfoExt;
|
||||
//BOOLEAN bHoldForStackOperation;
|
||||
//u1Byte bHoldPeriodCnt;
|
||||
// this is for c2h hang work-around
|
||||
u4Byte c2hHangDetectCnt;
|
||||
}COEX_STA_8723A_1ANT, *PCOEX_STA_8723A_1ANT;
|
||||
|
||||
//===========================================
|
||||
// The following is interface which will notify coex module.
|
||||
//===========================================
|
||||
VOID
|
||||
EXhalbtc8723a1ant_InitHwConfig(
|
||||
IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a1ant_InitCoexDm(
|
||||
IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a1ant_IpsNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a1ant_LpsNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a1ant_ScanNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a1ant_ConnectNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a1ant_MediaStatusNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a1ant_SpecialPacketNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a1ant_BtInfoNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN pu1Byte tmpBuf,
|
||||
IN u1Byte length
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a1ant_HaltNotify(
|
||||
IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a1ant_Periodical(
|
||||
IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a1ant_DisplayCoexInfo(
|
||||
IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,184 @@
|
||||
//===========================================
|
||||
// The following is for 8723A 2Ant BT Co-exist definition
|
||||
//===========================================
|
||||
#define BT_INFO_8723A_2ANT_B_FTP BIT7
|
||||
#define BT_INFO_8723A_2ANT_B_A2DP BIT6
|
||||
#define BT_INFO_8723A_2ANT_B_HID BIT5
|
||||
#define BT_INFO_8723A_2ANT_B_SCO_BUSY BIT4
|
||||
#define BT_INFO_8723A_2ANT_B_ACL_BUSY BIT3
|
||||
#define BT_INFO_8723A_2ANT_B_INQ_PAGE BIT2
|
||||
#define BT_INFO_8723A_2ANT_B_SCO_ESCO BIT1
|
||||
#define BT_INFO_8723A_2ANT_B_CONNECTION BIT0
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT 2
|
||||
|
||||
typedef enum _BT_INFO_SRC_8723A_2ANT{
|
||||
BT_INFO_SRC_8723A_2ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8723A_2ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8723A_2ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8723A_2ANT_MAX
|
||||
}BT_INFO_SRC_8723A_2ANT,*PBT_INFO_SRC_8723A_2ANT;
|
||||
|
||||
typedef enum _BT_8723A_2ANT_BT_STATUS{
|
||||
BT_8723A_2ANT_BT_STATUS_IDLE = 0x0,
|
||||
BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8723A_2ANT_BT_STATUS_NON_IDLE = 0x2,
|
||||
BT_8723A_2ANT_BT_STATUS_MAX
|
||||
}BT_8723A_2ANT_BT_STATUS,*PBT_8723A_2ANT_BT_STATUS;
|
||||
|
||||
typedef enum _BT_8723A_2ANT_COEX_ALGO{
|
||||
BT_8723A_2ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8723A_2ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8723A_2ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8723A_2ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8723A_2ANT_COEX_ALGO_PANEDR = 0x4,
|
||||
BT_8723A_2ANT_COEX_ALGO_PANHS = 0x5,
|
||||
BT_8723A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x6,
|
||||
BT_8723A_2ANT_COEX_ALGO_PANEDR_HID = 0x7,
|
||||
BT_8723A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x8,
|
||||
BT_8723A_2ANT_COEX_ALGO_HID_A2DP = 0x9,
|
||||
BT_8723A_2ANT_COEX_ALGO_MAX
|
||||
}BT_8723A_2ANT_COEX_ALGO,*PBT_8723A_2ANT_COEX_ALGO;
|
||||
|
||||
typedef struct _COEX_DM_8723A_2ANT{
|
||||
// fw mechanism
|
||||
BOOLEAN bPreDecBtPwr;
|
||||
BOOLEAN bCurDecBtPwr;
|
||||
//BOOLEAN bPreBtLnaConstrain;
|
||||
//BOOLEAN bCurBtLnaConstrain;
|
||||
//u1Byte bPreBtPsdMode;
|
||||
//u1Byte bCurBtPsdMode;
|
||||
u1Byte preFwDacSwingLvl;
|
||||
u1Byte curFwDacSwingLvl;
|
||||
BOOLEAN bCurIgnoreWlanAct;
|
||||
BOOLEAN bPreIgnoreWlanAct;
|
||||
u1Byte prePsTdma;
|
||||
u1Byte curPsTdma;
|
||||
u1Byte psTdmaPara[5];
|
||||
u1Byte psTdmaDuAdjType;
|
||||
BOOLEAN bResetTdmaAdjust;
|
||||
BOOLEAN bPrePsTdmaOn;
|
||||
BOOLEAN bCurPsTdmaOn;
|
||||
//BOOLEAN bPreBtAutoReport;
|
||||
//BOOLEAN bCurBtAutoReport;
|
||||
|
||||
// sw mechanism
|
||||
BOOLEAN bPreRfRxLpfShrink;
|
||||
BOOLEAN bCurRfRxLpfShrink;
|
||||
u4Byte btRf0x1eBackup;
|
||||
BOOLEAN bPreLowPenaltyRa;
|
||||
BOOLEAN bCurLowPenaltyRa;
|
||||
BOOLEAN bPreDacSwingOn;
|
||||
u4Byte preDacSwingLvl;
|
||||
BOOLEAN bCurDacSwingOn;
|
||||
u4Byte curDacSwingLvl;
|
||||
BOOLEAN bPreAdcBackOff;
|
||||
BOOLEAN bCurAdcBackOff;
|
||||
BOOLEAN bPreAgcTableEn;
|
||||
BOOLEAN bCurAgcTableEn;
|
||||
u4Byte preVal0x6c0;
|
||||
u4Byte curVal0x6c0;
|
||||
u4Byte preVal0x6c8;
|
||||
u4Byte curVal0x6c8;
|
||||
u1Byte preVal0x6cc;
|
||||
u1Byte curVal0x6cc;
|
||||
BOOLEAN bLimitedDig;
|
||||
|
||||
// algorithm related
|
||||
u1Byte preAlgorithm;
|
||||
u1Byte curAlgorithm;
|
||||
u1Byte btStatus;
|
||||
u1Byte wifiChnlInfo[3];
|
||||
} COEX_DM_8723A_2ANT, *PCOEX_DM_8723A_2ANT;
|
||||
|
||||
typedef struct _COEX_STA_8723A_2ANT{
|
||||
u4Byte highPriorityTx;
|
||||
u4Byte highPriorityRx;
|
||||
u4Byte lowPriorityTx;
|
||||
u4Byte lowPriorityRx;
|
||||
u1Byte btRssi;
|
||||
u1Byte preBtRssiState;
|
||||
u1Byte preBtRssiState1;
|
||||
u1Byte preWifiRssiState[4];
|
||||
BOOLEAN bC2hBtInfoReqSent;
|
||||
u1Byte btInfoC2h[BT_INFO_SRC_8723A_2ANT_MAX][10];
|
||||
u4Byte btInfoC2hCnt[BT_INFO_SRC_8723A_2ANT_MAX];
|
||||
BOOLEAN bC2hBtInquiryPage;
|
||||
u1Byte btRetryCnt;
|
||||
u1Byte btInfoExt;
|
||||
BOOLEAN bHoldForStackOperation;
|
||||
u1Byte bHoldPeriodCnt;
|
||||
// this is for c2h hang work-around
|
||||
u4Byte c2hHangDetectCnt;
|
||||
}COEX_STA_8723A_2ANT, *PCOEX_STA_8723A_2ANT;
|
||||
|
||||
//===========================================
|
||||
// The following is interface which will notify coex module.
|
||||
//===========================================
|
||||
VOID
|
||||
EXhalbtc8723a2ant_PowerOnSetting(
|
||||
IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a2ant_InitHwConfig(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN BOOLEAN bWifiOnly
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a2ant_InitCoexDm(
|
||||
IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a2ant_IpsNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a2ant_LpsNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a2ant_ScanNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a2ant_ConnectNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a2ant_MediaStatusNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a2ant_SpecialPacketNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a2ant_HaltNotify(
|
||||
IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a2ant_Periodical(
|
||||
IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a2ant_BtInfoNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN pu1Byte tmpBuf,
|
||||
IN u1Byte length
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a2ant_StackOperationNotify(
|
||||
IN PBTC_COEXIST pBtCoexist,
|
||||
IN u1Byte type
|
||||
);
|
||||
VOID
|
||||
EXhalbtc8723a2ant_DisplayCoexInfo(
|
||||
IN PBTC_COEXIST pBtCoexist
|
||||
);
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,288 @@
|
||||
|
||||
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
|
||||
|
||||
#if (RTL8723B_SUPPORT == 1)
|
||||
/* *******************************************
|
||||
* The following is for 8723B 1ANT BT Co-exist definition
|
||||
* ******************************************* */
|
||||
#define BT_AUTO_REPORT_ONLY_8723B_1ANT 1
|
||||
|
||||
#define BT_INFO_8723B_1ANT_B_FTP BIT(7)
|
||||
#define BT_INFO_8723B_1ANT_B_A2DP BIT(6)
|
||||
#define BT_INFO_8723B_1ANT_B_HID BIT(5)
|
||||
#define BT_INFO_8723B_1ANT_B_SCO_BUSY BIT(4)
|
||||
#define BT_INFO_8723B_1ANT_B_ACL_BUSY BIT(3)
|
||||
#define BT_INFO_8723B_1ANT_B_INQ_PAGE BIT(2)
|
||||
#define BT_INFO_8723B_1ANT_B_SCO_ESCO BIT(1)
|
||||
#define BT_INFO_8723B_1ANT_B_CONNECTION BIT(0)
|
||||
|
||||
#define BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
|
||||
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT 2
|
||||
|
||||
#define BT_8723B_1ANT_WIFI_NOISY_THRESH 50 /* 30 //max: 255 */
|
||||
|
||||
/* for Antenna detection */
|
||||
#define BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
|
||||
#define BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
|
||||
#define BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
|
||||
#define BT_8723B_1ANT_ANTDET_PSDTHRES_1ANT 32
|
||||
#define BT_8723B_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
|
||||
#define BT_8723B_1ANT_ANTDET_SWEEPPOINT_DELAY 40000
|
||||
#define BT_8723B_1ANT_ANTDET_ENABLE 1
|
||||
#define BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 1
|
||||
#define BT_8723B_1ANT_ANTDET_BTTXTIME 100
|
||||
#define BT_8723B_1ANT_ANTDET_BTTXCHANNEL 39
|
||||
|
||||
enum bt_info_src_8723b_1ant {
|
||||
BT_INFO_SRC_8723B_1ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8723B_1ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8723B_1ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8723B_1ANT_MAX
|
||||
};
|
||||
|
||||
enum bt_8723b_1ant_bt_status {
|
||||
BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8723B_1ANT_BT_STATUS_INQ_PAGE = 0x2,
|
||||
BT_8723B_1ANT_BT_STATUS_ACL_BUSY = 0x3,
|
||||
BT_8723B_1ANT_BT_STATUS_SCO_BUSY = 0x4,
|
||||
BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8723B_1ANT_BT_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8723b_1ant_wifi_status {
|
||||
BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
|
||||
BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
|
||||
BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
|
||||
BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
|
||||
BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
|
||||
BT_8723B_1ANT_WIFI_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8723b_1ant_coex_algo {
|
||||
BT_8723B_1ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8723B_1ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8723B_1ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8723B_1ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8723B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
|
||||
BT_8723B_1ANT_COEX_ALGO_PANEDR = 0x5,
|
||||
BT_8723B_1ANT_COEX_ALGO_PANHS = 0x6,
|
||||
BT_8723B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
|
||||
BT_8723B_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
|
||||
BT_8723B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
|
||||
BT_8723B_1ANT_COEX_ALGO_HID_A2DP = 0xa,
|
||||
BT_8723B_1ANT_COEX_ALGO_MAX = 0xb,
|
||||
};
|
||||
|
||||
struct coex_dm_8723b_1ant {
|
||||
/* hw setting */
|
||||
u8 pre_ant_pos_type;
|
||||
u8 cur_ant_pos_type;
|
||||
/* fw mechanism */
|
||||
boolean cur_ignore_wlan_act;
|
||||
boolean pre_ignore_wlan_act;
|
||||
u8 pre_ps_tdma;
|
||||
u8 cur_ps_tdma;
|
||||
u8 ps_tdma_para[5];
|
||||
u8 ps_tdma_du_adj_type;
|
||||
boolean auto_tdma_adjust;
|
||||
boolean pre_ps_tdma_on;
|
||||
boolean cur_ps_tdma_on;
|
||||
boolean pre_bt_auto_report;
|
||||
boolean cur_bt_auto_report;
|
||||
u8 pre_lps;
|
||||
u8 cur_lps;
|
||||
u8 pre_rpwm;
|
||||
u8 cur_rpwm;
|
||||
|
||||
/* sw mechanism */
|
||||
boolean pre_low_penalty_ra;
|
||||
boolean cur_low_penalty_ra;
|
||||
u32 pre_val0x6c0;
|
||||
u32 cur_val0x6c0;
|
||||
u32 pre_val0x6c4;
|
||||
u32 cur_val0x6c4;
|
||||
u32 pre_val0x6c8;
|
||||
u32 cur_val0x6c8;
|
||||
u8 pre_val0x6cc;
|
||||
u8 cur_val0x6cc;
|
||||
|
||||
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
|
||||
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
|
||||
u16 backup_retry_limit;
|
||||
u8 backup_ampdu_max_time;
|
||||
|
||||
/* algorithm related */
|
||||
u8 bt_status;
|
||||
u8 wifi_chnl_info[3];
|
||||
|
||||
u32 pre_ra_mask;
|
||||
u32 cur_ra_mask;
|
||||
u8 pre_arfr_type;
|
||||
u8 cur_arfr_type;
|
||||
u8 pre_retry_limit_type;
|
||||
u8 cur_retry_limit_type;
|
||||
u8 pre_ampdu_time_type;
|
||||
u8 cur_ampdu_time_type;
|
||||
u32 arp_cnt;
|
||||
|
||||
u8 error_condition;
|
||||
};
|
||||
|
||||
struct coex_sta_8723b_1ant {
|
||||
boolean bt_disabled;
|
||||
boolean bt_link_exist;
|
||||
boolean sco_exist;
|
||||
boolean a2dp_exist;
|
||||
boolean hid_exist;
|
||||
boolean pan_exist;
|
||||
boolean bt_hi_pri_link_exist;
|
||||
u8 num_of_profile;
|
||||
boolean bt_abnormal_scan;
|
||||
|
||||
boolean under_lps;
|
||||
boolean under_ips;
|
||||
u32 specific_pkt_period_cnt;
|
||||
u32 high_priority_tx;
|
||||
u32 high_priority_rx;
|
||||
u32 low_priority_tx;
|
||||
u32 low_priority_rx;
|
||||
s8 bt_rssi;
|
||||
boolean bt_tx_rx_mask;
|
||||
boolean c2h_bt_info_req_sent;
|
||||
u8 bt_info_c2h[BT_INFO_SRC_8723B_1ANT_MAX][10];
|
||||
u32 bt_info_c2h_cnt[BT_INFO_SRC_8723B_1ANT_MAX];
|
||||
boolean bt_whck_test;
|
||||
boolean c2h_bt_inquiry_page;
|
||||
boolean c2h_bt_remote_name_req;
|
||||
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
|
||||
u8 bt_retry_cnt;
|
||||
u8 bt_info_ext;
|
||||
u32 pop_event_cnt;
|
||||
u8 scan_ap_num;
|
||||
|
||||
u32 crc_ok_cck;
|
||||
u32 crc_ok_11g;
|
||||
u32 crc_ok_11n;
|
||||
u32 crc_ok_11n_agg;
|
||||
|
||||
u32 crc_err_cck;
|
||||
u32 crc_err_11g;
|
||||
u32 crc_err_11n;
|
||||
u32 crc_err_11n_agg;
|
||||
|
||||
boolean cck_lock;
|
||||
boolean pre_ccklock;
|
||||
boolean cck_ever_lock;
|
||||
u8 coex_table_type;
|
||||
|
||||
boolean force_lps_on;
|
||||
u32 wrong_profile_notification;
|
||||
|
||||
u8 a2dp_bit_pool;
|
||||
u8 cut_version;
|
||||
};
|
||||
|
||||
#define BT_8723B_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
|
||||
#define BT_8723B_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
|
||||
#define BT_8723B_1ANT_ANTDET_BUF_LEN 16
|
||||
|
||||
struct psdscan_sta_8723b_1ant {
|
||||
|
||||
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
|
||||
u32 ant_det_bt_tx_time;
|
||||
u32 ant_det_pre_psdscan_peak_val;
|
||||
boolean ant_det_is_ant_det_available;
|
||||
u32 ant_det_psd_scan_peak_val;
|
||||
boolean ant_det_is_btreply_available;
|
||||
u32 ant_det_psd_scan_peak_freq;
|
||||
|
||||
u8 ant_det_result;
|
||||
u8 ant_det_peak_val[BT_8723B_1ANT_ANTDET_BUF_LEN];
|
||||
u8 ant_det_peak_freq[BT_8723B_1ANT_ANTDET_BUF_LEN];
|
||||
u32 ant_det_try_count;
|
||||
u32 ant_det_fail_count;
|
||||
u32 ant_det_inteval_count;
|
||||
u32 ant_det_thres_offset;
|
||||
|
||||
u32 real_cent_freq;
|
||||
s32 real_offset;
|
||||
u32 real_span;
|
||||
|
||||
u32 psd_band_width; /* unit: Hz */
|
||||
u32 psd_point; /* 128/256/512/1024 */
|
||||
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_start_point;
|
||||
u32 psd_stop_point;
|
||||
u32 psd_max_value_point;
|
||||
u32 psd_max_value;
|
||||
u32 psd_start_base;
|
||||
u32 psd_avg_num; /* 1/8/16/32 */
|
||||
u32 psd_gen_count;
|
||||
boolean is_psd_running;
|
||||
boolean is_psd_show_max_only;
|
||||
};
|
||||
|
||||
/* *******************************************
|
||||
* The following is interface which will notify coex module.
|
||||
* ******************************************* */
|
||||
void ex_halbtc8723b1ant_power_on_setting(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only);
|
||||
void ex_halbtc8723b1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723b1ant_ips_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723b1ant_lps_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723b1ant_scan_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723b1ant_connect_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8723b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723b1ant_halt_notify(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 pnp_state);
|
||||
void ex_halbtc8723b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723b1ant_periodical(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723b1ant_display_coex_info(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
|
||||
void ex_halbtc8723b1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
|
||||
|
||||
#else
|
||||
#define ex_halbtc8723b1ant_power_on_setting(btcoexist)
|
||||
#define ex_halbtc8723b1ant_pre_load_firmware(btcoexist)
|
||||
#define ex_halbtc8723b1ant_init_hw_config(btcoexist, wifi_only)
|
||||
#define ex_halbtc8723b1ant_init_coex_dm(btcoexist)
|
||||
#define ex_halbtc8723b1ant_ips_notify(btcoexist, type)
|
||||
#define ex_halbtc8723b1ant_lps_notify(btcoexist, type)
|
||||
#define ex_halbtc8723b1ant_scan_notify(btcoexist, type)
|
||||
#define ex_halbtc8723b1ant_connect_notify(btcoexist, type)
|
||||
#define ex_halbtc8723b1ant_media_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8723b1ant_specific_packet_notify(btcoexist, type)
|
||||
#define ex_halbtc8723b1ant_bt_info_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8723b1ant_rf_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8723b1ant_halt_notify(btcoexist)
|
||||
#define ex_halbtc8723b1ant_pnp_notify(btcoexist, pnp_state)
|
||||
#define ex_halbtc8723b1ant_coex_dm_reset(btcoexist)
|
||||
#define ex_halbtc8723b1ant_periodical(btcoexist)
|
||||
#define ex_halbtc8723b1ant_display_coex_info(btcoexist)
|
||||
#define ex_halbtc8723b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
|
||||
#define ex_halbtc8723b1ant_display_ant_detection(btcoexist)
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,214 @@
|
||||
|
||||
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
|
||||
|
||||
#if (RTL8723B_SUPPORT == 1)
|
||||
/* *******************************************
|
||||
* The following is for 8723B 2Ant BT Co-exist definition
|
||||
* ******************************************* */
|
||||
#define BT_AUTO_REPORT_ONLY_8723B_2ANT 1
|
||||
|
||||
|
||||
#define BT_INFO_8723B_2ANT_B_FTP BIT(7)
|
||||
#define BT_INFO_8723B_2ANT_B_A2DP BIT(6)
|
||||
#define BT_INFO_8723B_2ANT_B_HID BIT(5)
|
||||
#define BT_INFO_8723B_2ANT_B_SCO_BUSY BIT(4)
|
||||
#define BT_INFO_8723B_2ANT_B_ACL_BUSY BIT(3)
|
||||
#define BT_INFO_8723B_2ANT_B_INQ_PAGE BIT(2)
|
||||
#define BT_INFO_8723B_2ANT_B_SCO_ESCO BIT(1)
|
||||
#define BT_INFO_8723B_2ANT_B_CONNECTION BIT(0)
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT 2
|
||||
|
||||
|
||||
#define BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 /* WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
|
||||
#define BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES 46 /* BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
|
||||
|
||||
enum bt_info_src_8723b_2ant {
|
||||
BT_INFO_SRC_8723B_2ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8723B_2ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8723B_2ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8723B_2ANT_MAX
|
||||
};
|
||||
|
||||
enum bt_8723b_2ant_bt_status {
|
||||
BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8723B_2ANT_BT_STATUS_INQ_PAGE = 0x2,
|
||||
BT_8723B_2ANT_BT_STATUS_ACL_BUSY = 0x3,
|
||||
BT_8723B_2ANT_BT_STATUS_SCO_BUSY = 0x4,
|
||||
BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8723B_2ANT_BT_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8723b_2ant_coex_algo {
|
||||
BT_8723B_2ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8723B_2ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8723B_2ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8723B_2ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
|
||||
BT_8723B_2ANT_COEX_ALGO_PANEDR = 0x5,
|
||||
BT_8723B_2ANT_COEX_ALGO_PANHS = 0x6,
|
||||
BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
|
||||
BT_8723B_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
|
||||
BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
|
||||
BT_8723B_2ANT_COEX_ALGO_HID_A2DP = 0xa,
|
||||
BT_8723B_2ANT_COEX_ALGO_MAX = 0xb,
|
||||
};
|
||||
|
||||
struct coex_dm_8723b_2ant {
|
||||
/* fw mechanism */
|
||||
u8 pre_bt_dec_pwr_lvl;
|
||||
u8 cur_bt_dec_pwr_lvl;
|
||||
u8 pre_fw_dac_swing_lvl;
|
||||
u8 cur_fw_dac_swing_lvl;
|
||||
boolean cur_ignore_wlan_act;
|
||||
boolean pre_ignore_wlan_act;
|
||||
u8 pre_ps_tdma;
|
||||
u8 cur_ps_tdma;
|
||||
u8 ps_tdma_para[5];
|
||||
u8 ps_tdma_du_adj_type;
|
||||
boolean reset_tdma_adjust;
|
||||
boolean auto_tdma_adjust;
|
||||
boolean pre_ps_tdma_on;
|
||||
boolean cur_ps_tdma_on;
|
||||
boolean pre_bt_auto_report;
|
||||
boolean cur_bt_auto_report;
|
||||
|
||||
/* sw mechanism */
|
||||
boolean pre_rf_rx_lpf_shrink;
|
||||
boolean cur_rf_rx_lpf_shrink;
|
||||
u32 bt_rf_0x1e_backup;
|
||||
boolean pre_low_penalty_ra;
|
||||
boolean cur_low_penalty_ra;
|
||||
boolean pre_dac_swing_on;
|
||||
u32 pre_dac_swing_lvl;
|
||||
boolean cur_dac_swing_on;
|
||||
u32 cur_dac_swing_lvl;
|
||||
boolean pre_adc_back_off;
|
||||
boolean cur_adc_back_off;
|
||||
boolean pre_agc_table_en;
|
||||
boolean cur_agc_table_en;
|
||||
u32 pre_val0x6c0;
|
||||
u32 cur_val0x6c0;
|
||||
u32 pre_val0x6c4;
|
||||
u32 cur_val0x6c4;
|
||||
u32 pre_val0x6c8;
|
||||
u32 cur_val0x6c8;
|
||||
u8 pre_val0x6cc;
|
||||
u8 cur_val0x6cc;
|
||||
boolean limited_dig;
|
||||
|
||||
/* algorithm related */
|
||||
u8 pre_algorithm;
|
||||
u8 cur_algorithm;
|
||||
u8 bt_status;
|
||||
u8 wifi_chnl_info[3];
|
||||
|
||||
boolean need_recover0x948;
|
||||
u32 backup0x948;
|
||||
|
||||
u8 pre_lps;
|
||||
u8 cur_lps;
|
||||
u8 pre_rpwm;
|
||||
u8 cur_rpwm;
|
||||
|
||||
boolean is_switch_to_1dot5_ant;
|
||||
u8 switch_thres_offset;
|
||||
};
|
||||
|
||||
struct coex_sta_8723b_2ant {
|
||||
boolean bt_disabled;
|
||||
boolean bt_link_exist;
|
||||
boolean sco_exist;
|
||||
boolean a2dp_exist;
|
||||
boolean hid_exist;
|
||||
boolean pan_exist;
|
||||
boolean bt_abnormal_scan;
|
||||
boolean under_lps;
|
||||
boolean under_ips;
|
||||
u32 high_priority_tx;
|
||||
u32 high_priority_rx;
|
||||
u32 low_priority_tx;
|
||||
u32 low_priority_rx;
|
||||
u8 bt_rssi;
|
||||
boolean bt_tx_rx_mask;
|
||||
u8 pre_bt_rssi_state;
|
||||
u8 pre_wifi_rssi_state[4];
|
||||
boolean c2h_bt_info_req_sent;
|
||||
u8 bt_info_c2h[BT_INFO_SRC_8723B_2ANT_MAX][10];
|
||||
u32 bt_info_c2h_cnt[BT_INFO_SRC_8723B_2ANT_MAX];
|
||||
boolean bt_whck_test;
|
||||
boolean c2h_bt_inquiry_page;
|
||||
boolean c2h_bt_remote_name_req;
|
||||
u8 bt_retry_cnt;
|
||||
u8 bt_info_ext;
|
||||
u32 pop_event_cnt;
|
||||
u8 scan_ap_num;
|
||||
|
||||
u32 crc_ok_cck;
|
||||
u32 crc_ok_11g;
|
||||
u32 crc_ok_11n;
|
||||
u32 crc_ok_11n_agg;
|
||||
|
||||
u32 crc_err_cck;
|
||||
u32 crc_err_11g;
|
||||
u32 crc_err_11n;
|
||||
u32 crc_err_11n_agg;
|
||||
|
||||
u8 coex_table_type;
|
||||
boolean force_lps_on;
|
||||
|
||||
u8 dis_ver_info_cnt;
|
||||
|
||||
u8 a2dp_bit_pool;
|
||||
u8 cut_version;
|
||||
};
|
||||
|
||||
/* *******************************************
|
||||
* The following is interface which will notify coex module.
|
||||
* ******************************************* */
|
||||
void ex_halbtc8723b2ant_power_on_setting(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723b2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only);
|
||||
void ex_halbtc8723b2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723b2ant_ips_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723b2ant_lps_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723b2ant_scan_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723b2ant_connect_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723b2ant_media_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8723b2ant_halt_notify(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723b2ant_pnp_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 pnp_state);
|
||||
void ex_halbtc8723b2ant_periodical(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723b2ant_display_coex_info(IN struct btc_coexist *btcoexist);
|
||||
|
||||
#else
|
||||
#define ex_halbtc8723b2ant_power_on_setting(btcoexist)
|
||||
#define ex_halbtc8723b2ant_pre_load_firmware(btcoexist)
|
||||
#define ex_halbtc8723b2ant_init_hw_config(btcoexist, wifi_only)
|
||||
#define ex_halbtc8723b2ant_init_coex_dm(btcoexist)
|
||||
#define ex_halbtc8723b2ant_ips_notify(btcoexist, type)
|
||||
#define ex_halbtc8723b2ant_lps_notify(btcoexist, type)
|
||||
#define ex_halbtc8723b2ant_scan_notify(btcoexist, type)
|
||||
#define ex_halbtc8723b2ant_connect_notify(btcoexist, type)
|
||||
#define ex_halbtc8723b2ant_media_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8723b2ant_specific_packet_notify(btcoexist, type)
|
||||
#define ex_halbtc8723b2ant_bt_info_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8723b2ant_halt_notify(btcoexist)
|
||||
#define ex_halbtc8723b2ant_pnp_notify(btcoexist, pnp_state)
|
||||
#define ex_halbtc8723b2ant_periodical(btcoexist)
|
||||
#define ex_halbtc8723b2ant_display_coex_info(btcoexist)
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,230 @@
|
||||
|
||||
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
|
||||
|
||||
#if (RTL8812A_SUPPORT == 1)
|
||||
|
||||
/* *******************************************
|
||||
* The following is for 8812A 1ANT BT Co-exist definition
|
||||
* ******************************************* */
|
||||
#define BT_AUTO_REPORT_ONLY_8812A_1ANT 1
|
||||
|
||||
#define BT_INFO_8812A_1ANT_B_FTP BIT(7)
|
||||
#define BT_INFO_8812A_1ANT_B_A2DP BIT(6)
|
||||
#define BT_INFO_8812A_1ANT_B_HID BIT(5)
|
||||
#define BT_INFO_8812A_1ANT_B_SCO_BUSY BIT(4)
|
||||
#define BT_INFO_8812A_1ANT_B_ACL_BUSY BIT(3)
|
||||
#define BT_INFO_8812A_1ANT_B_INQ_PAGE BIT(2)
|
||||
#define BT_INFO_8812A_1ANT_B_SCO_ESCO BIT(1)
|
||||
#define BT_INFO_8812A_1ANT_B_CONNECTION BIT(0)
|
||||
|
||||
#define BT_INFO_8812A_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
|
||||
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT 2
|
||||
|
||||
#define BT_8812A_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
|
||||
|
||||
enum bt_info_src_8812a_1ant {
|
||||
BT_INFO_SRC_8812A_1ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8812A_1ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8812A_1ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8812A_1ANT_MAX
|
||||
};
|
||||
|
||||
enum bt_8812a_1ant_bt_status {
|
||||
BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8812A_1ANT_BT_STATUS_INQ_PAGE = 0x2,
|
||||
BT_8812A_1ANT_BT_STATUS_ACL_BUSY = 0x3,
|
||||
BT_8812A_1ANT_BT_STATUS_SCO_BUSY = 0x4,
|
||||
BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8812A_1ANT_BT_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8812a_1ant_wifi_status {
|
||||
BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
|
||||
BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
|
||||
BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
|
||||
BT_8812A_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
|
||||
BT_8812A_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
|
||||
BT_8812A_1ANT_WIFI_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8812a_1ant_coex_algo {
|
||||
BT_8812A_1ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8812A_1ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8812A_1ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8812A_1ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8812A_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
|
||||
BT_8812A_1ANT_COEX_ALGO_PANEDR = 0x5,
|
||||
BT_8812A_1ANT_COEX_ALGO_PANHS = 0x6,
|
||||
BT_8812A_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
|
||||
BT_8812A_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
|
||||
BT_8812A_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
|
||||
BT_8812A_1ANT_COEX_ALGO_HID_A2DP = 0xa,
|
||||
BT_8812A_1ANT_COEX_ALGO_MAX = 0xb,
|
||||
};
|
||||
|
||||
struct coex_dm_8812a_1ant {
|
||||
/* hw setting */
|
||||
u8 pre_ant_pos_type;
|
||||
u8 cur_ant_pos_type;
|
||||
/* fw mechanism */
|
||||
boolean cur_ignore_wlan_act;
|
||||
boolean pre_ignore_wlan_act;
|
||||
u8 pre_ps_tdma;
|
||||
u8 cur_ps_tdma;
|
||||
u8 ps_tdma_para[5];
|
||||
u8 ps_tdma_du_adj_type;
|
||||
boolean auto_tdma_adjust;
|
||||
boolean pre_ps_tdma_on;
|
||||
boolean cur_ps_tdma_on;
|
||||
boolean pre_bt_auto_report;
|
||||
boolean cur_bt_auto_report;
|
||||
u8 pre_lps;
|
||||
u8 cur_lps;
|
||||
u8 pre_rpwm;
|
||||
u8 cur_rpwm;
|
||||
|
||||
/* sw mechanism */
|
||||
boolean pre_low_penalty_ra;
|
||||
boolean cur_low_penalty_ra;
|
||||
u32 pre_val0x6c0;
|
||||
u32 cur_val0x6c0;
|
||||
u32 pre_val0x6c4;
|
||||
u32 cur_val0x6c4;
|
||||
u32 pre_val0x6c8;
|
||||
u32 cur_val0x6c8;
|
||||
u8 pre_val0x6cc;
|
||||
u8 cur_val0x6cc;
|
||||
boolean limited_dig;
|
||||
|
||||
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
|
||||
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
|
||||
u16 backup_retry_limit;
|
||||
u8 backup_ampdu_max_time;
|
||||
|
||||
/* algorithm related */
|
||||
u8 pre_algorithm;
|
||||
u8 cur_algorithm;
|
||||
u8 bt_status;
|
||||
u8 wifi_chnl_info[3];
|
||||
|
||||
u32 pre_ra_mask;
|
||||
u32 cur_ra_mask;
|
||||
u8 pre_arfr_type;
|
||||
u8 cur_arfr_type;
|
||||
u8 pre_retry_limit_type;
|
||||
u8 cur_retry_limit_type;
|
||||
u8 pre_ampdu_time_type;
|
||||
u8 cur_ampdu_time_type;
|
||||
u32 arp_cnt;
|
||||
|
||||
u8 error_condition;
|
||||
};
|
||||
|
||||
struct coex_sta_8812a_1ant {
|
||||
boolean bt_disabled;
|
||||
boolean bt_link_exist;
|
||||
boolean sco_exist;
|
||||
boolean a2dp_exist;
|
||||
boolean hid_exist;
|
||||
boolean pan_exist;
|
||||
|
||||
boolean under_lps;
|
||||
boolean under_ips;
|
||||
u32 specific_pkt_period_cnt;
|
||||
u32 high_priority_tx;
|
||||
u32 high_priority_rx;
|
||||
u32 low_priority_tx;
|
||||
u32 low_priority_rx;
|
||||
s8 bt_rssi;
|
||||
boolean bt_tx_rx_mask;
|
||||
u8 pre_bt_rssi_state;
|
||||
u8 pre_wifi_rssi_state[4];
|
||||
boolean c2h_bt_info_req_sent;
|
||||
u8 bt_info_c2h[BT_INFO_SRC_8812A_1ANT_MAX][10];
|
||||
u32 bt_info_c2h_cnt[BT_INFO_SRC_8812A_1ANT_MAX];
|
||||
u32 bt_info_query_cnt;
|
||||
boolean c2h_bt_inquiry_page;
|
||||
boolean c2h_bt_page; /* Add for win8.1 page out issue */
|
||||
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
|
||||
u8 bt_retry_cnt;
|
||||
u8 bt_info_ext;
|
||||
u32 pop_event_cnt;
|
||||
u8 scan_ap_num;
|
||||
|
||||
u32 crc_ok_cck;
|
||||
u32 crc_ok_11g;
|
||||
u32 crc_ok_11n;
|
||||
u32 crc_ok_11n_agg;
|
||||
|
||||
u32 crc_err_cck;
|
||||
u32 crc_err_11g;
|
||||
u32 crc_err_11n;
|
||||
u32 crc_err_11n_agg;
|
||||
|
||||
boolean cck_lock;
|
||||
boolean pre_ccklock;
|
||||
u8 coex_table_type;
|
||||
|
||||
boolean force_lps_on;
|
||||
};
|
||||
|
||||
/* *******************************************
|
||||
* The following is interface which will notify coex module.
|
||||
* ******************************************* */
|
||||
void ex_halbtc8812a1ant_power_on_setting(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8812a1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8812a1ant_init_hw_config(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only);
|
||||
void ex_halbtc8812a1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8812a1ant_ips_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8812a1ant_lps_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8812a1ant_scan_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8812a1ant_connect_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8812a1ant_media_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8812a1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8812a1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8812a1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8812a1ant_halt_notify(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8812a1ant_pnp_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 pnp_state);
|
||||
void ex_halbtc8812a1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8812a1ant_periodical(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8812a1ant_dbg_control(IN struct btc_coexist *btcoexist,
|
||||
IN u8 op_code, IN u8 op_len, IN u8 *pdata);
|
||||
void ex_halbtc8812a1ant_display_coex_info(IN struct btc_coexist *btcoexist);
|
||||
|
||||
#else
|
||||
#define ex_halbtc8812a1ant_power_on_setting(btcoexist)
|
||||
#define ex_halbtc8812a1ant_pre_load_firmware(btcoexist)
|
||||
#define ex_halbtc8812a1ant_init_hw_config(btcoexist, wifi_only)
|
||||
#define ex_halbtc8812a1ant_init_coex_dm(btcoexist)
|
||||
#define ex_halbtc8812a1ant_ips_notify(btcoexist, type)
|
||||
#define ex_halbtc8812a1ant_lps_notify(btcoexist, type)
|
||||
#define ex_halbtc8812a1ant_scan_notify(btcoexist, type)
|
||||
#define ex_halbtc8812a1ant_connect_notify(btcoexist, type)
|
||||
#define ex_halbtc8812a1ant_media_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8812a1ant_specific_packet_notify(btcoexist, type)
|
||||
#define ex_halbtc8812a1ant_bt_info_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8812a1ant_rf_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8812a1ant_halt_notify(btcoexist)
|
||||
#define ex_halbtc8812a1ant_pnp_notify(btcoexist, pnp_state)
|
||||
#define ex_halbtc8812a1ant_coex_dm_reset(btcoexist)
|
||||
#define ex_halbtc8812a1ant_periodical(btcoexist)
|
||||
#define ex_halbtc8812a1ant_dbg_control(btcoexist, op_code, op_len, pdata)
|
||||
#define ex_halbtc8812a1ant_display_coex_info(btcoexist)
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,202 @@
|
||||
|
||||
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
|
||||
|
||||
#if (RTL8812A_SUPPORT == 1)
|
||||
|
||||
/* *******************************************
|
||||
* The following is for 8812A 2Ant BT Co-exist definition
|
||||
* ******************************************* */
|
||||
#define BT_AUTO_REPORT_ONLY_8812A_2ANT 0
|
||||
|
||||
#define BT_INFO_8812A_2ANT_B_FTP BIT(7)
|
||||
#define BT_INFO_8812A_2ANT_B_A2DP BIT(6)
|
||||
#define BT_INFO_8812A_2ANT_B_HID BIT(5)
|
||||
#define BT_INFO_8812A_2ANT_B_SCO_BUSY BIT(4)
|
||||
#define BT_INFO_8812A_2ANT_B_ACL_BUSY BIT(3)
|
||||
#define BT_INFO_8812A_2ANT_B_INQ_PAGE BIT(2)
|
||||
#define BT_INFO_8812A_2ANT_B_SCO_ESCO BIT(1)
|
||||
#define BT_INFO_8812A_2ANT_B_CONNECTION BIT(0)
|
||||
|
||||
#define BT_INFO_8812A_2ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
|
||||
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT 2
|
||||
|
||||
enum bt_info_src_8812a_2ant {
|
||||
BT_INFO_SRC_8812A_2ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8812A_2ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8812A_2ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8812A_2ANT_MAX
|
||||
};
|
||||
|
||||
enum bt_8812a_2ant_bt_status {
|
||||
BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8812A_2ANT_BT_STATUS_INQ_PAGE = 0x2,
|
||||
BT_8812A_2ANT_BT_STATUS_ACL_BUSY = 0x3,
|
||||
BT_8812A_2ANT_BT_STATUS_SCO_BUSY = 0x4,
|
||||
BT_8812A_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8812A_2ANT_BT_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8812a_2ant_coex_algo {
|
||||
BT_8812A_2ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8812A_2ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8812A_2ANT_COEX_ALGO_SCO_HID = 0x2,
|
||||
BT_8812A_2ANT_COEX_ALGO_HID = 0x3,
|
||||
BT_8812A_2ANT_COEX_ALGO_A2DP = 0x4,
|
||||
BT_8812A_2ANT_COEX_ALGO_A2DP_PANHS = 0x5,
|
||||
BT_8812A_2ANT_COEX_ALGO_PANEDR = 0x6,
|
||||
BT_8812A_2ANT_COEX_ALGO_PANHS = 0x7,
|
||||
BT_8812A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x8,
|
||||
BT_8812A_2ANT_COEX_ALGO_PANEDR_HID = 0x9,
|
||||
BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0xa,
|
||||
BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANHS = 0xb,
|
||||
BT_8812A_2ANT_COEX_ALGO_HID_A2DP = 0xc,
|
||||
BT_8812A_2ANT_COEX_ALGO_MAX = 0xd
|
||||
};
|
||||
|
||||
struct coex_dm_8812a_2ant {
|
||||
/* fw mechanism */
|
||||
u8 pre_bt_dec_pwr_lvl;
|
||||
u8 cur_bt_dec_pwr_lvl;
|
||||
u8 pre_fw_dac_swing_lvl;
|
||||
u8 cur_fw_dac_swing_lvl;
|
||||
boolean cur_ignore_wlan_act;
|
||||
boolean pre_ignore_wlan_act;
|
||||
u8 pre_ps_tdma;
|
||||
u8 cur_ps_tdma;
|
||||
u8 ps_tdma_para[5];
|
||||
u8 ps_tdma_du_adj_type;
|
||||
boolean auto_tdma_adjust;
|
||||
boolean auto_tdma_adjust_low_rssi;
|
||||
boolean pre_ps_tdma_on;
|
||||
boolean cur_ps_tdma_on;
|
||||
boolean pre_bt_auto_report;
|
||||
boolean cur_bt_auto_report;
|
||||
u8 pre_lps;
|
||||
u8 cur_lps;
|
||||
u8 pre_rpwm;
|
||||
u8 cur_rpwm;
|
||||
|
||||
/* sw mechanism */
|
||||
boolean pre_rf_rx_lpf_shrink;
|
||||
boolean cur_rf_rx_lpf_shrink;
|
||||
u32 bt_rf_0x1e_backup;
|
||||
boolean pre_low_penalty_ra;
|
||||
boolean cur_low_penalty_ra;
|
||||
boolean pre_dac_swing_on;
|
||||
u32 pre_dac_swing_lvl;
|
||||
boolean cur_dac_swing_on;
|
||||
u32 cur_dac_swing_lvl;
|
||||
boolean pre_adc_back_off;
|
||||
boolean cur_adc_back_off;
|
||||
boolean pre_agc_table_en;
|
||||
boolean cur_agc_table_en;
|
||||
u32 pre_val0x6c0;
|
||||
u32 cur_val0x6c0;
|
||||
u32 pre_val0x6c4;
|
||||
u32 cur_val0x6c4;
|
||||
u32 pre_val0x6c8;
|
||||
u32 cur_val0x6c8;
|
||||
u8 pre_val0x6cc;
|
||||
u8 cur_val0x6cc;
|
||||
boolean limited_dig;
|
||||
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
|
||||
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
|
||||
u16 backup_retry_limit;
|
||||
u8 backup_ampdu_max_time;
|
||||
|
||||
/* algorithm related */
|
||||
u8 pre_algorithm;
|
||||
u8 cur_algorithm;
|
||||
u8 bt_status;
|
||||
u8 wifi_chnl_info[3];
|
||||
|
||||
u32 pre_ra_mask;
|
||||
u32 cur_ra_mask;
|
||||
u8 cur_ra_mask_type;
|
||||
u8 pre_arfr_type;
|
||||
u8 cur_arfr_type;
|
||||
u8 pre_retry_limit_type;
|
||||
u8 cur_retry_limit_type;
|
||||
u8 pre_ampdu_time_type;
|
||||
u8 cur_ampdu_time_type;
|
||||
};
|
||||
|
||||
struct coex_sta_8812a_2ant {
|
||||
boolean bt_disabled;
|
||||
boolean bt_link_exist;
|
||||
boolean sco_exist;
|
||||
boolean a2dp_exist;
|
||||
boolean hid_exist;
|
||||
boolean pan_exist;
|
||||
boolean acl_busy;
|
||||
|
||||
boolean under_lps;
|
||||
boolean under_ips;
|
||||
u32 high_priority_tx;
|
||||
u32 high_priority_rx;
|
||||
u32 low_priority_tx;
|
||||
u32 low_priority_rx;
|
||||
u8 bt_rssi;
|
||||
u8 pre_bt_rssi_state;
|
||||
u8 pre_wifi_rssi_state[4];
|
||||
boolean c2h_bt_info_req_sent;
|
||||
u8 bt_info_c2h[BT_INFO_SRC_8812A_2ANT_MAX][10];
|
||||
u32 bt_info_c2h_cnt[BT_INFO_SRC_8812A_2ANT_MAX];
|
||||
u32 bt_info_query_cnt;
|
||||
boolean c2h_bt_inquiry_page;
|
||||
u8 bt_retry_cnt;
|
||||
u8 bt_info_ext;
|
||||
};
|
||||
|
||||
/* *******************************************
|
||||
* The following is interface which will notify coex module.
|
||||
* ******************************************* */
|
||||
void ex_halbtc8812a2ant_power_on_setting(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8812a2ant_init_hw_config(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only);
|
||||
void ex_halbtc8812a2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8812a2ant_ips_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8812a2ant_lps_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8812a2ant_scan_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8812a2ant_connect_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8812a2ant_media_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8812a2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8812a2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8812a2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
|
||||
void ex_halbtc8812a2ant_halt_notify(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8812a2ant_periodical(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8812a2ant_display_coex_info(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8812a2ant_dbg_control(IN struct btc_coexist *btcoexist,
|
||||
IN u8 op_code, IN u8 op_len, IN u8 *pdata);
|
||||
|
||||
#else
|
||||
#define ex_halbtc8812a2ant_power_on_setting(btcoexist)
|
||||
#define ex_halbtc8812a2ant_init_hw_config(btcoexist, wifi_only)
|
||||
#define ex_halbtc8812a2ant_init_coex_dm(btcoexist)
|
||||
#define ex_halbtc8812a2ant_ips_notify(btcoexist, type)
|
||||
#define ex_halbtc8812a2ant_lps_notify(btcoexist, type)
|
||||
#define ex_halbtc8812a2ant_scan_notify(btcoexist, type)
|
||||
#define ex_halbtc8812a2ant_connect_notify(btcoexist, type)
|
||||
#define ex_halbtc8812a2ant_media_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8812a2ant_specific_packet_notify(btcoexist, type)
|
||||
#define ex_halbtc8812a2ant_bt_info_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8812a2ant_rf_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8812a2ant_halt_notify(btcoexist)
|
||||
#define ex_halbtc8812a2ant_periodical(btcoexist)
|
||||
#define ex_halbtc8812a2ant_display_coex_info(btcoexist)
|
||||
#define ex_halbtc8812a2ant_dbg_control(btcoexist, op_code, op_len, pdata)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,197 @@
|
||||
|
||||
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
|
||||
|
||||
#if (RTL8821A_SUPPORT == 1)
|
||||
|
||||
/* *******************************************
|
||||
* The following is for 8821A 1ANT BT Co-exist definition
|
||||
* ******************************************* */
|
||||
#define BT_AUTO_REPORT_ONLY_8821A_1ANT 1
|
||||
|
||||
#define BT_INFO_8821A_1ANT_B_FTP BIT(7)
|
||||
#define BT_INFO_8821A_1ANT_B_A2DP BIT(6)
|
||||
#define BT_INFO_8821A_1ANT_B_HID BIT(5)
|
||||
#define BT_INFO_8821A_1ANT_B_SCO_BUSY BIT(4)
|
||||
#define BT_INFO_8821A_1ANT_B_ACL_BUSY BIT(3)
|
||||
#define BT_INFO_8821A_1ANT_B_INQ_PAGE BIT(2)
|
||||
#define BT_INFO_8821A_1ANT_B_SCO_ESCO BIT(1)
|
||||
#define BT_INFO_8821A_1ANT_B_CONNECTION BIT(0)
|
||||
|
||||
#define BT_INFO_8821A_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
|
||||
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT 2
|
||||
|
||||
enum bt_info_src_8821a_1ant {
|
||||
BT_INFO_SRC_8821A_1ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8821A_1ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8821A_1ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8821A_1ANT_MAX
|
||||
};
|
||||
|
||||
enum bt_8821a_1ant_bt_status {
|
||||
BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8821A_1ANT_BT_STATUS_INQ_PAGE = 0x2,
|
||||
BT_8821A_1ANT_BT_STATUS_ACL_BUSY = 0x3,
|
||||
BT_8821A_1ANT_BT_STATUS_SCO_BUSY = 0x4,
|
||||
BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8821A_1ANT_BT_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8821a_1ant_wifi_status {
|
||||
BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
|
||||
BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
|
||||
BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
|
||||
BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
|
||||
BT_8821A_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
|
||||
BT_8821A_1ANT_WIFI_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8821a_1ant_coex_algo {
|
||||
BT_8821A_1ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8821A_1ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8821A_1ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8821A_1ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8821A_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
|
||||
BT_8821A_1ANT_COEX_ALGO_PANEDR = 0x5,
|
||||
BT_8821A_1ANT_COEX_ALGO_PANHS = 0x6,
|
||||
BT_8821A_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
|
||||
BT_8821A_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
|
||||
BT_8821A_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
|
||||
BT_8821A_1ANT_COEX_ALGO_HID_A2DP = 0xa,
|
||||
BT_8821A_1ANT_COEX_ALGO_MAX = 0xb,
|
||||
};
|
||||
|
||||
struct coex_dm_8821a_1ant {
|
||||
/* fw mechanism */
|
||||
boolean cur_ignore_wlan_act;
|
||||
boolean pre_ignore_wlan_act;
|
||||
u8 pre_ps_tdma;
|
||||
u8 cur_ps_tdma;
|
||||
u8 ps_tdma_para[5];
|
||||
u8 ps_tdma_du_adj_type;
|
||||
boolean auto_tdma_adjust;
|
||||
boolean pre_ps_tdma_on;
|
||||
boolean cur_ps_tdma_on;
|
||||
boolean pre_bt_auto_report;
|
||||
boolean cur_bt_auto_report;
|
||||
u8 pre_lps;
|
||||
u8 cur_lps;
|
||||
u8 pre_rpwm;
|
||||
u8 cur_rpwm;
|
||||
|
||||
/* sw mechanism */
|
||||
boolean pre_low_penalty_ra;
|
||||
boolean cur_low_penalty_ra;
|
||||
u32 pre_val0x6c0;
|
||||
u32 cur_val0x6c0;
|
||||
u32 pre_val0x6c4;
|
||||
u32 cur_val0x6c4;
|
||||
u32 pre_val0x6c8;
|
||||
u32 cur_val0x6c8;
|
||||
u8 pre_val0x6cc;
|
||||
u8 cur_val0x6cc;
|
||||
|
||||
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
|
||||
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
|
||||
u16 backup_retry_limit;
|
||||
u8 backup_ampdu_max_time;
|
||||
|
||||
/* algorithm related */
|
||||
u8 pre_algorithm;
|
||||
u8 cur_algorithm;
|
||||
u8 bt_status;
|
||||
u8 wifi_chnl_info[3];
|
||||
|
||||
u32 pre_ra_mask;
|
||||
u32 cur_ra_mask;
|
||||
u8 pre_arfr_type;
|
||||
u8 cur_arfr_type;
|
||||
u8 pre_retry_limit_type;
|
||||
u8 cur_retry_limit_type;
|
||||
u8 pre_ampdu_time_type;
|
||||
u8 cur_ampdu_time_type;
|
||||
u32 arp_cnt;
|
||||
|
||||
u8 error_condition;
|
||||
};
|
||||
|
||||
struct coex_sta_8821a_1ant {
|
||||
boolean bt_disabled;
|
||||
boolean bt_link_exist;
|
||||
boolean sco_exist;
|
||||
boolean a2dp_exist;
|
||||
boolean hid_exist;
|
||||
boolean pan_exist;
|
||||
|
||||
boolean under_lps;
|
||||
boolean under_ips;
|
||||
u32 specific_pkt_period_cnt;
|
||||
u32 high_priority_tx;
|
||||
u32 high_priority_rx;
|
||||
u32 low_priority_tx;
|
||||
u32 low_priority_rx;
|
||||
u8 bt_rssi;
|
||||
boolean bt_tx_rx_mask;
|
||||
u8 pre_bt_rssi_state;
|
||||
u8 pre_wifi_rssi_state[4];
|
||||
boolean c2h_bt_info_req_sent;
|
||||
u8 bt_info_c2h[BT_INFO_SRC_8821A_1ANT_MAX][10];
|
||||
u32 bt_info_c2h_cnt[BT_INFO_SRC_8821A_1ANT_MAX];
|
||||
boolean c2h_bt_inquiry_page;
|
||||
boolean c2h_bt_page; /* Add for win8.1 page out issue */
|
||||
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
|
||||
u8 bt_retry_cnt;
|
||||
u8 bt_info_ext;
|
||||
boolean
|
||||
bt_whck_test; /* Add for ASUS WHQL TEST that enable wifi test bt */
|
||||
};
|
||||
|
||||
/* *******************************************
|
||||
* The following is interface which will notify coex module.
|
||||
* ******************************************* */
|
||||
void ex_halbtc8821a1ant_power_on_setting(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821a1ant_init_hw_config(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only);
|
||||
void ex_halbtc8821a1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821a1ant_ips_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821a1ant_lps_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821a1ant_scan_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821a1ant_connect_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821a1ant_media_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821a1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821a1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8821a1ant_halt_notify(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821a1ant_pnp_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 pnp_state);
|
||||
void ex_halbtc8821a1ant_periodical(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821a1ant_display_coex_info(IN struct btc_coexist *btcoexist);
|
||||
|
||||
#else
|
||||
#define ex_halbtc8821a1ant_power_on_setting(btcoexist)
|
||||
#define ex_halbtc8821a1ant_init_hw_config(btcoexist, wifi_only)
|
||||
#define ex_halbtc8821a1ant_init_coex_dm(btcoexist)
|
||||
#define ex_halbtc8821a1ant_ips_notify(btcoexist, type)
|
||||
#define ex_halbtc8821a1ant_lps_notify(btcoexist, type)
|
||||
#define ex_halbtc8821a1ant_scan_notify(btcoexist, type)
|
||||
#define ex_halbtc8821a1ant_connect_notify(btcoexist, type)
|
||||
#define ex_halbtc8821a1ant_media_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8821a1ant_specific_packet_notify(btcoexist, type)
|
||||
#define ex_halbtc8821a1ant_bt_info_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8821a1ant_halt_notify(btcoexist)
|
||||
#define ex_halbtc8821a1ant_pnp_notify(btcoexist, pnp_state)
|
||||
#define ex_halbtc8821a1ant_periodical(btcoexist)
|
||||
#define ex_halbtc8821a1ant_display_coex_info(btcoexist)
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,205 @@
|
||||
|
||||
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
|
||||
|
||||
#if (RTL8821A_SUPPORT == 1)
|
||||
|
||||
/* *******************************************
|
||||
* The following is for 8821A 2Ant BT Co-exist definition
|
||||
* ******************************************* */
|
||||
#define BT_AUTO_REPORT_ONLY_8821A_2ANT 1
|
||||
|
||||
|
||||
#define BT_INFO_8821A_2ANT_B_FTP BIT(7)
|
||||
#define BT_INFO_8821A_2ANT_B_A2DP BIT(6)
|
||||
#define BT_INFO_8821A_2ANT_B_HID BIT(5)
|
||||
#define BT_INFO_8821A_2ANT_B_SCO_BUSY BIT(4)
|
||||
#define BT_INFO_8821A_2ANT_B_ACL_BUSY BIT(3)
|
||||
#define BT_INFO_8821A_2ANT_B_INQ_PAGE BIT(2)
|
||||
#define BT_INFO_8821A_2ANT_B_SCO_ESCO BIT(1)
|
||||
#define BT_INFO_8821A_2ANT_B_CONNECTION BIT(0)
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT 2
|
||||
|
||||
|
||||
#define BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 /* WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
|
||||
#define BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES 46 /* BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
|
||||
|
||||
enum bt_info_src_8821a_2ant {
|
||||
BT_INFO_SRC_8821A_2ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8821A_2ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8821A_2ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8821A_2ANT_MAX
|
||||
};
|
||||
|
||||
enum bt_8821a_2ant_bt_status {
|
||||
BT_8821A_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8821A_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8821A_2ANT_BT_STATUS_INQ_PAGE = 0x2,
|
||||
BT_8821A_2ANT_BT_STATUS_ACL_BUSY = 0x3,
|
||||
BT_8821A_2ANT_BT_STATUS_SCO_BUSY = 0x4,
|
||||
BT_8821A_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8821A_2ANT_BT_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8821a_2ant_coex_algo {
|
||||
BT_8821A_2ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8821A_2ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8821A_2ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8821A_2ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
|
||||
BT_8821A_2ANT_COEX_ALGO_PANEDR = 0x5,
|
||||
BT_8821A_2ANT_COEX_ALGO_PANHS = 0x6,
|
||||
BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
|
||||
BT_8821A_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
|
||||
BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
|
||||
BT_8821A_2ANT_COEX_ALGO_HID_A2DP = 0xa,
|
||||
BT_8821A_2ANT_COEX_ALGO_MAX = 0xb,
|
||||
};
|
||||
|
||||
struct coex_dm_8821a_2ant {
|
||||
/* fw mechanism */
|
||||
u8 pre_bt_dec_pwr_lvl;
|
||||
u8 cur_bt_dec_pwr_lvl;
|
||||
u8 pre_fw_dac_swing_lvl;
|
||||
u8 cur_fw_dac_swing_lvl;
|
||||
boolean cur_ignore_wlan_act;
|
||||
boolean pre_ignore_wlan_act;
|
||||
u8 pre_ps_tdma;
|
||||
u8 cur_ps_tdma;
|
||||
u8 ps_tdma_para[5];
|
||||
u8 ps_tdma_du_adj_type;
|
||||
boolean reset_tdma_adjust;
|
||||
boolean auto_tdma_adjust;
|
||||
boolean pre_ps_tdma_on;
|
||||
boolean cur_ps_tdma_on;
|
||||
boolean pre_bt_auto_report;
|
||||
boolean cur_bt_auto_report;
|
||||
|
||||
/* sw mechanism */
|
||||
boolean pre_rf_rx_lpf_shrink;
|
||||
boolean cur_rf_rx_lpf_shrink;
|
||||
u32 bt_rf_0x1e_backup;
|
||||
boolean pre_low_penalty_ra;
|
||||
boolean cur_low_penalty_ra;
|
||||
boolean pre_dac_swing_on;
|
||||
u32 pre_dac_swing_lvl;
|
||||
boolean cur_dac_swing_on;
|
||||
u32 cur_dac_swing_lvl;
|
||||
boolean pre_adc_back_off;
|
||||
boolean cur_adc_back_off;
|
||||
boolean pre_agc_table_en;
|
||||
boolean cur_agc_table_en;
|
||||
u32 pre_val0x6c0;
|
||||
u32 cur_val0x6c0;
|
||||
u32 pre_val0x6c4;
|
||||
u32 cur_val0x6c4;
|
||||
u32 pre_val0x6c8;
|
||||
u32 cur_val0x6c8;
|
||||
u8 pre_val0x6cc;
|
||||
u8 cur_val0x6cc;
|
||||
boolean limited_dig;
|
||||
|
||||
/* algorithm related */
|
||||
u8 pre_algorithm;
|
||||
u8 cur_algorithm;
|
||||
u8 bt_status;
|
||||
u8 wifi_chnl_info[3];
|
||||
|
||||
boolean need_recover0x948;
|
||||
u32 backup0x948;
|
||||
|
||||
u8 pre_lps;
|
||||
u8 cur_lps;
|
||||
u8 pre_rpwm;
|
||||
u8 cur_rpwm;
|
||||
};
|
||||
|
||||
struct coex_sta_8821a_2ant {
|
||||
boolean bt_disabled;
|
||||
boolean bt_link_exist;
|
||||
boolean sco_exist;
|
||||
boolean a2dp_exist;
|
||||
boolean hid_exist;
|
||||
boolean pan_exist;
|
||||
|
||||
boolean under_lps;
|
||||
boolean under_ips;
|
||||
u32 high_priority_tx;
|
||||
u32 high_priority_rx;
|
||||
u32 low_priority_tx;
|
||||
u32 low_priority_rx;
|
||||
u8 bt_rssi;
|
||||
boolean bt_tx_rx_mask;
|
||||
u8 pre_bt_rssi_state;
|
||||
u8 pre_wifi_rssi_state[4];
|
||||
boolean c2h_bt_info_req_sent;
|
||||
u8 bt_info_c2h[BT_INFO_SRC_8821A_2ANT_MAX][10];
|
||||
u32 bt_info_c2h_cnt[BT_INFO_SRC_8821A_2ANT_MAX];
|
||||
boolean bt_whck_test;
|
||||
boolean c2h_bt_inquiry_page;
|
||||
u8 bt_retry_cnt;
|
||||
u8 bt_info_ext;
|
||||
|
||||
u32 crc_ok_cck;
|
||||
u32 crc_ok_11g;
|
||||
u32 crc_ok_11n;
|
||||
u32 crc_ok_11n_agg;
|
||||
|
||||
u32 crc_err_cck;
|
||||
u32 crc_err_11g;
|
||||
u32 crc_err_11n;
|
||||
u32 crc_err_11n_agg;
|
||||
|
||||
u8 coex_table_type;
|
||||
boolean force_lps_on;
|
||||
|
||||
u8 dis_ver_info_cnt;
|
||||
};
|
||||
|
||||
/* *******************************************
|
||||
* The following is interface which will notify coex module.
|
||||
* ******************************************* */
|
||||
void ex_halbtc8821a2ant_power_on_setting(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821a2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821a2ant_init_hw_config(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only);
|
||||
void ex_halbtc8821a2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821a2ant_ips_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821a2ant_lps_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821a2ant_scan_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821a2ant_connect_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821a2ant_media_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821a2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821a2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8821a2ant_halt_notify(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821a2ant_pnp_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 pnp_state);
|
||||
void ex_halbtc8821a2ant_periodical(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821a2ant_display_coex_info(IN struct btc_coexist *btcoexist);
|
||||
|
||||
#else
|
||||
#define ex_halbtc8821a2ant_power_on_setting(btcoexist)
|
||||
#define ex_halbtc8821a2ant_pre_load_firmware(btcoexist)
|
||||
#define ex_halbtc8821a2ant_init_hw_config(btcoexist, wifi_only)
|
||||
#define ex_halbtc8821a2ant_init_coex_dm(btcoexist)
|
||||
#define ex_halbtc8821a2ant_ips_notify(btcoexist, type)
|
||||
#define ex_halbtc8821a2ant_lps_notify(btcoexist, type)
|
||||
#define ex_halbtc8821a2ant_scan_notify(btcoexist, type)
|
||||
#define ex_halbtc8821a2ant_connect_notify(btcoexist, type)
|
||||
#define ex_halbtc8821a2ant_media_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8821a2ant_specific_packet_notify(btcoexist, type)
|
||||
#define ex_halbtc8821a2ant_bt_info_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8821a2ant_halt_notify(btcoexist)
|
||||
#define ex_halbtc8821a2ant_pnp_notify(btcoexist, pnp_state)
|
||||
#define ex_halbtc8821a2ant_periodical(btcoexist)
|
||||
#define ex_halbtc8821a2ant_display_coex_info(btcoexist)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,188 @@
|
||||
|
||||
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
|
||||
|
||||
#if (RTL8821A_SUPPORT == 1)
|
||||
|
||||
/* *******************************************
|
||||
* The following is for 8821A_CSR 2Ant BT Co-exist definition
|
||||
* ******************************************* */
|
||||
#define BT_INFO_8821A_CSR_2ANT_B_FTP BIT(7)
|
||||
#define BT_INFO_8821A_CSR_2ANT_B_A2DP BIT(6)
|
||||
#define BT_INFO_8821A_CSR_2ANT_B_HID BIT(5)
|
||||
#define BT_INFO_8821A_CSR_2ANT_B_SCO_BUSY BIT(4)
|
||||
#define BT_INFO_8821A_CSR_2ANT_B_ACL_BUSY BIT(3)
|
||||
#define BT_INFO_8821A_CSR_2ANT_B_INQ_PAGE BIT(2)
|
||||
#define BT_INFO_8821A_CSR_2ANT_B_SCO_ESCO BIT(1)
|
||||
#define BT_INFO_8821A_CSR_2ANT_B_CONNECTION BIT(0)
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT 2
|
||||
|
||||
enum bt_info_src_8821a_csr_2ant {
|
||||
BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8821A_CSR_2ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8821A_CSR_2ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8821A_CSR_2ANT_MAX
|
||||
};
|
||||
|
||||
enum bt_8821a_csr_2ant_bt_status {
|
||||
BT_8821A_CSR_2ANT_BT_STATUS_IDLE = 0x0,
|
||||
BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE = 0x2,
|
||||
BT_8821A_CSR_2ANT_BT_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8821a_csr_2ant_coex_algo {
|
||||
BT_8821A_CSR_2ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8821A_CSR_2ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8821A_CSR_2ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8821A_CSR_2ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
|
||||
BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR = 0x5,
|
||||
BT_8821A_CSR_2ANT_COEX_ALGO_PANHS = 0x6,
|
||||
BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
|
||||
BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
|
||||
BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
|
||||
BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP = 0xa,
|
||||
BT_8821A_CSR_2ANT_COEX_ALGO_MAX = 0xb,
|
||||
};
|
||||
|
||||
struct coex_dm_8821a_csr_2ant {
|
||||
/* fw mechanism */
|
||||
boolean pre_dec_bt_pwr;
|
||||
boolean cur_dec_bt_pwr;
|
||||
u8 pre_fw_dac_swing_lvl;
|
||||
u8 cur_fw_dac_swing_lvl;
|
||||
boolean cur_ignore_wlan_act;
|
||||
boolean pre_ignore_wlan_act;
|
||||
u8 pre_ps_tdma;
|
||||
u8 cur_ps_tdma;
|
||||
u8 ps_tdma_para[6];
|
||||
u8 ps_tdma_du_adj_type;
|
||||
boolean reset_tdma_adjust;
|
||||
boolean pre_ps_tdma_on;
|
||||
boolean cur_ps_tdma_on;
|
||||
boolean pre_bt_auto_report;
|
||||
boolean cur_bt_auto_report;
|
||||
|
||||
/* sw mechanism */
|
||||
boolean pre_rf_rx_lpf_shrink;
|
||||
boolean cur_rf_rx_lpf_shrink;
|
||||
u32 bt_rf_0x1e_backup;
|
||||
boolean pre_low_penalty_ra;
|
||||
boolean cur_low_penalty_ra;
|
||||
boolean pre_dac_swing_on;
|
||||
u32 pre_dac_swing_lvl;
|
||||
boolean cur_dac_swing_on;
|
||||
u32 cur_dac_swing_lvl;
|
||||
boolean pre_adc_back_off;
|
||||
boolean cur_adc_back_off;
|
||||
boolean pre_agc_table_en;
|
||||
boolean cur_agc_table_en;
|
||||
u32 pre_val0x6c0;
|
||||
u32 cur_val0x6c0;
|
||||
u32 pre_val0x6c4;
|
||||
u32 cur_val0x6c4;
|
||||
u32 pre_val0x6c8;
|
||||
u32 cur_val0x6c8;
|
||||
u8 pre_val0x6cc;
|
||||
u8 cur_val0x6cc;
|
||||
boolean limited_dig;
|
||||
|
||||
u32 pre_ra_mask;
|
||||
u32 cur_ra_mask;
|
||||
|
||||
u8 cur_ampdu_num_type;
|
||||
u8 pre_ampdu_num_type;
|
||||
u16 backup_ampdu_max_num;
|
||||
|
||||
u8 cur_ampdu_time_type;
|
||||
u8 pre_ampdu_time_type;
|
||||
u8 backup_ampdu_max_time;
|
||||
|
||||
u8 cur_arfr_type;
|
||||
u8 pre_arfr_type;
|
||||
u32 backup_arfr_cnt1;
|
||||
u32 backup_arfr_cnt2;
|
||||
|
||||
u8 cur_retry_limit_type;
|
||||
u8 pre_retry_limit_type;
|
||||
u16 backup_retry_limit;
|
||||
|
||||
/* algorithm related */
|
||||
u8 pre_algorithm;
|
||||
u8 cur_algorithm;
|
||||
u8 bt_status;
|
||||
u8 wifi_chnl_info[3];
|
||||
};
|
||||
|
||||
struct coex_sta_8821a_csr_2ant {
|
||||
boolean bt_disabled;
|
||||
boolean bt_link_exist;
|
||||
boolean sco_exist;
|
||||
boolean a2dp_exist;
|
||||
boolean slave;
|
||||
boolean hid_exist;
|
||||
boolean pan_exist;
|
||||
|
||||
boolean under_lps;
|
||||
boolean under_ips;
|
||||
u32 high_priority_tx;
|
||||
u32 high_priority_rx;
|
||||
u32 low_priority_tx;
|
||||
u32 low_priority_rx;
|
||||
u8 bt_rssi;
|
||||
u8 pre_bt_rssi_state;
|
||||
u8 pre_wifi_rssi_state[4];
|
||||
boolean c2h_bt_info_req_sent;
|
||||
u8 bt_info_c2h[BT_INFO_SRC_8821A_CSR_2ANT_MAX][10];
|
||||
u32 bt_info_c2h_cnt[BT_INFO_SRC_8821A_CSR_2ANT_MAX];
|
||||
boolean c2h_bt_inquiry_page;
|
||||
u8 bt_retry_cnt;
|
||||
u8 bt_info_ext;
|
||||
};
|
||||
|
||||
/* *******************************************
|
||||
* The following is interface which will notify coex module.
|
||||
* ******************************************* */
|
||||
void ex_halbtc8821aCsr2ant_power_on_setting(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821aCsr2ant_init_hw_config(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only);
|
||||
void ex_halbtc8821aCsr2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821aCsr2ant_ips_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821aCsr2ant_lps_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821aCsr2ant_scan_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821aCsr2ant_connect_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821aCsr2ant_media_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821aCsr2ant_specific_packet_notify(IN struct btc_coexist
|
||||
*btcoexist, IN u8 type);
|
||||
void ex_halbtc8821aCsr2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8821aCsr2ant_halt_notify(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821aCsr2ant_pnp_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 pnp_state);
|
||||
void ex_halbtc8821aCsr2ant_periodical(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821aCsr2ant_display_coex_info(IN struct btc_coexist *btcoexist);
|
||||
|
||||
#else
|
||||
#define ex_halbtc8821aCsr2ant_power_on_setting(btcoexist)
|
||||
#define ex_halbtc8821aCsr2ant_init_hw_config(btcoexist, wifi_only)
|
||||
#define ex_halbtc8821aCsr2ant_init_coex_dm(btcoexist)
|
||||
#define ex_halbtc8821aCsr2ant_ips_notify(btcoexist, type)
|
||||
#define ex_halbtc8821aCsr2ant_lps_notify(btcoexist, type)
|
||||
#define ex_halbtc8821aCsr2ant_scan_notify(btcoexist, type)
|
||||
#define ex_halbtc8821aCsr2ant_connect_notify(btcoexist, type)
|
||||
#define ex_halbtc8821aCsr2ant_media_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8821aCsr2ant_specific_packet_notify(btcoexist, type)
|
||||
#define ex_halbtc8821aCsr2ant_bt_info_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8821aCsr2ant_halt_notify(btcoexist)
|
||||
#define ex_halbtc8821aCsr2ant_pnp_notify(btcoexist, pnp_state)
|
||||
#define ex_halbtc8821aCsr2ant_periodical(btcoexist)
|
||||
#define ex_halbtc8821aCsr2ant_display_coex_info(btcoexist)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,408 @@
|
||||
|
||||
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
|
||||
|
||||
#if (RTL8822B_SUPPORT == 1)
|
||||
|
||||
/* *******************************************
|
||||
* The following is for 8822B 1ANT BT Co-exist definition
|
||||
* ******************************************* */
|
||||
#define BT_AUTO_REPORT_ONLY_8822B_1ANT 1
|
||||
|
||||
#define BT_INFO_8822B_1ANT_B_FTP BIT(7)
|
||||
#define BT_INFO_8822B_1ANT_B_A2DP BIT(6)
|
||||
#define BT_INFO_8822B_1ANT_B_HID BIT(5)
|
||||
#define BT_INFO_8822B_1ANT_B_SCO_BUSY BIT(4)
|
||||
#define BT_INFO_8822B_1ANT_B_ACL_BUSY BIT(3)
|
||||
#define BT_INFO_8822B_1ANT_B_INQ_PAGE BIT(2)
|
||||
#define BT_INFO_8822B_1ANT_B_SCO_ESCO BIT(1)
|
||||
#define BT_INFO_8822B_1ANT_B_CONNECTION BIT(0)
|
||||
|
||||
#define BT_INFO_8822B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
|
||||
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8822B_1ANT 2
|
||||
|
||||
#define BT_8822B_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
|
||||
|
||||
/* for Antenna detection */
|
||||
#define BT_8822B_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
|
||||
#define BT_8822B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
|
||||
#define BT_8822B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
|
||||
#define BT_8822B_1ANT_ANTDET_PSDTHRES_1ANT 35
|
||||
#define BT_8822B_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
|
||||
#define BT_8822B_1ANT_ANTDET_ENABLE 0
|
||||
#define BT_8822B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 0
|
||||
|
||||
#define BT_8822B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
|
||||
#define BT_8822B_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
|
||||
|
||||
|
||||
enum bt_8822b_1ant_signal_state {
|
||||
BT_8822B_1ANT_SIG_STA_SET_TO_LOW = 0x0,
|
||||
BT_8822B_1ANT_SIG_STA_SET_BY_HW = 0x0,
|
||||
BT_8822B_1ANT_SIG_STA_SET_TO_HIGH = 0x1,
|
||||
BT_8822B_1ANT_SIG_STA_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_path_ctrl_owner {
|
||||
BT_8822B_1ANT_PCO_BTSIDE = 0x0,
|
||||
BT_8822B_1ANT_PCO_WLSIDE = 0x1,
|
||||
BT_8822B_1ANT_PCO_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_gnt_ctrl_type {
|
||||
BT_8822B_1ANT_GNT_CTRL_BY_PTA = 0x0,
|
||||
BT_8822B_1ANT_GNT_CTRL_BY_SW = 0x1,
|
||||
BT_8822B_1ANT_GNT_CTRL_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_gnt_ctrl_block {
|
||||
BT_8822B_1ANT_GNT_BLOCK_RFC_BB = 0x0,
|
||||
BT_8822B_1ANT_GNT_BLOCK_RFC = 0x1,
|
||||
BT_8822B_1ANT_GNT_BLOCK_BB = 0x2,
|
||||
BT_8822B_1ANT_GNT_BLOCK_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_lte_coex_table_type {
|
||||
BT_8822B_1ANT_CTT_WL_VS_LTE = 0x0,
|
||||
BT_8822B_1ANT_CTT_BT_VS_LTE = 0x1,
|
||||
BT_8822B_1ANT_CTT_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_lte_break_table_type {
|
||||
BT_8822B_1ANT_LBTT_WL_BREAK_LTE = 0x0,
|
||||
BT_8822B_1ANT_LBTT_BT_BREAK_LTE = 0x1,
|
||||
BT_8822B_1ANT_LBTT_LTE_BREAK_WL = 0x2,
|
||||
BT_8822B_1ANT_LBTT_LTE_BREAK_BT = 0x3,
|
||||
BT_8822B_1ANT_LBTT_MAX
|
||||
};
|
||||
|
||||
enum bt_info_src_8822b_1ant {
|
||||
BT_INFO_SRC_8822B_1ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8822B_1ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8822B_1ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8822B_1ANT_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_bt_status {
|
||||
BT_8822B_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8822B_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8822B_1ANT_BT_STATUS_INQ_PAGE = 0x2,
|
||||
BT_8822B_1ANT_BT_STATUS_ACL_BUSY = 0x3,
|
||||
BT_8822B_1ANT_BT_STATUS_SCO_BUSY = 0x4,
|
||||
BT_8822B_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8822B_1ANT_BT_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_wifi_status {
|
||||
BT_8822B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8822B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
|
||||
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
|
||||
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
|
||||
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
|
||||
BT_8822B_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
|
||||
BT_8822B_1ANT_WIFI_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_coex_algo {
|
||||
BT_8822B_1ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8822B_1ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8822B_1ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8822B_1ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8822B_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
|
||||
BT_8822B_1ANT_COEX_ALGO_PANEDR = 0x5,
|
||||
BT_8822B_1ANT_COEX_ALGO_PANHS = 0x6,
|
||||
BT_8822B_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
|
||||
BT_8822B_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
|
||||
BT_8822B_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
|
||||
BT_8822B_1ANT_COEX_ALGO_HID_A2DP = 0xa,
|
||||
BT_8822B_1ANT_COEX_ALGO_MAX = 0xb,
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_ext_ant_switch_type {
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SPDT = 0x0,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SP3T = 0x1,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_ext_ant_switch_ctrl_type {
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_ext_ant_switch_pos_type {
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_BT = 0x0,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_WLG = 0x1,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_WLA = 0x2,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_NOCARE = 0x3,
|
||||
BT_8822B_1ANT_EXT_ANT_SWITCH_TO_MAX
|
||||
};
|
||||
|
||||
enum bt_8822b_1ant_phase{
|
||||
BT_8822B_1ANT_PHASE_COEX_INIT = 0x0,
|
||||
BT_8822B_1ANT_PHASE_WLANONLY_INIT = 0x1,
|
||||
BT_8822B_1ANT_PHASE_WLAN_OFF = 0x2,
|
||||
BT_8822B_1ANT_PHASE_2G_RUNTIME = 0x3,
|
||||
BT_8822B_1ANT_PHASE_5G_RUNTIME = 0x4,
|
||||
BT_8822B_1ANT_PHASE_BTMPMODE = 0x5,
|
||||
BT_8822B_1ANT_PHASE_MAX
|
||||
};
|
||||
|
||||
|
||||
struct coex_dm_8822b_1ant {
|
||||
/* hw setting */
|
||||
u32 pre_ant_pos_type;
|
||||
u32 cur_ant_pos_type;
|
||||
/* fw mechanism */
|
||||
boolean cur_ignore_wlan_act;
|
||||
boolean pre_ignore_wlan_act;
|
||||
u8 pre_ps_tdma;
|
||||
u8 cur_ps_tdma;
|
||||
u8 ps_tdma_para[5];
|
||||
u8 ps_tdma_du_adj_type;
|
||||
boolean auto_tdma_adjust;
|
||||
boolean pre_ps_tdma_on;
|
||||
boolean cur_ps_tdma_on;
|
||||
boolean pre_bt_auto_report;
|
||||
boolean cur_bt_auto_report;
|
||||
u8 pre_lps;
|
||||
u8 cur_lps;
|
||||
u8 pre_rpwm;
|
||||
u8 cur_rpwm;
|
||||
|
||||
/* sw mechanism */
|
||||
boolean pre_low_penalty_ra;
|
||||
boolean cur_low_penalty_ra;
|
||||
u32 pre_val0x6c0;
|
||||
u32 cur_val0x6c0;
|
||||
u32 pre_val0x6c4;
|
||||
u32 cur_val0x6c4;
|
||||
u32 pre_val0x6c8;
|
||||
u32 cur_val0x6c8;
|
||||
u8 pre_val0x6cc;
|
||||
u8 cur_val0x6cc;
|
||||
boolean limited_dig;
|
||||
|
||||
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
|
||||
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
|
||||
u16 backup_retry_limit;
|
||||
u8 backup_ampdu_max_time;
|
||||
|
||||
/* algorithm related */
|
||||
u8 pre_algorithm;
|
||||
u8 cur_algorithm;
|
||||
u8 bt_status;
|
||||
u8 wifi_chnl_info[3];
|
||||
|
||||
u32 pre_ra_mask;
|
||||
u32 cur_ra_mask;
|
||||
u8 pre_arfr_type;
|
||||
u8 cur_arfr_type;
|
||||
u8 pre_retry_limit_type;
|
||||
u8 cur_retry_limit_type;
|
||||
u8 pre_ampdu_time_type;
|
||||
u8 cur_ampdu_time_type;
|
||||
u32 arp_cnt;
|
||||
|
||||
u32 pre_ext_ant_switch_status;
|
||||
u32 cur_ext_ant_switch_status;
|
||||
|
||||
u8 error_condition;
|
||||
};
|
||||
|
||||
struct coex_sta_8822b_1ant {
|
||||
boolean bt_disabled;
|
||||
boolean bt_link_exist;
|
||||
boolean sco_exist;
|
||||
boolean a2dp_exist;
|
||||
boolean hid_exist;
|
||||
boolean pan_exist;
|
||||
boolean bt_hi_pri_link_exist;
|
||||
u8 num_of_profile;
|
||||
|
||||
boolean under_lps;
|
||||
boolean under_ips;
|
||||
u32 specific_pkt_period_cnt;
|
||||
u32 high_priority_tx;
|
||||
u32 high_priority_rx;
|
||||
u32 low_priority_tx;
|
||||
u32 low_priority_rx;
|
||||
s8 bt_rssi;
|
||||
boolean bt_tx_rx_mask;
|
||||
u8 pre_bt_rssi_state;
|
||||
u8 pre_wifi_rssi_state[4];
|
||||
boolean c2h_bt_info_req_sent;
|
||||
u8 bt_info_c2h[BT_INFO_SRC_8822B_1ANT_MAX][10];
|
||||
u32 bt_info_c2h_cnt[BT_INFO_SRC_8822B_1ANT_MAX];
|
||||
boolean bt_whck_test;
|
||||
boolean c2h_bt_inquiry_page;
|
||||
boolean c2h_bt_page; /* Add for win8.1 page out issue */
|
||||
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
|
||||
u8 bt_retry_cnt;
|
||||
u8 bt_info_ext;
|
||||
u32 pop_event_cnt;
|
||||
u8 scan_ap_num;
|
||||
|
||||
u32 crc_ok_cck;
|
||||
u32 crc_ok_11g;
|
||||
u32 crc_ok_11n;
|
||||
u32 crc_ok_11n_agg;
|
||||
|
||||
u32 crc_err_cck;
|
||||
u32 crc_err_11g;
|
||||
u32 crc_err_11n;
|
||||
u32 crc_err_11n_agg;
|
||||
|
||||
boolean cck_lock;
|
||||
boolean pre_ccklock;
|
||||
boolean cck_ever_lock;
|
||||
u8 coex_table_type;
|
||||
|
||||
boolean force_lps_on;
|
||||
u32 wrong_profile_notification;
|
||||
|
||||
boolean concurrent_rx_mode_on;
|
||||
|
||||
u32 special_pkt_period_cnt;
|
||||
|
||||
u16 score_board;
|
||||
|
||||
u8 a2dp_bit_pool;
|
||||
u8 cut_version;
|
||||
boolean acl_busy;
|
||||
boolean wl_rf_off_on_event;
|
||||
boolean bt_create_connection;
|
||||
boolean run_time_state;
|
||||
|
||||
u32 bt_coex_supported_feature;
|
||||
u32 bt_coex_supported_version;
|
||||
};
|
||||
|
||||
struct rfe_type_8822b_1ant{
|
||||
|
||||
u8 rfe_module_type;
|
||||
boolean ext_ant_switch_exist;
|
||||
u8 ext_ant_switch_type;
|
||||
u8 ext_ant_switch_ctrl_polarity; /* iF 0: ANTSW(rfe_sel9)=0, ANTSWB(rfe_sel8)=1 => Ant to BT/5G */
|
||||
};
|
||||
|
||||
|
||||
#define BT_8822B_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
|
||||
#define BT_8822B_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
|
||||
#define BT_8822B_1ANT_ANTDET_BUF_LEN 16
|
||||
|
||||
struct psdscan_sta_8822b_1ant {
|
||||
|
||||
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
|
||||
u32 ant_det_bt_tx_time;
|
||||
u32 ant_det_pre_psdscan_peak_val;
|
||||
boolean ant_det_is_ant_det_available;
|
||||
u32 ant_det_psd_scan_peak_val;
|
||||
boolean ant_det_is_btreply_available;
|
||||
u32 ant_det_psd_scan_peak_freq;
|
||||
|
||||
u8 ant_det_result;
|
||||
u8 ant_det_peak_val[BT_8822B_1ANT_ANTDET_BUF_LEN];
|
||||
u8 ant_det_peak_freq[BT_8822B_1ANT_ANTDET_BUF_LEN];
|
||||
u32 ant_det_try_count;
|
||||
u32 ant_det_fail_count;
|
||||
u32 ant_det_inteval_count;
|
||||
u32 ant_det_thres_offset;
|
||||
|
||||
u32 real_cent_freq;
|
||||
s32 real_offset;
|
||||
u32 real_span;
|
||||
|
||||
u32 psd_band_width; /* unit: Hz */
|
||||
u32 psd_point; /* 128/256/512/1024 */
|
||||
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_start_point;
|
||||
u32 psd_stop_point;
|
||||
u32 psd_max_value_point;
|
||||
u32 psd_max_value;
|
||||
u32 psd_start_base;
|
||||
u32 psd_avg_num; /* 1/8/16/32 */
|
||||
u32 psd_gen_count;
|
||||
boolean is_psd_running;
|
||||
boolean is_psd_show_max_only;
|
||||
};
|
||||
|
||||
/* *******************************************
|
||||
* The following is interface which will notify coex module.
|
||||
* ******************************************* */
|
||||
void ex_halbtc8822b1ant_power_on_setting(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only);
|
||||
void ex_halbtc8822b1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b1ant_ips_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_lps_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_scan_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_switchband_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_connect_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8822b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8822b1ant_halt_notify(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 pnp_state);
|
||||
void ex_halbtc8822b1ant_ScoreBoardStatusNotify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8822b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b1ant_periodical(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8822b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
void ex_halbtc8822b1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
|
||||
void ex_halbtc8822b1ant_psd_scan(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
void ex_halbtc8822b1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
|
||||
|
||||
void ex_halbtc8822b1ant_dbg_control(IN struct btc_coexist *btcoexist,
|
||||
IN u8 op_code, IN u8 op_len, IN u8 *pdata);
|
||||
|
||||
#else
|
||||
#define ex_halbtc8822b1ant_power_on_setting(btcoexist)
|
||||
#define ex_halbtc8822b1ant_pre_load_firmware(btcoexist)
|
||||
#define ex_halbtc8822b1ant_init_hw_config(btcoexist, wifi_only)
|
||||
#define ex_halbtc8822b1ant_init_coex_dm(btcoexist)
|
||||
#define ex_halbtc8822b1ant_ips_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_lps_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_scan_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_switchband_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_connect_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_media_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_specific_packet_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_bt_info_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8822b1ant_rf_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8822b1ant_halt_notify(btcoexist)
|
||||
#define ex_halbtc8822b1ant_pnp_notify(btcoexist, pnp_state)
|
||||
#define ex_halbtc8822b1ant_ScoreBoardStatusNotify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8822b1ant_coex_dm_reset(btcoexist)
|
||||
#define ex_halbtc8822b1ant_periodical(btcoexist)
|
||||
#define ex_halbtc8822b1ant_display_coex_info(btcoexist)
|
||||
#define ex_halbtc8822b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
|
||||
#define ex_halbtc8822b1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
|
||||
#define ex_halbtc8822b1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
|
||||
#define ex_halbtc8822b1ant_display_ant_detection(btcoexist)
|
||||
#define ex_halbtc8822b1ant_dbg_control(btcoexist, op_code, op_len, pdata)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,89 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2013 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef __MP_PRECOMP_H__
|
||||
#define __MP_PRECOMP_H__
|
||||
|
||||
#include <drv_types.h>
|
||||
#include <hal_data.h>
|
||||
|
||||
#define BT_TMP_BUF_SIZE 100
|
||||
|
||||
#ifdef PLATFORM_LINUX
|
||||
#define rsprintf snprintf
|
||||
#elif defined(PLATFORM_WINDOWS)
|
||||
#define rsprintf sprintf_s
|
||||
#endif
|
||||
|
||||
#define DCMD_Printf DBG_BT_INFO
|
||||
|
||||
#define delay_ms(ms) rtw_mdelay_os(ms)
|
||||
|
||||
#ifdef bEnable
|
||||
#undef bEnable
|
||||
#endif
|
||||
|
||||
#define WPP_SOFTWARE_TRACE 0
|
||||
|
||||
typedef enum _BTC_MSG_COMP_TYPE{
|
||||
COMP_COEX = 0,
|
||||
COMP_MAX
|
||||
}BTC_MSG_COMP_TYPE;
|
||||
extern u4Byte GLBtcDbgType[];
|
||||
|
||||
#define DBG_OFF 0
|
||||
#define DBG_SEC 1
|
||||
#define DBG_SERIOUS 2
|
||||
#define DBG_WARNING 3
|
||||
#define DBG_LOUD 4
|
||||
#define DBG_TRACE 5
|
||||
|
||||
#ifdef CONFIG_BT_COEXIST
|
||||
#define BT_SUPPORT 1
|
||||
#define COEX_SUPPORT 1
|
||||
#define HS_SUPPORT 1
|
||||
#else
|
||||
#define BT_SUPPORT 0
|
||||
#define COEX_SUPPORT 0
|
||||
#define HS_SUPPORT 0
|
||||
#endif
|
||||
|
||||
#include "HalBtcOutSrc.h"
|
||||
#include "HalBtc8188c2Ant.h"
|
||||
#include "HalBtc8192d2Ant.h"
|
||||
#include "HalBtc8192e1Ant.h"
|
||||
#include "HalBtc8192e2Ant.h"
|
||||
#include "HalBtc8723a1Ant.h"
|
||||
#include "HalBtc8723a2Ant.h"
|
||||
#include "HalBtc8723b1Ant.h"
|
||||
#include "HalBtc8723b2Ant.h"
|
||||
#include "HalBtc8812a1Ant.h"
|
||||
#include "HalBtc8812a2Ant.h"
|
||||
#include "HalBtc8821a1Ant.h"
|
||||
#include "HalBtc8821a2Ant.h"
|
||||
#include "HalBtc8821aCsr2Ant.h"
|
||||
#include "HalBtc8703b1Ant.h"
|
||||
#include "halbtc8723d1ant.h"
|
||||
#include "halbtc8723d2ant.h"
|
||||
#include "HalBtc8822b1Ant.h"
|
||||
#include "halbtc8821c1ant.h"
|
||||
#include "halbtc8821c2ant.h"
|
||||
|
||||
|
||||
#endif // __MP_PRECOMP_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,413 @@
|
||||
|
||||
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
|
||||
|
||||
#if (RTL8723D_SUPPORT == 1)
|
||||
|
||||
/* *******************************************
|
||||
* The following is for 8723D 1ANT BT Co-exist definition
|
||||
* ******************************************* */
|
||||
#define BT_8723D_1ANT_COEX_DBG 0
|
||||
#define BT_AUTO_REPORT_ONLY_8723D_1ANT 1
|
||||
|
||||
#define BT_INFO_8723D_1ANT_B_FTP BIT(7)
|
||||
#define BT_INFO_8723D_1ANT_B_A2DP BIT(6)
|
||||
#define BT_INFO_8723D_1ANT_B_HID BIT(5)
|
||||
#define BT_INFO_8723D_1ANT_B_SCO_BUSY BIT(4)
|
||||
#define BT_INFO_8723D_1ANT_B_ACL_BUSY BIT(3)
|
||||
#define BT_INFO_8723D_1ANT_B_INQ_PAGE BIT(2)
|
||||
#define BT_INFO_8723D_1ANT_B_SCO_ESCO BIT(1)
|
||||
#define BT_INFO_8723D_1ANT_B_CONNECTION BIT(0)
|
||||
|
||||
#define BT_INFO_8723D_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
|
||||
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT 2
|
||||
|
||||
#define BT_8723D_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
|
||||
#define BT_8723D_1ANT_DEFAULT_ISOLATION 15 /* unit: dB */
|
||||
|
||||
|
||||
/* for Antenna detection */
|
||||
#define BT_8723D_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
|
||||
#define BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
|
||||
#define BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
|
||||
#define BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT 35
|
||||
#define BT_8723D_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
|
||||
#define BT_8723D_1ANT_ANTDET_SWEEPPOINT_DELAY 60000
|
||||
#define BT_8723D_1ANT_ANTDET_ENABLE 1
|
||||
#define BT_8723D_1ANT_ANTDET_BTTXTIME 100
|
||||
#define BT_8723D_1ANT_ANTDET_BTTXCHANNEL 39
|
||||
#define BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT 50
|
||||
|
||||
#define BT_8723D_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
|
||||
|
||||
enum bt_8723d_1ant_signal_state {
|
||||
BT_8723D_1ANT_SIG_STA_SET_TO_LOW = 0x0,
|
||||
BT_8723D_1ANT_SIG_STA_SET_BY_HW = 0x0,
|
||||
BT_8723D_1ANT_SIG_STA_SET_TO_HIGH = 0x1,
|
||||
BT_8723D_1ANT_SIG_STA_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_1ant_path_ctrl_owner {
|
||||
BT_8723D_1ANT_PCO_BTSIDE = 0x0,
|
||||
BT_8723D_1ANT_PCO_WLSIDE = 0x1,
|
||||
BT_8723D_1ANT_PCO_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_1ant_gnt_ctrl_type {
|
||||
BT_8723D_1ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
|
||||
BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
|
||||
BT_8723D_1ANT_GNT_TYPE_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_1ant_gnt_ctrl_block {
|
||||
BT_8723D_1ANT_GNT_BLOCK_RFC_BB = 0x0,
|
||||
BT_8723D_1ANT_GNT_BLOCK_RFC = 0x1,
|
||||
BT_8723D_1ANT_GNT_BLOCK_BB = 0x2,
|
||||
BT_8723D_1ANT_GNT_BLOCK_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_1ant_lte_coex_table_type {
|
||||
BT_8723D_1ANT_CTT_WL_VS_LTE = 0x0,
|
||||
BT_8723D_1ANT_CTT_BT_VS_LTE = 0x1,
|
||||
BT_8723D_1ANT_CTT_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_1ant_lte_break_table_type {
|
||||
BT_8723D_1ANT_LBTT_WL_BREAK_LTE = 0x0,
|
||||
BT_8723D_1ANT_LBTT_BT_BREAK_LTE = 0x1,
|
||||
BT_8723D_1ANT_LBTT_LTE_BREAK_WL = 0x2,
|
||||
BT_8723D_1ANT_LBTT_LTE_BREAK_BT = 0x3,
|
||||
BT_8723D_1ANT_LBTT_MAX
|
||||
};
|
||||
|
||||
enum bt_info_src_8723d_1ant {
|
||||
BT_INFO_SRC_8723D_1ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8723D_1ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8723D_1ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8723D_1ANT_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_1ant_bt_status {
|
||||
BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8723D_1ANT_BT_STATUS_INQ_PAGE = 0x2,
|
||||
BT_8723D_1ANT_BT_STATUS_ACL_BUSY = 0x3,
|
||||
BT_8723D_1ANT_BT_STATUS_SCO_BUSY = 0x4,
|
||||
BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8723D_1ANT_BT_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_1ant_wifi_status {
|
||||
BT_8723D_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8723D_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
|
||||
BT_8723D_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
|
||||
BT_8723D_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
|
||||
BT_8723D_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
|
||||
BT_8723D_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
|
||||
BT_8723D_1ANT_WIFI_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_1ant_coex_algo {
|
||||
BT_8723D_1ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8723D_1ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8723D_1ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8723D_1ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8723D_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
|
||||
BT_8723D_1ANT_COEX_ALGO_PANEDR = 0x5,
|
||||
BT_8723D_1ANT_COEX_ALGO_PANHS = 0x6,
|
||||
BT_8723D_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
|
||||
BT_8723D_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
|
||||
BT_8723D_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
|
||||
BT_8723D_1ANT_COEX_ALGO_HID_A2DP = 0xa,
|
||||
BT_8723D_1ANT_COEX_ALGO_MAX = 0xb,
|
||||
};
|
||||
|
||||
enum bt_8723d_1ant_phase {
|
||||
BT_8723D_1ANT_PHASE_COEX_INIT = 0x0,
|
||||
BT_8723D_1ANT_PHASE_WLANONLY_INIT = 0x1,
|
||||
BT_8723D_1ANT_PHASE_WLAN_OFF = 0x2,
|
||||
BT_8723D_1ANT_PHASE_2G_RUNTIME = 0x3,
|
||||
BT_8723D_1ANT_PHASE_5G_RUNTIME = 0x4,
|
||||
BT_8723D_1ANT_PHASE_BTMPMODE = 0x5,
|
||||
BT_8723D_1ANT_PHASE_ANTENNA_DET = 0x6,
|
||||
BT_8723D_1ANT_PHASE_COEX_POWERON = 0x7,
|
||||
BT_8723D_1ANT_PHASE_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_1ant_Scoreboard {
|
||||
BT_8723D_1ANT_SCOREBOARD_ACTIVE = BIT(0),
|
||||
BT_8723D_1ANT_SCOREBOARD_ONOFF = BIT(1),
|
||||
BT_8723D_1ANT_SCOREBOARD_SCAN = BIT(2),
|
||||
BT_8723D_1ANT_SCOREBOARD_UNDERTEST = BIT(3),
|
||||
BT_8723D_1ANT_SCOREBOARD_WLBUSY = BIT(6)
|
||||
};
|
||||
|
||||
struct coex_dm_8723d_1ant {
|
||||
/* hw setting */
|
||||
u8 pre_ant_pos_type;
|
||||
u8 cur_ant_pos_type;
|
||||
/* fw mechanism */
|
||||
boolean cur_ignore_wlan_act;
|
||||
boolean pre_ignore_wlan_act;
|
||||
u8 pre_ps_tdma;
|
||||
u8 cur_ps_tdma;
|
||||
u8 ps_tdma_para[5];
|
||||
u8 ps_tdma_du_adj_type;
|
||||
boolean pre_ps_tdma_on;
|
||||
boolean cur_ps_tdma_on;
|
||||
boolean pre_bt_auto_report;
|
||||
boolean cur_bt_auto_report;
|
||||
u8 pre_lps;
|
||||
u8 cur_lps;
|
||||
u8 pre_rpwm;
|
||||
u8 cur_rpwm;
|
||||
|
||||
/* sw mechanism */
|
||||
boolean pre_low_penalty_ra;
|
||||
boolean cur_low_penalty_ra;
|
||||
u32 pre_val0x6c0;
|
||||
u32 cur_val0x6c0;
|
||||
u32 pre_val0x6c4;
|
||||
u32 cur_val0x6c4;
|
||||
u32 pre_val0x6c8;
|
||||
u32 cur_val0x6c8;
|
||||
u8 pre_val0x6cc;
|
||||
u8 cur_val0x6cc;
|
||||
boolean limited_dig;
|
||||
|
||||
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
|
||||
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
|
||||
u16 backup_retry_limit;
|
||||
u8 backup_ampdu_max_time;
|
||||
|
||||
/* algorithm related */
|
||||
u8 pre_algorithm;
|
||||
u8 cur_algorithm;
|
||||
u8 bt_status;
|
||||
u8 wifi_chnl_info[3];
|
||||
|
||||
u32 pre_ra_mask;
|
||||
u32 cur_ra_mask;
|
||||
u8 pre_arfr_type;
|
||||
u8 cur_arfr_type;
|
||||
u8 pre_retry_limit_type;
|
||||
u8 cur_retry_limit_type;
|
||||
u8 pre_ampdu_time_type;
|
||||
u8 cur_ampdu_time_type;
|
||||
u32 arp_cnt;
|
||||
|
||||
u8 error_condition;
|
||||
};
|
||||
|
||||
struct coex_sta_8723d_1ant {
|
||||
boolean bt_disabled;
|
||||
boolean bt_link_exist;
|
||||
boolean sco_exist;
|
||||
boolean a2dp_exist;
|
||||
boolean hid_exist;
|
||||
boolean pan_exist;
|
||||
boolean bt_hi_pri_link_exist;
|
||||
u8 num_of_profile;
|
||||
|
||||
boolean under_lps;
|
||||
boolean under_ips;
|
||||
u32 specific_pkt_period_cnt;
|
||||
u32 high_priority_tx;
|
||||
u32 high_priority_rx;
|
||||
u32 low_priority_tx;
|
||||
u32 low_priority_rx;
|
||||
boolean is_hiPri_rx_overhead;
|
||||
s8 bt_rssi;
|
||||
boolean bt_tx_rx_mask;
|
||||
u8 pre_bt_rssi_state;
|
||||
u8 pre_wifi_rssi_state[4];
|
||||
u8 bt_info_c2h[BT_INFO_SRC_8723D_1ANT_MAX][10];
|
||||
u32 bt_info_c2h_cnt[BT_INFO_SRC_8723D_1ANT_MAX];
|
||||
boolean bt_whck_test;
|
||||
boolean c2h_bt_inquiry_page;
|
||||
boolean c2h_bt_remote_name_req;
|
||||
boolean c2h_bt_page; /* Add for win8.1 page out issue */
|
||||
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
|
||||
u8 bt_retry_cnt;
|
||||
u8 bt_info_ext;
|
||||
u8 bt_info_ext2;
|
||||
u32 pop_event_cnt;
|
||||
u8 scan_ap_num;
|
||||
|
||||
u32 crc_ok_cck;
|
||||
u32 crc_ok_11g;
|
||||
u32 crc_ok_11n;
|
||||
u32 crc_ok_11n_vht;
|
||||
|
||||
u32 crc_err_cck;
|
||||
u32 crc_err_11g;
|
||||
u32 crc_err_11n;
|
||||
u32 crc_err_11n_vht;
|
||||
|
||||
boolean cck_lock;
|
||||
boolean pre_ccklock;
|
||||
boolean cck_ever_lock;
|
||||
u8 coex_table_type;
|
||||
|
||||
boolean force_lps_on;
|
||||
|
||||
boolean concurrent_rx_mode_on;
|
||||
|
||||
u16 score_board;
|
||||
u8 isolation_btween_wb; /* 0~ 50 */
|
||||
|
||||
u8 a2dp_bit_pool;
|
||||
u8 cut_version;
|
||||
boolean acl_busy;
|
||||
boolean bt_create_connection;
|
||||
|
||||
u32 bt_coex_supported_feature;
|
||||
u32 bt_coex_supported_version;
|
||||
|
||||
u8 bt_ble_scan_type;
|
||||
u32 bt_ble_scan_para[3];
|
||||
|
||||
boolean run_time_state;
|
||||
boolean freeze_coexrun_by_btinfo;
|
||||
|
||||
boolean is_A2DP_3M;
|
||||
boolean voice_over_HOGP;
|
||||
u8 bt_info;
|
||||
boolean is_autoslot;
|
||||
u8 forbidden_slot;
|
||||
u8 hid_busy_num;
|
||||
u8 hid_pair_cnt;
|
||||
|
||||
u32 cnt_RemoteNameReq;
|
||||
u32 cnt_setupLink;
|
||||
u32 cnt_ReInit;
|
||||
u32 cnt_IgnWlanAct;
|
||||
u32 cnt_Page;
|
||||
u32 cnt_RoleSwitch;
|
||||
|
||||
u16 bt_reg_vendor_ac;
|
||||
u16 bt_reg_vendor_ae;
|
||||
|
||||
boolean is_setupLink;
|
||||
u8 wl_noisy_level;
|
||||
u32 gnt_error_cnt;
|
||||
|
||||
u8 bt_afh_map[10];
|
||||
u8 bt_relink_downcount;
|
||||
boolean is_tdma_btautoslot;
|
||||
boolean is_tdma_btautoslot_hang;
|
||||
};
|
||||
|
||||
#define BT_8723D_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
|
||||
#define BT_8723D_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
|
||||
#define BT_8723D_1ANT_ANTDET_BUF_LEN 16
|
||||
|
||||
struct psdscan_sta_8723d_1ant {
|
||||
|
||||
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
|
||||
u32 ant_det_bt_tx_time;
|
||||
u32 ant_det_pre_psdscan_peak_val;
|
||||
boolean ant_det_is_ant_det_available;
|
||||
u32 ant_det_psd_scan_peak_val;
|
||||
boolean ant_det_is_btreply_available;
|
||||
u32 ant_det_psd_scan_peak_freq;
|
||||
|
||||
u8 ant_det_result;
|
||||
u8 ant_det_peak_val[BT_8723D_1ANT_ANTDET_BUF_LEN];
|
||||
u8 ant_det_peak_freq[BT_8723D_1ANT_ANTDET_BUF_LEN];
|
||||
u32 ant_det_try_count;
|
||||
u32 ant_det_fail_count;
|
||||
u32 ant_det_inteval_count;
|
||||
u32 ant_det_thres_offset;
|
||||
|
||||
u32 real_cent_freq;
|
||||
s32 real_offset;
|
||||
u32 real_span;
|
||||
|
||||
u32 psd_band_width; /* unit: Hz */
|
||||
u32 psd_point; /* 128/256/512/1024 */
|
||||
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_start_point;
|
||||
u32 psd_stop_point;
|
||||
u32 psd_max_value_point;
|
||||
u32 psd_max_value;
|
||||
u32 psd_max_value2;
|
||||
u32 psd_avg_value; /* filter loop_max_value that below BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
|
||||
u32 psd_loop_max_value[BT_8723D_1ANT_ANTDET_PSD_SWWEEPCOUNT]; /*max value in each loop */
|
||||
u32 psd_start_base;
|
||||
u32 psd_avg_num; /* 1/8/16/32 */
|
||||
u32 psd_gen_count;
|
||||
boolean is_AntDet_running;
|
||||
boolean is_psd_show_max_only;
|
||||
};
|
||||
|
||||
/* *******************************************
|
||||
* The following is interface which will notify coex module.
|
||||
* ******************************************* */
|
||||
void ex_halbtc8723d1ant_power_on_setting(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723d1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723d1ant_init_hw_config(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only);
|
||||
void ex_halbtc8723d1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723d1ant_ips_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723d1ant_lps_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723d1ant_scan_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723d1ant_connect_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723d1ant_media_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723d1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723d1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8723d1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723d1ant_halt_notify(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723d1ant_pnp_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 pnp_state);
|
||||
void ex_halbtc8723d1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723d1ant_periodical(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723d1ant_set_antenna_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723d1ant_antenna_detection(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
void ex_halbtc8723d1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
|
||||
void ex_halbtc8723d1ant_psd_scan(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
void ex_halbtc8723d1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
|
||||
|
||||
#else
|
||||
#define ex_halbtc8723d1ant_power_on_setting(btcoexist)
|
||||
#define ex_halbtc8723d1ant_pre_load_firmware(btcoexist)
|
||||
#define ex_halbtc8723d1ant_init_hw_config(btcoexist, wifi_only)
|
||||
#define ex_halbtc8723d1ant_init_coex_dm(btcoexist)
|
||||
#define ex_halbtc8723d1ant_ips_notify(btcoexist, type)
|
||||
#define ex_halbtc8723d1ant_lps_notify(btcoexist, type)
|
||||
#define ex_halbtc8723d1ant_scan_notify(btcoexist, type)
|
||||
#define ex_halbtc8723d1ant_connect_notify(btcoexist, type)
|
||||
#define ex_halbtc8723d1ant_media_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8723d1ant_specific_packet_notify(btcoexist, type)
|
||||
#define ex_halbtc8723d1ant_bt_info_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8723d1ant_rf_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8723d1ant_halt_notify(btcoexist)
|
||||
#define ex_halbtc8723d1ant_pnp_notify(btcoexist, pnp_state)
|
||||
#define ex_halbtc8723d1ant_coex_dm_reset(btcoexist)
|
||||
#define ex_halbtc8723d1ant_periodical(btcoexist)
|
||||
#define ex_halbtc8723d1ant_display_coex_info(btcoexist)
|
||||
#define ex_halbtc8723d1ant_set_antenna_notify(btcoexist, type)
|
||||
#define ex_halbtc8723d1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
|
||||
#define ex_halbtc8723d1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
|
||||
#define ex_halbtc8723d1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
|
||||
#define ex_halbtc8723d1ant_display_ant_detection(btcoexist)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,420 @@
|
||||
|
||||
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
|
||||
|
||||
#if (RTL8723D_SUPPORT == 1)
|
||||
|
||||
/* *******************************************
|
||||
* The following is for 8723D 2Ant BT Co-exist definition
|
||||
* ******************************************* */
|
||||
#define BT_8723D_2ANT_COEX_DBG 0
|
||||
#define BT_AUTO_REPORT_ONLY_8723D_2ANT 1
|
||||
|
||||
|
||||
#define BT_INFO_8723D_2ANT_B_FTP BIT(7)
|
||||
#define BT_INFO_8723D_2ANT_B_A2DP BIT(6)
|
||||
#define BT_INFO_8723D_2ANT_B_HID BIT(5)
|
||||
#define BT_INFO_8723D_2ANT_B_SCO_BUSY BIT(4)
|
||||
#define BT_INFO_8723D_2ANT_B_ACL_BUSY BIT(3)
|
||||
#define BT_INFO_8723D_2ANT_B_INQ_PAGE BIT(2)
|
||||
#define BT_INFO_8723D_2ANT_B_SCO_ESCO BIT(1)
|
||||
#define BT_INFO_8723D_2ANT_B_CONNECTION BIT(0)
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT 2
|
||||
|
||||
|
||||
#define BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 80 /* unit: % WiFi RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 42 */
|
||||
#define BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1 80 /* unit: % BT RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 46 */
|
||||
#define BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES2 80 /* unit: % WiFi RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 42 */
|
||||
#define BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES2 80 /* unit: % BT RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 46 */
|
||||
#define BT_8723D_2ANT_DEFAULT_ISOLATION 15 /* unit: dB */
|
||||
#define BT_8723D_2ANT_WIFI_MAX_TX_POWER 15 /* unit: dBm */
|
||||
#define BT_8723D_2ANT_BT_MAX_TX_POWER 3 /* unit: dBm */
|
||||
#define BT_8723D_2ANT_WIFI_SIR_THRES1 -15 /* unit: dB */
|
||||
#define BT_8723D_2ANT_WIFI_SIR_THRES2 -30 /* unit: dB */
|
||||
#define BT_8723D_2ANT_BT_SIR_THRES1 -15 /* unit: dB */
|
||||
#define BT_8723D_2ANT_BT_SIR_THRES2 -30 /* unit: dB */
|
||||
|
||||
|
||||
/* for Antenna detection */
|
||||
#define BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND 50
|
||||
#define BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
|
||||
#define BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 52
|
||||
#define BT_8723D_2ANT_ANTDET_PSDTHRES_1ANT 40
|
||||
#define BT_8723D_2ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
|
||||
#define BT_8723D_2ANT_ANTDET_SWEEPPOINT_DELAY 60000
|
||||
#define BT_8723D_2ANT_ANTDET_ENABLE 1
|
||||
#define BT_8723D_2ANT_ANTDET_BTTXTIME 100
|
||||
#define BT_8723D_2ANT_ANTDET_BTTXCHANNEL 39
|
||||
#define BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT 50
|
||||
|
||||
|
||||
#define BT_8723D_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
|
||||
|
||||
enum bt_8723d_2ant_signal_state {
|
||||
BT_8723D_2ANT_SIG_STA_SET_TO_LOW = 0x0,
|
||||
BT_8723D_2ANT_SIG_STA_SET_BY_HW = 0x0,
|
||||
BT_8723D_2ANT_SIG_STA_SET_TO_HIGH = 0x1,
|
||||
BT_8723D_2ANT_SIG_STA_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_2ant_path_ctrl_owner {
|
||||
BT_8723D_2ANT_PCO_BTSIDE = 0x0,
|
||||
BT_8723D_2ANT_PCO_WLSIDE = 0x1,
|
||||
BT_8723D_2ANT_PCO_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_2ant_gnt_ctrl_type {
|
||||
BT_8723D_2ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
|
||||
BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
|
||||
BT_8723D_2ANT_GNT_TYPE_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_2ant_gnt_ctrl_block {
|
||||
BT_8723D_2ANT_GNT_BLOCK_RFC_BB = 0x0,
|
||||
BT_8723D_2ANT_GNT_BLOCK_RFC = 0x1,
|
||||
BT_8723D_2ANT_GNT_BLOCK_BB = 0x2,
|
||||
BT_8723D_2ANT_GNT_BLOCK_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_2ant_lte_coex_table_type {
|
||||
BT_8723D_2ANT_CTT_WL_VS_LTE = 0x0,
|
||||
BT_8723D_2ANT_CTT_BT_VS_LTE = 0x1,
|
||||
BT_8723D_2ANT_CTT_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_2ant_lte_break_table_type {
|
||||
BT_8723D_2ANT_LBTT_WL_BREAK_LTE = 0x0,
|
||||
BT_8723D_2ANT_LBTT_BT_BREAK_LTE = 0x1,
|
||||
BT_8723D_2ANT_LBTT_LTE_BREAK_WL = 0x2,
|
||||
BT_8723D_2ANT_LBTT_LTE_BREAK_BT = 0x3,
|
||||
BT_8723D_2ANT_LBTT_MAX
|
||||
};
|
||||
|
||||
enum bt_info_src_8723d_2ant {
|
||||
BT_INFO_SRC_8723D_2ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8723D_2ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8723D_2ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8723D_2ANT_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_2ant_bt_status {
|
||||
BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8723D_2ANT_BT_STATUS_INQ_PAGE = 0x2,
|
||||
BT_8723D_2ANT_BT_STATUS_ACL_BUSY = 0x3,
|
||||
BT_8723D_2ANT_BT_STATUS_SCO_BUSY = 0x4,
|
||||
BT_8723D_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8723D_2ANT_BT_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_2ant_coex_algo {
|
||||
BT_8723D_2ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8723D_2ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8723D_2ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8723D_2ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8723D_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
|
||||
BT_8723D_2ANT_COEX_ALGO_PANEDR = 0x5,
|
||||
BT_8723D_2ANT_COEX_ALGO_PANHS = 0x6,
|
||||
BT_8723D_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
|
||||
BT_8723D_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
|
||||
BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
|
||||
BT_8723D_2ANT_COEX_ALGO_HID_A2DP = 0xa,
|
||||
BT_8723D_2ANT_COEX_ALGO_NOPROFILEBUSY = 0xb,
|
||||
BT_8723D_2ANT_COEX_ALGO_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_2ant_phase {
|
||||
BT_8723D_2ANT_PHASE_COEX_INIT = 0x0,
|
||||
BT_8723D_2ANT_PHASE_WLANONLY_INIT = 0x1,
|
||||
BT_8723D_2ANT_PHASE_WLAN_OFF = 0x2,
|
||||
BT_8723D_2ANT_PHASE_2G_RUNTIME = 0x3,
|
||||
BT_8723D_2ANT_PHASE_5G_RUNTIME = 0x4,
|
||||
BT_8723D_2ANT_PHASE_BTMPMODE = 0x5,
|
||||
BT_8723D_2ANT_PHASE_ANTENNA_DET = 0x6,
|
||||
BT_8723D_2ANT_PHASE_COEX_POWERON = 0x7,
|
||||
BT_8723D_2ANT_PHASE_MAX
|
||||
};
|
||||
|
||||
enum bt_8723d_2ant_Scoreboard {
|
||||
BT_8723D_2ANT_SCOREBOARD_ACTIVE = BIT(0),
|
||||
BT_8723D_2ANT_SCOREBOARD_ONOFF = BIT(1),
|
||||
BT_8723D_2ANT_SCOREBOARD_SCAN = BIT(2),
|
||||
BT_8723D_2ANT_SCOREBOARD_UNDERTEST = BIT(3),
|
||||
BT_8723D_2ANT_SCOREBOARD_WLBUSY = BIT(6)
|
||||
};
|
||||
|
||||
|
||||
|
||||
struct coex_dm_8723d_2ant {
|
||||
/* fw mechanism */
|
||||
u8 pre_bt_dec_pwr_lvl;
|
||||
u8 cur_bt_dec_pwr_lvl;
|
||||
u8 pre_fw_dac_swing_lvl;
|
||||
u8 cur_fw_dac_swing_lvl;
|
||||
boolean cur_ignore_wlan_act;
|
||||
boolean pre_ignore_wlan_act;
|
||||
u8 pre_ps_tdma;
|
||||
u8 cur_ps_tdma;
|
||||
u8 ps_tdma_para[5];
|
||||
u8 ps_tdma_du_adj_type;
|
||||
boolean reset_tdma_adjust;
|
||||
boolean pre_ps_tdma_on;
|
||||
boolean cur_ps_tdma_on;
|
||||
boolean pre_bt_auto_report;
|
||||
boolean cur_bt_auto_report;
|
||||
|
||||
/* sw mechanism */
|
||||
boolean pre_rf_rx_lpf_shrink;
|
||||
boolean cur_rf_rx_lpf_shrink;
|
||||
u32 bt_rf_0x1e_backup;
|
||||
boolean pre_low_penalty_ra;
|
||||
boolean cur_low_penalty_ra;
|
||||
boolean pre_dac_swing_on;
|
||||
u32 pre_dac_swing_lvl;
|
||||
boolean cur_dac_swing_on;
|
||||
u32 cur_dac_swing_lvl;
|
||||
boolean pre_adc_back_off;
|
||||
boolean cur_adc_back_off;
|
||||
boolean pre_agc_table_en;
|
||||
boolean cur_agc_table_en;
|
||||
u32 pre_val0x6c0;
|
||||
u32 cur_val0x6c0;
|
||||
u32 pre_val0x6c4;
|
||||
u32 cur_val0x6c4;
|
||||
u32 pre_val0x6c8;
|
||||
u32 cur_val0x6c8;
|
||||
u8 pre_val0x6cc;
|
||||
u8 cur_val0x6cc;
|
||||
boolean limited_dig;
|
||||
|
||||
/* algorithm related */
|
||||
u8 pre_algorithm;
|
||||
u8 cur_algorithm;
|
||||
u8 bt_status;
|
||||
u8 wifi_chnl_info[3];
|
||||
|
||||
boolean need_recover0x948;
|
||||
u32 backup0x948;
|
||||
|
||||
u8 pre_lps;
|
||||
u8 cur_lps;
|
||||
u8 pre_rpwm;
|
||||
u8 cur_rpwm;
|
||||
|
||||
boolean is_switch_to_1dot5_ant;
|
||||
u8 switch_thres_offset;
|
||||
u32 arp_cnt;
|
||||
|
||||
u8 pre_ant_pos_type;
|
||||
u8 cur_ant_pos_type;
|
||||
};
|
||||
|
||||
struct coex_sta_8723d_2ant {
|
||||
boolean bt_disabled;
|
||||
boolean bt_link_exist;
|
||||
boolean sco_exist;
|
||||
boolean a2dp_exist;
|
||||
boolean hid_exist;
|
||||
boolean pan_exist;
|
||||
|
||||
boolean under_lps;
|
||||
boolean under_ips;
|
||||
u32 high_priority_tx;
|
||||
u32 high_priority_rx;
|
||||
u32 low_priority_tx;
|
||||
u32 low_priority_rx;
|
||||
boolean is_hiPri_rx_overhead;
|
||||
u8 bt_rssi;
|
||||
boolean bt_tx_rx_mask;
|
||||
u8 pre_bt_rssi_state;
|
||||
u8 pre_wifi_rssi_state[4];
|
||||
u8 bt_info_c2h[BT_INFO_SRC_8723D_2ANT_MAX][10];
|
||||
u32 bt_info_c2h_cnt[BT_INFO_SRC_8723D_2ANT_MAX];
|
||||
boolean bt_whck_test;
|
||||
boolean c2h_bt_inquiry_page;
|
||||
boolean c2h_bt_remote_name_req;
|
||||
u8 bt_retry_cnt;
|
||||
u8 bt_info_ext;
|
||||
u8 bt_info_ext2;
|
||||
u32 pop_event_cnt;
|
||||
u8 scan_ap_num;
|
||||
|
||||
u32 crc_ok_cck;
|
||||
u32 crc_ok_11g;
|
||||
u32 crc_ok_11n;
|
||||
u32 crc_ok_11n_vht;
|
||||
|
||||
u32 crc_err_cck;
|
||||
u32 crc_err_11g;
|
||||
u32 crc_err_11n;
|
||||
u32 crc_err_11n_vht;
|
||||
|
||||
boolean cck_lock;
|
||||
boolean pre_ccklock;
|
||||
boolean cck_ever_lock;
|
||||
u8 coex_table_type;
|
||||
boolean force_lps_on;
|
||||
|
||||
u8 dis_ver_info_cnt;
|
||||
|
||||
u8 a2dp_bit_pool;
|
||||
u8 cut_version;
|
||||
|
||||
boolean concurrent_rx_mode_on;
|
||||
|
||||
u16 score_board;
|
||||
u8 isolation_btween_wb; /* 0~ 50 */
|
||||
u8 wifi_coex_thres;
|
||||
u8 bt_coex_thres;
|
||||
u8 wifi_coex_thres2;
|
||||
u8 bt_coex_thres2;
|
||||
|
||||
u8 num_of_profile;
|
||||
boolean acl_busy;
|
||||
boolean bt_create_connection;
|
||||
boolean wifi_is_high_pri_task;
|
||||
u32 specific_pkt_period_cnt;
|
||||
u32 bt_coex_supported_feature;
|
||||
u32 bt_coex_supported_version;
|
||||
|
||||
u8 bt_ble_scan_type;
|
||||
u32 bt_ble_scan_para[3];
|
||||
|
||||
boolean run_time_state;
|
||||
boolean freeze_coexrun_by_btinfo;
|
||||
|
||||
boolean is_A2DP_3M;
|
||||
boolean voice_over_HOGP;
|
||||
u8 bt_info;
|
||||
boolean is_autoslot;
|
||||
u8 forbidden_slot;
|
||||
u8 hid_busy_num;
|
||||
u8 hid_pair_cnt;
|
||||
|
||||
u32 cnt_RemoteNameReq;
|
||||
u32 cnt_setupLink;
|
||||
u32 cnt_ReInit;
|
||||
u32 cnt_IgnWlanAct;
|
||||
u32 cnt_Page;
|
||||
u32 cnt_RoleSwitch;
|
||||
|
||||
u16 bt_reg_vendor_ac;
|
||||
u16 bt_reg_vendor_ae;
|
||||
|
||||
boolean is_setupLink;
|
||||
boolean wl_noisy_level;
|
||||
u32 gnt_error_cnt;
|
||||
|
||||
u8 bt_afh_map[10];
|
||||
u8 bt_relink_downcount;
|
||||
boolean is_tdma_btautoslot;
|
||||
boolean is_tdma_btautoslot_hang;
|
||||
|
||||
boolean is_eSCO_mode;
|
||||
};
|
||||
|
||||
#define BT_8723D_2ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
|
||||
#define BT_8723D_2ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
|
||||
#define BT_8723D_2ANT_ANTDET_BUF_LEN 16
|
||||
|
||||
struct psdscan_sta_8723d_2ant {
|
||||
|
||||
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
|
||||
u32 ant_det_bt_tx_time;
|
||||
u32 ant_det_pre_psdscan_peak_val;
|
||||
boolean ant_det_is_ant_det_available;
|
||||
u32 ant_det_psd_scan_peak_val;
|
||||
boolean ant_det_is_btreply_available;
|
||||
u32 ant_det_psd_scan_peak_freq;
|
||||
|
||||
u8 ant_det_result;
|
||||
u8 ant_det_peak_val[BT_8723D_2ANT_ANTDET_BUF_LEN];
|
||||
u8 ant_det_peak_freq[BT_8723D_2ANT_ANTDET_BUF_LEN];
|
||||
u32 ant_det_try_count;
|
||||
u32 ant_det_fail_count;
|
||||
u32 ant_det_inteval_count;
|
||||
u32 ant_det_thres_offset;
|
||||
|
||||
u32 real_cent_freq;
|
||||
s32 real_offset;
|
||||
u32 real_span;
|
||||
|
||||
u32 psd_band_width; /* unit: Hz */
|
||||
u32 psd_point; /* 128/256/512/1024 */
|
||||
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_start_point;
|
||||
u32 psd_stop_point;
|
||||
u32 psd_max_value_point;
|
||||
u32 psd_max_value;
|
||||
u32 psd_max_value2;
|
||||
u32 psd_avg_value; /* filter loop_max_value that below BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT, and average the rest*/
|
||||
u32 psd_loop_max_value[BT_8723D_2ANT_ANTDET_PSD_SWWEEPCOUNT]; /*max value in each loop */
|
||||
u32 psd_start_base;
|
||||
u32 psd_avg_num; /* 1/8/16/32 */
|
||||
u32 psd_gen_count;
|
||||
boolean is_AntDet_running;
|
||||
boolean is_psd_show_max_only;
|
||||
};
|
||||
|
||||
|
||||
/* *******************************************
|
||||
* The following is interface which will notify coex module.
|
||||
* ******************************************* */
|
||||
void ex_halbtc8723d2ant_power_on_setting(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723d2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723d2ant_init_hw_config(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only);
|
||||
void ex_halbtc8723d2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723d2ant_ips_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723d2ant_lps_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723d2ant_scan_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723d2ant_connect_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723d2ant_media_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723d2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723d2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8723d2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723d2ant_halt_notify(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723d2ant_pnp_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 pnp_state);
|
||||
void ex_halbtc8723d2ant_set_antenna_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8723d2ant_periodical(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8723d2ant_antenna_detection(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
void ex_halbtc8723d2ant_display_ant_detection(IN struct btc_coexist *btcoexist);
|
||||
|
||||
|
||||
#else
|
||||
#define ex_halbtc8723d2ant_power_on_setting(btcoexist)
|
||||
#define ex_halbtc8723d2ant_pre_load_firmware(btcoexist)
|
||||
#define ex_halbtc8723d2ant_init_hw_config(btcoexist, wifi_only)
|
||||
#define ex_halbtc8723d2ant_init_coex_dm(btcoexist)
|
||||
#define ex_halbtc8723d2ant_ips_notify(btcoexist, type)
|
||||
#define ex_halbtc8723d2ant_lps_notify(btcoexist, type)
|
||||
#define ex_halbtc8723d2ant_scan_notify(btcoexist, type)
|
||||
#define ex_halbtc8723d2ant_connect_notify(btcoexist, type)
|
||||
#define ex_halbtc8723d2ant_media_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8723d2ant_specific_packet_notify(btcoexist, type)
|
||||
#define ex_halbtc8723d2ant_bt_info_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8723d2ant_rf_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8723d2ant_halt_notify(btcoexist)
|
||||
#define ex_halbtc8723d2ant_pnp_notify(btcoexist, pnp_state)
|
||||
#define ex_halbtc8723d2ant_periodical(btcoexist)
|
||||
#define ex_halbtc8723d2ant_display_coex_info(btcoexist)
|
||||
#define ex_halbtc8723d2ant_set_antenna_notify(btcoexist, type)
|
||||
#define ex_halbtc8723d2ant_display_ant_detection(btcoexist)
|
||||
#define ex_halbtc8723d2ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,432 @@
|
||||
|
||||
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
|
||||
|
||||
#if (RTL8821C_SUPPORT == 1)
|
||||
|
||||
/* *******************************************
|
||||
* The following is for 8821C 1ANT BT Co-exist definition
|
||||
* ******************************************* */
|
||||
#define BT_AUTO_REPORT_ONLY_8821C_1ANT 1
|
||||
|
||||
#define BT_INFO_8821C_1ANT_B_FTP BIT(7)
|
||||
#define BT_INFO_8821C_1ANT_B_A2DP BIT(6)
|
||||
#define BT_INFO_8821C_1ANT_B_HID BIT(5)
|
||||
#define BT_INFO_8821C_1ANT_B_SCO_BUSY BIT(4)
|
||||
#define BT_INFO_8821C_1ANT_B_ACL_BUSY BIT(3)
|
||||
#define BT_INFO_8821C_1ANT_B_INQ_PAGE BIT(2)
|
||||
#define BT_INFO_8821C_1ANT_B_SCO_ESCO BIT(1)
|
||||
#define BT_INFO_8821C_1ANT_B_CONNECTION BIT(0)
|
||||
|
||||
#define BT_INFO_8821C_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_) \
|
||||
(((_BT_INFO_EXT_&BIT(0))) ? true : false)
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8821C_1ANT 2
|
||||
|
||||
#define BT_8821C_1ANT_WIFI_NOISY_THRESH 30 /* max: 255 */
|
||||
|
||||
/* for Antenna detection */
|
||||
#define BT_8821C_1ANT_ANTDET_PSDTHRES_BACKGROUND 50
|
||||
#define BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
|
||||
#define BT_8821C_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 55
|
||||
#define BT_8821C_1ANT_ANTDET_PSDTHRES_1ANT 35
|
||||
#define BT_8821C_1ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
|
||||
#define BT_8821C_1ANT_ANTDET_SWEEPPOINT_DELAY 40000
|
||||
#define BT_8821C_1ANT_ANTDET_ENABLE 0
|
||||
#define BT_8821C_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 0
|
||||
#define BT_8821C_1ANT_ANTDET_BTTXTIME 100
|
||||
#define BT_8821C_1ANT_ANTDET_BTTXCHANNEL 39
|
||||
|
||||
#define BT_8821C_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
|
||||
|
||||
enum bt_8821c_1ant_signal_state {
|
||||
BT_8821C_1ANT_SIG_STA_SET_TO_LOW = 0x0,
|
||||
BT_8821C_1ANT_SIG_STA_SET_BY_HW = 0x0,
|
||||
BT_8821C_1ANT_SIG_STA_SET_TO_HIGH = 0x1,
|
||||
BT_8821C_1ANT_SIG_STA_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_1ant_path_ctrl_owner {
|
||||
BT_8821C_1ANT_PCO_BTSIDE = 0x0,
|
||||
BT_8821C_1ANT_PCO_WLSIDE = 0x1,
|
||||
BT_8821C_1ANT_PCO_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_1ant_gnt_ctrl_type {
|
||||
BT_8821C_1ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
|
||||
BT_8821C_1ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
|
||||
BT_8821C_1ANT_GNT_TYPE_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_1ant_gnt_ctrl_block {
|
||||
BT_8821C_1ANT_GNT_BLOCK_RFC_BB = 0x0,
|
||||
BT_8821C_1ANT_GNT_BLOCK_RFC = 0x1,
|
||||
BT_8821C_1ANT_GNT_BLOCK_BB = 0x2,
|
||||
BT_8821C_1ANT_GNT_BLOCK_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_1ant_lte_coex_table_type {
|
||||
BT_8821C_1ANT_CTT_WL_VS_LTE = 0x0,
|
||||
BT_8821C_1ANT_CTT_BT_VS_LTE = 0x1,
|
||||
BT_8821C_1ANT_CTT_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_1ant_lte_break_table_type {
|
||||
BT_8821C_1ANT_LBTT_WL_BREAK_LTE = 0x0,
|
||||
BT_8821C_1ANT_LBTT_BT_BREAK_LTE = 0x1,
|
||||
BT_8821C_1ANT_LBTT_LTE_BREAK_WL = 0x2,
|
||||
BT_8821C_1ANT_LBTT_LTE_BREAK_BT = 0x3,
|
||||
BT_8821C_1ANT_LBTT_MAX
|
||||
};
|
||||
|
||||
enum bt_info_src_8821c_1ant {
|
||||
BT_INFO_SRC_8821C_1ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8821C_1ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8821C_1ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8821C_1ANT_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_1ant_bt_status {
|
||||
BT_8821C_1ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8821C_1ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8821C_1ANT_BT_STATUS_INQ_PAGE = 0x2,
|
||||
BT_8821C_1ANT_BT_STATUS_ACL_BUSY = 0x3,
|
||||
BT_8821C_1ANT_BT_STATUS_SCO_BUSY = 0x4,
|
||||
BT_8821C_1ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8821C_1ANT_BT_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_1ant_wifi_status {
|
||||
BT_8821C_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8821C_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN = 0x1,
|
||||
BT_8821C_1ANT_WIFI_STATUS_CONNECTED_SCAN = 0x2,
|
||||
BT_8821C_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT = 0x3,
|
||||
BT_8821C_1ANT_WIFI_STATUS_CONNECTED_IDLE = 0x4,
|
||||
BT_8821C_1ANT_WIFI_STATUS_CONNECTED_BUSY = 0x5,
|
||||
BT_8821C_1ANT_WIFI_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_1ant_coex_algo {
|
||||
BT_8821C_1ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8821C_1ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8821C_1ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8821C_1ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8821C_1ANT_COEX_ALGO_A2DP_PANHS = 0x4,
|
||||
BT_8821C_1ANT_COEX_ALGO_PANEDR = 0x5,
|
||||
BT_8821C_1ANT_COEX_ALGO_PANHS = 0x6,
|
||||
BT_8821C_1ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
|
||||
BT_8821C_1ANT_COEX_ALGO_PANEDR_HID = 0x8,
|
||||
BT_8821C_1ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
|
||||
BT_8821C_1ANT_COEX_ALGO_HID_A2DP = 0xa,
|
||||
BT_8821C_1ANT_COEX_ALGO_MAX = 0xb,
|
||||
};
|
||||
|
||||
enum bt_8821c_1ant_ext_ant_switch_type {
|
||||
BT_8821C_1ANT_EXT_ANT_SWITCH_USE_DPDT = 0x0,
|
||||
BT_8821C_1ANT_EXT_ANT_SWITCH_USE_SPDT = 0x1,
|
||||
BT_8821C_1ANT_EXT_ANT_SWITCH_MAX
|
||||
};
|
||||
|
||||
|
||||
enum bt_8821c_1ant_ext_ant_switch_ctrl_type {
|
||||
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
|
||||
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
|
||||
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
|
||||
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
|
||||
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
|
||||
BT_8821C_1ANT_EXT_ANT_SWITCH_CTRL_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_1ant_ext_ant_switch_pos_type {
|
||||
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_BT = 0x0,
|
||||
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_WLG = 0x1,
|
||||
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_WLA = 0x2,
|
||||
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_NOCARE = 0x3,
|
||||
BT_8821C_1ANT_EXT_ANT_SWITCH_TO_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_1ant_ext_band_switch_pos_type {
|
||||
BT_8821C_1ANT_EXT_BAND_SWITCH_TO_WLG = 0x0,
|
||||
BT_8821C_1ANT_EXT_BAND_SWITCH_TO_WLA = 0x1,
|
||||
BT_8821C_1ANT_EXT_BAND_SWITCH_TO_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_1ant_int_block{
|
||||
BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_WLG_OF_BTG = 0x0,
|
||||
BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_WLG_OF_WLAG = 0x1,
|
||||
BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_WLA_OF_WLAG = 0x2,
|
||||
BT_8821C_1ANT_INT_BLOCK_SWITCH_TO_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_1ant_phase{
|
||||
BT_8821C_1ANT_PHASE_COEX_INIT = 0x0,
|
||||
BT_8821C_1ANT_PHASE_WLANONLY_INIT = 0x1,
|
||||
BT_8821C_1ANT_PHASE_WLAN_OFF = 0x2,
|
||||
BT_8821C_1ANT_PHASE_2G_RUNTIME = 0x3,
|
||||
BT_8821C_1ANT_PHASE_5G_RUNTIME = 0x4,
|
||||
BT_8821C_1ANT_PHASE_BTMPMODE = 0x5,
|
||||
BT_8821C_1ANT_PHASE_MAX
|
||||
};
|
||||
|
||||
|
||||
struct coex_dm_8821c_1ant {
|
||||
/* hw setting */
|
||||
u32 pre_ant_pos_type;
|
||||
u32 cur_ant_pos_type;
|
||||
/* fw mechanism */
|
||||
boolean cur_ignore_wlan_act;
|
||||
boolean pre_ignore_wlan_act;
|
||||
u8 pre_ps_tdma;
|
||||
u8 cur_ps_tdma;
|
||||
u8 ps_tdma_para[5];
|
||||
u8 ps_tdma_du_adj_type;
|
||||
boolean auto_tdma_adjust;
|
||||
boolean pre_ps_tdma_on;
|
||||
boolean cur_ps_tdma_on;
|
||||
boolean pre_bt_auto_report;
|
||||
boolean cur_bt_auto_report;
|
||||
u8 pre_lps;
|
||||
u8 cur_lps;
|
||||
u8 pre_rpwm;
|
||||
u8 cur_rpwm;
|
||||
|
||||
/* sw mechanism */
|
||||
boolean pre_low_penalty_ra;
|
||||
boolean cur_low_penalty_ra;
|
||||
u32 pre_val0x6c0;
|
||||
u32 cur_val0x6c0;
|
||||
u32 pre_val0x6c4;
|
||||
u32 cur_val0x6c4;
|
||||
u32 pre_val0x6c8;
|
||||
u32 cur_val0x6c8;
|
||||
u8 pre_val0x6cc;
|
||||
u8 cur_val0x6cc;
|
||||
boolean limited_dig;
|
||||
|
||||
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
|
||||
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
|
||||
u16 backup_retry_limit;
|
||||
u8 backup_ampdu_max_time;
|
||||
|
||||
/* algorithm related */
|
||||
u8 pre_algorithm;
|
||||
u8 cur_algorithm;
|
||||
u8 bt_status;
|
||||
u8 wifi_chnl_info[3];
|
||||
|
||||
u32 pre_ra_mask;
|
||||
u32 cur_ra_mask;
|
||||
u8 pre_arfr_type;
|
||||
u8 cur_arfr_type;
|
||||
u8 pre_retry_limit_type;
|
||||
u8 cur_retry_limit_type;
|
||||
u8 pre_ampdu_time_type;
|
||||
u8 cur_ampdu_time_type;
|
||||
u32 arp_cnt;
|
||||
|
||||
u32 pre_ext_ant_switch_status;
|
||||
u32 cur_ext_ant_switch_status;
|
||||
|
||||
u8 pre_ext_band_switch_status;
|
||||
u8 cur_ext_band_switch_status;
|
||||
|
||||
u8 pre_int_block_status;
|
||||
u8 cur_int_block_status;
|
||||
|
||||
u8 error_condition;
|
||||
};
|
||||
|
||||
struct coex_sta_8821c_1ant {
|
||||
boolean bt_disabled;
|
||||
boolean bt_link_exist;
|
||||
boolean sco_exist;
|
||||
boolean a2dp_exist;
|
||||
boolean hid_exist;
|
||||
boolean pan_exist;
|
||||
boolean bt_hi_pri_link_exist;
|
||||
u8 num_of_profile;
|
||||
|
||||
boolean under_lps;
|
||||
boolean under_ips;
|
||||
u32 specific_pkt_period_cnt;
|
||||
u32 high_priority_tx;
|
||||
u32 high_priority_rx;
|
||||
u32 low_priority_tx;
|
||||
u32 low_priority_rx;
|
||||
s8 bt_rssi;
|
||||
boolean bt_tx_rx_mask;
|
||||
u8 pre_bt_rssi_state;
|
||||
u8 pre_wifi_rssi_state[4];
|
||||
boolean c2h_bt_info_req_sent;
|
||||
u8 bt_info_c2h[BT_INFO_SRC_8821C_1ANT_MAX][10];
|
||||
u32 bt_info_c2h_cnt[BT_INFO_SRC_8821C_1ANT_MAX];
|
||||
boolean bt_whck_test;
|
||||
boolean c2h_bt_inquiry_page;
|
||||
boolean c2h_bt_page; /* Add for win8.1 page out issue */
|
||||
boolean wifi_is_high_pri_task; /* Add for win8.1 page out issue */
|
||||
u8 bt_retry_cnt;
|
||||
u8 bt_info_ext;
|
||||
u32 pop_event_cnt;
|
||||
u8 scan_ap_num;
|
||||
|
||||
u32 crc_ok_cck;
|
||||
u32 crc_ok_11g;
|
||||
u32 crc_ok_11n;
|
||||
u32 crc_ok_11n_agg;
|
||||
|
||||
u32 crc_err_cck;
|
||||
u32 crc_err_11g;
|
||||
u32 crc_err_11n;
|
||||
u32 crc_err_11n_agg;
|
||||
|
||||
boolean cck_lock;
|
||||
boolean pre_ccklock;
|
||||
boolean cck_ever_lock;
|
||||
u8 coex_table_type;
|
||||
|
||||
boolean force_lps_on;
|
||||
u32 wrong_profile_notification;
|
||||
|
||||
boolean concurrent_rx_mode_on;
|
||||
|
||||
u16 score_board;
|
||||
|
||||
u8 a2dp_bit_pool;
|
||||
u8 cut_version;
|
||||
boolean acl_busy;
|
||||
boolean wl_rf_off_on_event;
|
||||
boolean bt_create_connection;
|
||||
boolean run_time_state;
|
||||
|
||||
u32 bt_coex_supported_feature;
|
||||
u32 bt_coex_supported_version;
|
||||
};
|
||||
|
||||
|
||||
#define BT_8821C_1ANT_EXT_BAND_SWITCH_USE_DPDT 0
|
||||
#define BT_8821C_1ANT_EXT_BAND_SWITCH_USE_SPDT 1
|
||||
|
||||
|
||||
struct rfe_type_8821c_1ant{
|
||||
|
||||
u8 rfe_module_type;
|
||||
boolean ext_ant_switch_exist;
|
||||
u8 ext_ant_switch_type; /* 0:DPDT, 1:SPDT */
|
||||
u8 ext_ant_switch_ctrl_polarity; /* iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
|
||||
|
||||
boolean ext_band_switch_exist;
|
||||
u8 ext_band_switch_type; /* 0:DPDT, 1:SPDT */
|
||||
u8 ext_band_switch_ctrl_polarity;
|
||||
|
||||
boolean wlg_Locate_at_btg; /* If true: WLG at BTG, If false: WLG at WLAG */
|
||||
|
||||
boolean ext_ant_switch_diversity; /* If diversity on */
|
||||
};
|
||||
|
||||
#define BT_8821C_1ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
|
||||
#define BT_8821C_1ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
|
||||
#define BT_8821C_1ANT_ANTDET_BUF_LEN 16
|
||||
|
||||
struct psdscan_sta_8821c_1ant {
|
||||
|
||||
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
|
||||
u32 ant_det_bt_tx_time;
|
||||
u32 ant_det_pre_psdscan_peak_val;
|
||||
boolean ant_det_is_ant_det_available;
|
||||
u32 ant_det_psd_scan_peak_val;
|
||||
boolean ant_det_is_btreply_available;
|
||||
u32 ant_det_psd_scan_peak_freq;
|
||||
|
||||
u8 ant_det_result;
|
||||
u8 ant_det_peak_val[BT_8821C_1ANT_ANTDET_BUF_LEN];
|
||||
u8 ant_det_peak_freq[BT_8821C_1ANT_ANTDET_BUF_LEN];
|
||||
u32 ant_det_try_count;
|
||||
u32 ant_det_fail_count;
|
||||
u32 ant_det_inteval_count;
|
||||
u32 ant_det_thres_offset;
|
||||
|
||||
u32 real_cent_freq;
|
||||
s32 real_offset;
|
||||
u32 real_span;
|
||||
|
||||
u32 psd_band_width; /* unit: Hz */
|
||||
u32 psd_point; /* 128/256/512/1024 */
|
||||
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_start_point;
|
||||
u32 psd_stop_point;
|
||||
u32 psd_max_value_point;
|
||||
u32 psd_max_value;
|
||||
u32 psd_start_base;
|
||||
u32 psd_avg_num; /* 1/8/16/32 */
|
||||
u32 psd_gen_count;
|
||||
boolean is_psd_running;
|
||||
boolean is_psd_show_max_only;
|
||||
};
|
||||
|
||||
/* *******************************************
|
||||
* The following is interface which will notify coex module.
|
||||
* ******************************************* */
|
||||
void ex_halbtc8821c1ant_power_on_setting(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821c1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821c1ant_init_hw_config(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only);
|
||||
void ex_halbtc8821c1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821c1ant_ips_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821c1ant_lps_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821c1ant_scan_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821c1ant_switchband_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821c1ant_connect_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821c1ant_media_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821c1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821c1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8821c1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821c1ant_halt_notify(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821c1ant_pnp_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 pnp_state);
|
||||
void ex_halbtc8821c1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821c1ant_periodical(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821c1ant_display_coex_info(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821c1ant_antenna_detection(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
void ex_halbtc8821c1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
|
||||
void ex_halbtc8821c1ant_psd_scan(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
void ex_halbtc8821c1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
|
||||
|
||||
#else
|
||||
#define ex_halbtc8821c1ant_power_on_setting(btcoexist)
|
||||
#define ex_halbtc8821c1ant_pre_load_firmware(btcoexist)
|
||||
#define ex_halbtc8821c1ant_init_hw_config(btcoexist, wifi_only)
|
||||
#define ex_halbtc8821c1ant_init_coex_dm(btcoexist)
|
||||
#define ex_halbtc8821c1ant_ips_notify(btcoexist, type)
|
||||
#define ex_halbtc8821c1ant_lps_notify(btcoexist, type)
|
||||
#define ex_halbtc8821c1ant_scan_notify(btcoexist, type)
|
||||
#define ex_halbtc8821c1ant_switchband_notify(btcoexist,type)
|
||||
#define ex_halbtc8821c1ant_connect_notify(btcoexist, type)
|
||||
#define ex_halbtc8821c1ant_media_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8821c1ant_specific_packet_notify(btcoexist, type)
|
||||
#define ex_halbtc8821c1ant_bt_info_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8821c1ant_rf_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8821c1ant_halt_notify(btcoexist)
|
||||
#define ex_halbtc8821c1ant_pnp_notify(btcoexist, pnp_state)
|
||||
#define ex_halbtc8821c1ant_coex_dm_reset(btcoexist)
|
||||
#define ex_halbtc8821c1ant_periodical(btcoexist)
|
||||
#define ex_halbtc8821c1ant_display_coex_info(btcoexist)
|
||||
#define ex_halbtc8821c1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
|
||||
#define ex_halbtc8821c1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
|
||||
#define ex_halbtc8821c1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
|
||||
#define ex_halbtc8821c1ant_display_ant_detection(btcoexist)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,433 @@
|
||||
|
||||
#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
|
||||
|
||||
#if (RTL8821C_SUPPORT == 1)
|
||||
|
||||
/* *******************************************
|
||||
* The following is for 8821C 2Ant BT Co-exist definition
|
||||
* ******************************************* */
|
||||
#define BT_AUTO_REPORT_ONLY_8821C_2ANT 1
|
||||
|
||||
|
||||
#define BT_INFO_8821C_2ANT_B_FTP BIT(7)
|
||||
#define BT_INFO_8821C_2ANT_B_A2DP BIT(6)
|
||||
#define BT_INFO_8821C_2ANT_B_HID BIT(5)
|
||||
#define BT_INFO_8821C_2ANT_B_SCO_BUSY BIT(4)
|
||||
#define BT_INFO_8821C_2ANT_B_ACL_BUSY BIT(3)
|
||||
#define BT_INFO_8821C_2ANT_B_INQ_PAGE BIT(2)
|
||||
#define BT_INFO_8821C_2ANT_B_SCO_ESCO BIT(1)
|
||||
#define BT_INFO_8821C_2ANT_B_CONNECTION BIT(0)
|
||||
|
||||
#define BTC_RSSI_COEX_THRESH_TOL_8821C_2ANT 2
|
||||
|
||||
|
||||
#define BT_8821C_2ANT_WIFI_RSSI_COEXSWITCH_THRES1 80 /* unit: % WiFi RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 42 */
|
||||
#define BT_8821C_2ANT_BT_RSSI_COEXSWITCH_THRES1 80 /* unit: % BT RSSI Threshold for 2-Ant free-run/2-Ant TDMA translation, default = 46 */
|
||||
#define BT_8821C_2ANT_WIFI_RSSI_COEXSWITCH_THRES2 80 /* unit: % WiFi RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 42 */
|
||||
#define BT_8821C_2ANT_BT_RSSI_COEXSWITCH_THRES2 80 /* unit: % BT RSSI Threshold for 1-Ant TDMA/1-Ant PS-TDMA translation, default = 46 */
|
||||
#define BT_8821C_2ANT_DEFAULT_ISOLATION 15 /* unit: dB */
|
||||
#define BT_8821C_2ANT_WIFI_MAX_TX_POWER 15 /* unit: dBm */
|
||||
#define BT_8821C_2ANT_BT_MAX_TX_POWER 3 /* unit: dBm */
|
||||
#define BT_8821C_2ANT_WIFI_SIR_THRES1 -15 /* unit: dB */
|
||||
#define BT_8821C_2ANT_WIFI_SIR_THRES2 -30 /* unit: dB */
|
||||
#define BT_8821C_2ANT_BT_SIR_THRES1 -15 /* unit: dB */
|
||||
#define BT_8821C_2ANT_BT_SIR_THRES2 -30 /* unit: dB */
|
||||
|
||||
|
||||
/* for Antenna detection */
|
||||
#define BT_8821C_2ANT_ANTDET_PSDTHRES_BACKGROUND 50
|
||||
#define BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION 70
|
||||
#define BT_8821C_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION 52
|
||||
#define BT_8821C_2ANT_ANTDET_PSDTHRES_1ANT 40
|
||||
#define BT_8821C_2ANT_ANTDET_RETRY_INTERVAL 10 /* retry timer if ant det is fail, unit: second */
|
||||
#define BT_8821C_2ANT_ANTDET_SWEEPPOINT_DELAY 40000
|
||||
#define BT_8821C_2ANT_ANTDET_ENABLE 0
|
||||
#define BT_8821C_2ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE 0
|
||||
#define BT_8821C_2ANT_ANTDET_BTTXTIME 100
|
||||
#define BT_8821C_2ANT_ANTDET_BTTXCHANNEL 39
|
||||
|
||||
#define BT_8821C_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT 30000
|
||||
|
||||
enum bt_8821c_2ant_signal_state {
|
||||
BT_8821C_2ANT_SIG_STA_SET_TO_LOW = 0x0,
|
||||
BT_8821C_2ANT_SIG_STA_SET_BY_HW = 0x0,
|
||||
BT_8821C_2ANT_SIG_STA_SET_TO_HIGH = 0x1,
|
||||
BT_8821C_2ANT_SIG_STA_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_2ant_path_ctrl_owner {
|
||||
BT_8821C_2ANT_PCO_BTSIDE = 0x0,
|
||||
BT_8821C_2ANT_PCO_WLSIDE = 0x1,
|
||||
BT_8821C_2ANT_PCO_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_2ant_gnt_ctrl_type {
|
||||
BT_8821C_2ANT_GNT_TYPE_CTRL_BY_PTA = 0x0,
|
||||
BT_8821C_2ANT_GNT_TYPE_CTRL_BY_SW = 0x1,
|
||||
BT_8821C_2ANT_GNT_TYPE_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_2ant_gnt_ctrl_block {
|
||||
BT_8821C_2ANT_GNT_BLOCK_RFC_BB = 0x0,
|
||||
BT_8821C_2ANT_GNT_BLOCK_RFC = 0x1,
|
||||
BT_8821C_2ANT_GNT_BLOCK_BB = 0x2,
|
||||
BT_8821C_2ANT_GNT_BLOCK_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_2ant_lte_coex_table_type {
|
||||
BT_8821C_2ANT_CTT_WL_VS_LTE = 0x0,
|
||||
BT_8821C_2ANT_CTT_BT_VS_LTE = 0x1,
|
||||
BT_8821C_2ANT_CTT_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_2ant_lte_break_table_type {
|
||||
BT_8821C_2ANT_LBTT_WL_BREAK_LTE = 0x0,
|
||||
BT_8821C_2ANT_LBTT_BT_BREAK_LTE = 0x1,
|
||||
BT_8821C_2ANT_LBTT_LTE_BREAK_WL = 0x2,
|
||||
BT_8821C_2ANT_LBTT_LTE_BREAK_BT = 0x3,
|
||||
BT_8821C_2ANT_LBTT_MAX
|
||||
};
|
||||
|
||||
enum bt_info_src_8821c_2ant {
|
||||
BT_INFO_SRC_8821C_2ANT_WIFI_FW = 0x0,
|
||||
BT_INFO_SRC_8821C_2ANT_BT_RSP = 0x1,
|
||||
BT_INFO_SRC_8821C_2ANT_BT_ACTIVE_SEND = 0x2,
|
||||
BT_INFO_SRC_8821C_2ANT_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_2ant_bt_status {
|
||||
BT_8821C_2ANT_BT_STATUS_NON_CONNECTED_IDLE = 0x0,
|
||||
BT_8821C_2ANT_BT_STATUS_CONNECTED_IDLE = 0x1,
|
||||
BT_8821C_2ANT_BT_STATUS_INQ_PAGE = 0x2,
|
||||
BT_8821C_2ANT_BT_STATUS_ACL_BUSY = 0x3,
|
||||
BT_8821C_2ANT_BT_STATUS_SCO_BUSY = 0x4,
|
||||
BT_8821C_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5,
|
||||
BT_8821C_2ANT_BT_STATUS_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_2ant_coex_algo {
|
||||
BT_8821C_2ANT_COEX_ALGO_UNDEFINED = 0x0,
|
||||
BT_8821C_2ANT_COEX_ALGO_SCO = 0x1,
|
||||
BT_8821C_2ANT_COEX_ALGO_HID = 0x2,
|
||||
BT_8821C_2ANT_COEX_ALGO_A2DP = 0x3,
|
||||
BT_8821C_2ANT_COEX_ALGO_A2DP_PANHS = 0x4,
|
||||
BT_8821C_2ANT_COEX_ALGO_PANEDR = 0x5,
|
||||
BT_8821C_2ANT_COEX_ALGO_PANHS = 0x6,
|
||||
BT_8821C_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7,
|
||||
BT_8821C_2ANT_COEX_ALGO_PANEDR_HID = 0x8,
|
||||
BT_8821C_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9,
|
||||
BT_8821C_2ANT_COEX_ALGO_HID_A2DP = 0xa,
|
||||
BT_8821C_2ANT_COEX_ALGO_NOPROFILEBUSY = 0xb,
|
||||
BT_8821C_2ANT_COEX_ALGO_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_2ant_ext_ant_switch_ctrl_type {
|
||||
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW = 0x0,
|
||||
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_PTA = 0x1,
|
||||
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV = 0x2,
|
||||
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_MAC = 0x3,
|
||||
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_BY_BT = 0x4,
|
||||
BT_8821C_2ANT_EXT_ANT_SWITCH_CTRL_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_2ant_ext_ant_switch_pos_type {
|
||||
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_BT = 0x0,
|
||||
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLG = 0x1,
|
||||
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_WLA = 0x2,
|
||||
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_NOCARE = 0x3,
|
||||
BT_8821C_2ANT_EXT_ANT_SWITCH_MAIN_TO_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_2ant_ext_band_switch_pos_type {
|
||||
BT_8821C_2ANT_EXT_BAND_SWITCH_TO_WLG = 0x0,
|
||||
BT_8821C_2ANT_EXT_BAND_SWITCH_TO_WLA = 0x1,
|
||||
BT_8821C_2ANT_EXT_BAND_SWITCH_TO_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_2ant_int_block{
|
||||
BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_BTG = 0x0,
|
||||
BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_WLG_OF_WLAG = 0x1,
|
||||
BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_WLA_OF_WLAG = 0x2,
|
||||
BT_8821C_2ANT_INT_BLOCK_SWITCH_TO_MAX
|
||||
};
|
||||
|
||||
enum bt_8821c_2ant_phase{
|
||||
BT_8821C_2ANT_PHASE_COEX_INIT = 0x0,
|
||||
BT_8821C_2ANT_PHASE_WLANONLY_INIT = 0x1,
|
||||
BT_8821C_2ANT_PHASE_WLAN_OFF = 0x2,
|
||||
BT_8821C_2ANT_PHASE_2G_RUNTIME = 0x3,
|
||||
BT_8821C_2ANT_PHASE_5G_RUNTIME = 0x4,
|
||||
BT_8821C_2ANT_PHASE_BTMPMODE = 0x5,
|
||||
BT_8821C_2ANT_PHASE_MAX
|
||||
};
|
||||
|
||||
struct coex_dm_8821c_2ant {
|
||||
/* hw setting */
|
||||
u32 pre_ant_pos_type;
|
||||
u32 cur_ant_pos_type;
|
||||
/* fw mechanism */
|
||||
u8 pre_bt_dec_pwr_lvl;
|
||||
u8 cur_bt_dec_pwr_lvl;
|
||||
u8 pre_fw_dac_swing_lvl;
|
||||
u8 cur_fw_dac_swing_lvl;
|
||||
boolean cur_ignore_wlan_act;
|
||||
boolean pre_ignore_wlan_act;
|
||||
u8 pre_ps_tdma;
|
||||
u8 cur_ps_tdma;
|
||||
u8 ps_tdma_para[5];
|
||||
u8 ps_tdma_du_adj_type;
|
||||
boolean reset_tdma_adjust;
|
||||
boolean auto_tdma_adjust;
|
||||
boolean pre_ps_tdma_on;
|
||||
boolean cur_ps_tdma_on;
|
||||
boolean pre_bt_auto_report;
|
||||
boolean cur_bt_auto_report;
|
||||
|
||||
/* sw mechanism */
|
||||
boolean pre_rf_rx_lpf_shrink;
|
||||
boolean cur_rf_rx_lpf_shrink;
|
||||
u32 bt_rf_0x1e_backup;
|
||||
boolean pre_low_penalty_ra;
|
||||
boolean cur_low_penalty_ra;
|
||||
boolean pre_dac_swing_on;
|
||||
u32 pre_dac_swing_lvl;
|
||||
boolean cur_dac_swing_on;
|
||||
u32 cur_dac_swing_lvl;
|
||||
boolean pre_adc_back_off;
|
||||
boolean cur_adc_back_off;
|
||||
boolean pre_agc_table_en;
|
||||
boolean cur_agc_table_en;
|
||||
u32 pre_val0x6c0;
|
||||
u32 cur_val0x6c0;
|
||||
u32 pre_val0x6c4;
|
||||
u32 cur_val0x6c4;
|
||||
u32 pre_val0x6c8;
|
||||
u32 cur_val0x6c8;
|
||||
u8 pre_val0x6cc;
|
||||
u8 cur_val0x6cc;
|
||||
boolean limited_dig;
|
||||
|
||||
/* algorithm related */
|
||||
u8 pre_algorithm;
|
||||
u8 cur_algorithm;
|
||||
u8 bt_status;
|
||||
u8 wifi_chnl_info[3];
|
||||
|
||||
boolean need_recover0x948;
|
||||
u32 backup0x948;
|
||||
|
||||
u8 pre_lps;
|
||||
u8 cur_lps;
|
||||
u8 pre_rpwm;
|
||||
u8 cur_rpwm;
|
||||
|
||||
boolean is_switch_to_1dot5_ant;
|
||||
u8 switch_thres_offset;
|
||||
u32 arp_cnt;
|
||||
|
||||
u32 pre_ext_ant_switch_status;
|
||||
u32 cur_ext_ant_switch_status;
|
||||
|
||||
u8 pre_ext_band_switch_status;
|
||||
u8 cur_ext_band_switch_status;
|
||||
|
||||
u8 pre_int_block_status;
|
||||
u8 cur_int_block_status;
|
||||
};
|
||||
|
||||
struct coex_sta_8821c_2ant {
|
||||
boolean bt_disabled;
|
||||
boolean bt_link_exist;
|
||||
boolean sco_exist;
|
||||
boolean a2dp_exist;
|
||||
boolean hid_exist;
|
||||
boolean pan_exist;
|
||||
|
||||
boolean under_lps;
|
||||
boolean under_ips;
|
||||
u32 high_priority_tx;
|
||||
u32 high_priority_rx;
|
||||
u32 low_priority_tx;
|
||||
u32 low_priority_rx;
|
||||
u8 bt_rssi;
|
||||
boolean bt_tx_rx_mask;
|
||||
u8 pre_bt_rssi_state;
|
||||
u8 pre_wifi_rssi_state[4];
|
||||
boolean c2h_bt_info_req_sent;
|
||||
u8 bt_info_c2h[BT_INFO_SRC_8821C_2ANT_MAX][10];
|
||||
u32 bt_info_c2h_cnt[BT_INFO_SRC_8821C_2ANT_MAX];
|
||||
boolean bt_whck_test;
|
||||
boolean c2h_bt_inquiry_page;
|
||||
boolean c2h_bt_remote_name_req;
|
||||
u8 bt_retry_cnt;
|
||||
u8 bt_info_ext;
|
||||
u32 pop_event_cnt;
|
||||
u8 scan_ap_num;
|
||||
|
||||
u32 crc_ok_cck;
|
||||
u32 crc_ok_11g;
|
||||
u32 crc_ok_11n;
|
||||
u32 crc_ok_11n_agg;
|
||||
|
||||
u32 crc_err_cck;
|
||||
u32 crc_err_11g;
|
||||
u32 crc_err_11n;
|
||||
u32 crc_err_11n_agg;
|
||||
|
||||
|
||||
boolean cck_lock;
|
||||
boolean pre_ccklock;
|
||||
boolean cck_ever_lock;
|
||||
|
||||
u8 coex_table_type;
|
||||
boolean force_lps_on;
|
||||
|
||||
u8 dis_ver_info_cnt;
|
||||
|
||||
u8 a2dp_bit_pool;
|
||||
u8 cut_version;
|
||||
|
||||
boolean concurrent_rx_mode_on;
|
||||
|
||||
u16 score_board;
|
||||
u8 isolation_btween_wb; /* 0~ 50 */
|
||||
u8 wifi_coex_thres;
|
||||
u8 bt_coex_thres;
|
||||
u8 wifi_coex_thres2;
|
||||
u8 bt_coex_thres2;
|
||||
|
||||
u8 num_of_profile;
|
||||
boolean acl_busy;
|
||||
boolean wl_rf_off_on_event;
|
||||
boolean bt_create_connection;
|
||||
boolean run_time_state;
|
||||
boolean wifi_is_high_pri_task;
|
||||
u32 specific_pkt_period_cnt;
|
||||
u32 bt_coex_supported_feature;
|
||||
u32 bt_coex_supported_version;
|
||||
};
|
||||
|
||||
#define BT_8821C_2ANT_EXT_ANT_SWITCH_USE_DPDT 0
|
||||
#define BT_8821C_2ANT_EXT_ANT_SWITCH_USE_SPDT 1
|
||||
|
||||
#define BT_8821C_2ANT_EXT_BAND_SWITCH_USE_DPDT 0
|
||||
#define BT_8821C_2ANT_EXT_BAND_SWITCH_USE_SPDT 1
|
||||
|
||||
|
||||
struct rfe_type_8821c_2ant{
|
||||
|
||||
u8 rfe_module_type;
|
||||
boolean ext_ant_switch_exist;
|
||||
u8 ext_ant_switch_type; /* 0:DPDT, 1:SPDT */
|
||||
u8 ext_ant_switch_ctrl_polarity; /* iF 0: DPDT_P=0, DPDT_N=1 => BTG to Main, WL_A+G to Aux */
|
||||
|
||||
boolean ext_band_switch_exist;
|
||||
u8 ext_band_switch_type; /* 0:DPDT, 1:SPDT */
|
||||
u8 ext_band_switch_ctrl_polarity;
|
||||
|
||||
boolean wlg_Locate_at_btg; /* If true: WLG at BTG, If false: WLG at WLAG */
|
||||
|
||||
boolean ext_ant_switch_diversity; /* If diversity on */
|
||||
};
|
||||
|
||||
#define BT_8821C_2ANT_ANTDET_PSD_POINTS 256 /* MAX:1024 */
|
||||
#define BT_8821C_2ANT_ANTDET_PSD_AVGNUM 1 /* MAX:3 */
|
||||
#define BT_8821C_2ANT_ANTDET_BUF_LEN 16
|
||||
|
||||
struct psdscan_sta_8821c_2ant {
|
||||
|
||||
u32 ant_det_bt_le_channel; /* BT LE Channel ex:2412 */
|
||||
u32 ant_det_bt_tx_time;
|
||||
u32 ant_det_pre_psdscan_peak_val;
|
||||
boolean ant_det_is_ant_det_available;
|
||||
u32 ant_det_psd_scan_peak_val;
|
||||
boolean ant_det_is_btreply_available;
|
||||
u32 ant_det_psd_scan_peak_freq;
|
||||
|
||||
u8 ant_det_result;
|
||||
u8 ant_det_peak_val[BT_8821C_2ANT_ANTDET_BUF_LEN];
|
||||
u8 ant_det_peak_freq[BT_8821C_2ANT_ANTDET_BUF_LEN];
|
||||
u32 ant_det_try_count;
|
||||
u32 ant_det_fail_count;
|
||||
u32 ant_det_inteval_count;
|
||||
u32 ant_det_thres_offset;
|
||||
|
||||
u32 real_cent_freq;
|
||||
s32 real_offset;
|
||||
u32 real_span;
|
||||
|
||||
u32 psd_band_width; /* unit: Hz */
|
||||
u32 psd_point; /* 128/256/512/1024 */
|
||||
u32 psd_report[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_report_max_hold[1024]; /* unit:dB (20logx), 0~255 */
|
||||
u32 psd_start_point;
|
||||
u32 psd_stop_point;
|
||||
u32 psd_max_value_point;
|
||||
u32 psd_max_value;
|
||||
u32 psd_start_base;
|
||||
u32 psd_avg_num; /* 1/8/16/32 */
|
||||
u32 psd_gen_count;
|
||||
boolean is_psd_running;
|
||||
boolean is_psd_show_max_only;
|
||||
};
|
||||
|
||||
|
||||
/* *******************************************
|
||||
* The following is interface which will notify coex module.
|
||||
* ******************************************* */
|
||||
void ex_halbtc8821c2ant_power_on_setting(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821c2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821c2ant_init_hw_config(IN struct btc_coexist *btcoexist,
|
||||
IN boolean wifi_only);
|
||||
void ex_halbtc8821c2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821c2ant_ips_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821c2ant_lps_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821c2ant_scan_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821c2ant_switchband_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821c2ant_connect_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821c2ant_media_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821c2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821c2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 *tmp_buf, IN u8 length);
|
||||
void ex_halbtc8821c2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 type);
|
||||
void ex_halbtc8821c2ant_halt_notify(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821c2ant_pnp_notify(IN struct btc_coexist *btcoexist,
|
||||
IN u8 pnp_state);
|
||||
void ex_halbtc8821c2ant_periodical(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821c2ant_display_coex_info(IN struct btc_coexist *btcoexist);
|
||||
void ex_halbtc8821c2ant_antenna_detection(IN struct btc_coexist *btcoexist,
|
||||
IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
|
||||
void ex_halbtc8821c2ant_display_ant_detection(IN struct btc_coexist *btcoexist);
|
||||
|
||||
|
||||
#else
|
||||
#define ex_halbtc8821c2ant_power_on_setting(btcoexist)
|
||||
#define ex_halbtc8821c2ant_pre_load_firmware(btcoexist)
|
||||
#define ex_halbtc8821c2ant_init_hw_config(btcoexist, wifi_only)
|
||||
#define ex_halbtc8821c2ant_init_coex_dm(btcoexist)
|
||||
#define ex_halbtc8821c2ant_ips_notify(btcoexist, type)
|
||||
#define ex_halbtc8821c2ant_lps_notify(btcoexist, type)
|
||||
#define ex_halbtc8821c2ant_scan_notify(btcoexist, type)
|
||||
#define ex_halbtc8821c2ant_switchband_notify(btcoexist,type)
|
||||
#define ex_halbtc8821c2ant_connect_notify(btcoexist, type)
|
||||
#define ex_halbtc8821c2ant_media_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8821c2ant_specific_packet_notify(btcoexist, type)
|
||||
#define ex_halbtc8821c2ant_bt_info_notify(btcoexist, tmp_buf, length)
|
||||
#define ex_halbtc8821c2ant_rf_status_notify(btcoexist, type)
|
||||
#define ex_halbtc8821c2ant_halt_notify(btcoexist)
|
||||
#define ex_halbtc8821c2ant_pnp_notify(btcoexist, pnp_state)
|
||||
#define ex_halbtc8821c2ant_periodical(btcoexist)
|
||||
#define ex_halbtc8821c2ant_display_coex_info(btcoexist)
|
||||
#define ex_halbtc8821c2ant_display_ant_detection(btcoexist)
|
||||
#define ex_halbtc8821c2ant_antenna_detection(btcoexist, centFreq, offset, span, seconds)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,98 @@
|
||||
|
||||
#if DEV_BUS_TYPE == RT_USB_INTERFACE
|
||||
|
||||
#if defined(CONFIG_RTL8188E)
|
||||
#include "rtl8188e/HalEfuseMask8188E_USB.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8812A)
|
||||
#include "rtl8812a/HalEfuseMask8812A_USB.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8821A)
|
||||
#include "rtl8812a/HalEfuseMask8821A_USB.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8192E)
|
||||
#include "rtl8192e/HalEfuseMask8192E_USB.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8723B)
|
||||
#include "rtl8723b/HalEfuseMask8723B_USB.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8814A)
|
||||
#include "rtl8814a/HalEfuseMask8814A_USB.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8703B)
|
||||
#include "rtl8703b/HalEfuseMask8703B_USB.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8723D)
|
||||
#include "rtl8723d/HalEfuseMask8723D_USB.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8188F)
|
||||
#include "rtl8188f/HalEfuseMask8188F_USB.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8822B)
|
||||
#include "rtl8822b/HalEfuseMask8822B_USB.h"
|
||||
#endif
|
||||
|
||||
#elif DEV_BUS_TYPE == RT_PCI_INTERFACE
|
||||
|
||||
#if defined(CONFIG_RTL8188E)
|
||||
#include "rtl8188e/HalEfuseMask8188E_PCIE.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8812A)
|
||||
#include "rtl8812a/HalEfuseMask8812A_PCIE.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8821A)
|
||||
#include "rtl8812a/HalEfuseMask8821A_PCIE.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8192E)
|
||||
#include "rtl8192e/HalEfuseMask8192E_PCIE.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8723B)
|
||||
#include "rtl8723b/HalEfuseMask8723B_PCIE.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8814A)
|
||||
#include "rtl8814a/HalEfuseMask8814A_PCIE.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8703B)
|
||||
#include "rtl8703b/HalEfuseMask8703B_PCIE.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8822B)
|
||||
#include "rtl8822b/HalEfuseMask8822B_PCIE.h"
|
||||
#endif
|
||||
#if defined(CONFIG_RTL8723D)
|
||||
#include "rtl8723d/HalEfuseMask8723D_PCIE.h"
|
||||
#endif
|
||||
|
||||
#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
|
||||
|
||||
#if defined(CONFIG_RTL8188E)
|
||||
#include "rtl8188e/HalEfuseMask8188E_SDIO.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8703B)
|
||||
#include "rtl8703b/HalEfuseMask8703B_SDIO.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8188F)
|
||||
#include "rtl8188f/HalEfuseMask8188F_SDIO.h"
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTL8723D)
|
||||
#include "rtl8723d/HalEfuseMask8723D_SDIO.h"
|
||||
#endif
|
||||
#endif
|
||||
@@ -0,0 +1,96 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/*#include "Mp_Precomp.h"*/
|
||||
#include <drv_types.h>
|
||||
|
||||
#include "HalEfuseMask8723D_PCIE.h"
|
||||
|
||||
/******************************************************************************
|
||||
* MPCIE.TXT
|
||||
******************************************************************************/
|
||||
|
||||
u1Byte Array_MP_8723D_MPCIE[] = {
|
||||
0xFF,
|
||||
0xF3,
|
||||
0x00,
|
||||
0x0E,
|
||||
0x70,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x07,
|
||||
0xF3,
|
||||
0xFF,
|
||||
0xFF,
|
||||
0x7C,
|
||||
0x70,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
};
|
||||
|
||||
u2Byte
|
||||
EFUSE_GetArrayLen_MP_8723D_MPCIE(VOID)
|
||||
{
|
||||
return sizeof(Array_MP_8723D_MPCIE) / sizeof(u1Byte);
|
||||
}
|
||||
|
||||
VOID
|
||||
EFUSE_GetMaskArray_MP_8723D_MPCIE(
|
||||
IN OUT pu1Byte Array
|
||||
)
|
||||
{
|
||||
u2Byte len = EFUSE_GetArrayLen_MP_8723D_MPCIE(), i = 0;
|
||||
|
||||
for (i = 0; i < len; ++i)
|
||||
Array[i] = Array_MP_8723D_MPCIE[i];
|
||||
}
|
||||
BOOLEAN
|
||||
EFUSE_IsAddressMasked_MP_8723D_MPCIE(
|
||||
IN u2Byte Offset
|
||||
)
|
||||
{
|
||||
int r = Offset / 16;
|
||||
int c = (Offset % 16) / 2;
|
||||
int result = 0;
|
||||
|
||||
if (c < 4) /* Upper double word */
|
||||
result = (Array_MP_8723D_MPCIE[r] & (0x10 << c));
|
||||
else
|
||||
result = (Array_MP_8723D_MPCIE[r] & (0x01 << (c - 4)));
|
||||
|
||||
return (result > 0) ? 0 : 1;
|
||||
}
|
||||
@@ -0,0 +1,37 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* MPCIE.TXT
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
u2Byte
|
||||
EFUSE_GetArrayLen_MP_8723D_MPCIE(VOID);
|
||||
|
||||
VOID
|
||||
EFUSE_GetMaskArray_MP_8723D_MPCIE(
|
||||
IN OUT pu1Byte Array
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
EFUSE_IsAddressMasked_MP_8723D_MPCIE(/* TC: Test Chip, MP: MP Chip */
|
||||
IN u2Byte Offset
|
||||
);
|
||||
@@ -0,0 +1,93 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include <drv_types.h>
|
||||
#include "HalEfuseMask8723D_SDIO.h"
|
||||
|
||||
/******************************************************************************
|
||||
* MSDIO.TXT
|
||||
******************************************************************************/
|
||||
|
||||
u1Byte Array_MP_8723D_MSDIO[] = {
|
||||
0xFF,
|
||||
0xF3,
|
||||
0x00,
|
||||
0x0E,
|
||||
0x70,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x07,
|
||||
0xF3,
|
||||
0xFF,
|
||||
0xFF,
|
||||
0xFF,
|
||||
0xFF,
|
||||
0xFF,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
};
|
||||
|
||||
u2Byte
|
||||
EFUSE_GetArrayLen_MP_8723D_MSDIO(VOID)
|
||||
{
|
||||
return sizeof(Array_MP_8723D_MSDIO) / sizeof(u1Byte);
|
||||
}
|
||||
|
||||
VOID
|
||||
EFUSE_GetMaskArray_MP_8723D_MSDIO(
|
||||
IN OUT pu1Byte Array
|
||||
)
|
||||
{
|
||||
u2Byte len = EFUSE_GetArrayLen_MP_8723D_MSDIO(), i = 0;
|
||||
|
||||
for (i = 0; i < len; ++i)
|
||||
Array[i] = Array_MP_8723D_MSDIO[i];
|
||||
}
|
||||
BOOLEAN
|
||||
EFUSE_IsAddressMasked_MP_8723D_MSDIO(
|
||||
IN u2Byte Offset
|
||||
)
|
||||
{
|
||||
int r = Offset / 16;
|
||||
int c = (Offset % 16) / 2;
|
||||
int result = 0;
|
||||
/* Upper double word */
|
||||
if (c < 4)
|
||||
result = (Array_MP_8723D_MSDIO[r] & (0x10 << c));
|
||||
else
|
||||
result = (Array_MP_8723D_MSDIO[r] & (0x01 << (c - 4)));
|
||||
|
||||
return (result > 0) ? 0 : 1;
|
||||
}
|
||||
@@ -0,0 +1,35 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
* MSDIO.TXT
|
||||
******************************************************************************/
|
||||
|
||||
u2Byte
|
||||
EFUSE_GetArrayLen_MP_8723D_MSDIO(VOID);
|
||||
|
||||
VOID
|
||||
EFUSE_GetMaskArray_MP_8723D_MSDIO(
|
||||
IN OUT pu1Byte Array
|
||||
);
|
||||
/* TC: Test Chip, MP: MP Chip */
|
||||
BOOLEAN
|
||||
EFUSE_IsAddressMasked_MP_8723D_MSDIO(
|
||||
IN u2Byte Offset
|
||||
);
|
||||
@@ -0,0 +1,97 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/* #include "Mp_Precomp.h" */
|
||||
/* #include "../odm_precomp.h" */
|
||||
|
||||
#include <drv_types.h>
|
||||
#include "HalEfuseMask8723D_USB.h"
|
||||
/******************************************************************************
|
||||
* MUSB.TXT
|
||||
******************************************************************************/
|
||||
|
||||
u1Byte Array_MP_8723D_MUSB[] = {
|
||||
0xFF,
|
||||
0xF3,
|
||||
0x00,
|
||||
0x0E,
|
||||
0x70,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x07,
|
||||
0xF3,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0xFF,
|
||||
0xFF,
|
||||
0xFF,
|
||||
0xFF,
|
||||
0xB0,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
0x00,
|
||||
|
||||
};
|
||||
|
||||
u2Byte
|
||||
EFUSE_GetArrayLen_MP_8723D_MUSB(VOID)
|
||||
{
|
||||
return sizeof(Array_MP_8723D_MUSB) / sizeof(u1Byte);
|
||||
}
|
||||
|
||||
VOID
|
||||
EFUSE_GetMaskArray_MP_8723D_MUSB(
|
||||
IN OUT pu1Byte Array
|
||||
)
|
||||
{
|
||||
u2Byte len = EFUSE_GetArrayLen_MP_8723D_MUSB(), i = 0;
|
||||
|
||||
for (i = 0; i < len; ++i)
|
||||
Array[i] = Array_MP_8723D_MUSB[i];
|
||||
}
|
||||
BOOLEAN
|
||||
EFUSE_IsAddressMasked_MP_8723D_MUSB(
|
||||
IN u2Byte Offset
|
||||
)
|
||||
{
|
||||
int r = Offset / 16;
|
||||
int c = (Offset % 16) / 2;
|
||||
int result = 0;
|
||||
|
||||
if (c < 4) /* Upper double word */
|
||||
result = (Array_MP_8723D_MUSB[r] & (0x10 << c));
|
||||
else
|
||||
result = (Array_MP_8723D_MUSB[r] & (0x01 << (c - 4)));
|
||||
|
||||
return (result > 0) ? 0 : 1;
|
||||
}
|
||||
@@ -0,0 +1,39 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
* MUSB.TXT
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
u2Byte
|
||||
EFUSE_GetArrayLen_MP_8723D_MUSB(VOID);
|
||||
|
||||
VOID
|
||||
EFUSE_GetMaskArray_MP_8723D_MUSB(
|
||||
IN OUT pu1Byte Array
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
EFUSE_IsAddressMasked_MP_8723D_MUSB(/* TC: Test Chip, MP: MP Chip */
|
||||
IN u2Byte Offset
|
||||
);
|
||||
+4378
File diff suppressed because it is too large
Load Diff
+10413
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,117 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef __COMMON_C2H_H__
|
||||
#define __COMMON_C2H_H__
|
||||
|
||||
#define C2H_TYPE_REG 0
|
||||
#define C2H_TYPE_PKT 1
|
||||
|
||||
/*
|
||||
* C2H event format:
|
||||
* Fields TRIGGER PAYLOAD SEQ PLEN ID
|
||||
* BITS [127:120] [119:16] [15:8] [7:4] [3:0]
|
||||
*/
|
||||
#define C2H_ID(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)), 0, 4)
|
||||
#define C2H_PLEN(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)), 4, 4)
|
||||
#define C2H_SEQ(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)) + 1, 0, 8)
|
||||
#define C2H_PAYLOAD(_c2h) (((u8*)(_c2h)) + 2)
|
||||
|
||||
#define SET_C2H_ID(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)), 0, 4, _val)
|
||||
#define SET_C2H_PLEN(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)), 4, 4, _val)
|
||||
#define SET_C2H_SEQ(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)) + 1 , 0, 8, _val)
|
||||
|
||||
/*
|
||||
* C2H event format:
|
||||
* Fields TRIGGER PLEN PAYLOAD SEQ ID
|
||||
* BITS [127:120] [119:112] [111:16] [15:8] [7:0]
|
||||
*/
|
||||
#define C2H_ID_88XX(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)), 0, 8)
|
||||
#define C2H_SEQ_88XX(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)) + 1, 0, 8)
|
||||
#define C2H_PAYLOAD_88XX(_c2h) (((u8*)(_c2h)) + 2)
|
||||
#define C2H_PLEN_88XX(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)) + 14, 0, 8)
|
||||
#define C2H_TRIGGER_88XX(_c2h) LE_BITS_TO_1BYTE(((u8*)(_c2h)) + 15, 0, 8)
|
||||
|
||||
#define SET_C2H_ID_88XX(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)), 0, 8, _val)
|
||||
#define SET_C2H_SEQ_88XX(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)) + 1, 0, 8, _val)
|
||||
#define SET_C2H_PLEN_88XX(_c2h, _val) SET_BITS_TO_LE_1BYTE(((u8*)(_c2h)) + 14, 0, 8, _val)
|
||||
|
||||
typedef enum _C2H_EVT {
|
||||
C2H_DBG = 0x00,
|
||||
C2H_LB = 0x01,
|
||||
C2H_TXBF = 0x02,
|
||||
C2H_CCX_TX_RPT = 0x03,
|
||||
C2H_FW_SCAN_COMPLETE = 0x7,
|
||||
C2H_BT_INFO = 0x09,
|
||||
C2H_BT_MP_INFO = 0x0B,
|
||||
C2H_RA_RPT = 0x0C,
|
||||
C2H_RA_PARA_RPT = 0x0E,
|
||||
C2H_FW_CHNL_SWITCH_COMPLETE = 0x10,
|
||||
C2H_IQK_FINISH = 0x11,
|
||||
C2H_MAILBOX_STATUS = 0x15,
|
||||
C2H_P2P_RPORT = 0x16,
|
||||
C2H_MCC = 0x17,
|
||||
C2H_MAC_HIDDEN_RPT = 0x19,
|
||||
C2H_MAC_HIDDEN_RPT_2 = 0x1A,
|
||||
C2H_BCN_EARLY_RPT = 0x1E,
|
||||
C2H_DEFEATURE_DBG = 0x22,
|
||||
C2H_CUSTOMER_STR_RPT = 0x24,
|
||||
C2H_CUSTOMER_STR_RPT_2 = 0x25,
|
||||
C2H_DEFEATURE_RSVD = 0xFD,
|
||||
C2H_EXTEND = 0xff,
|
||||
} C2H_EVT;
|
||||
|
||||
typedef enum _EXTEND_C2H_EVT {
|
||||
EXTEND_C2H_DBG_PRINT = 0
|
||||
} EXTEND_C2H_EVT;
|
||||
|
||||
#define C2H_REG_LEN 16
|
||||
|
||||
/* C2H_IQK_FINISH, 0x11 */
|
||||
#define IQK_OFFLOAD_LEN 1
|
||||
void c2h_iqk_offload(_adapter *adapter, u8 *data, u8 len);
|
||||
int c2h_iqk_offload_wait(_adapter *adapter, u32 timeout_ms);
|
||||
#define rtl8812_iqk_wait c2h_iqk_offload_wait /* TODO: remove this after phydm call c2h_iqk_offload_wait instead */
|
||||
|
||||
#ifdef CONFIG_RTW_MAC_HIDDEN_RPT
|
||||
/* C2H_MAC_HIDDEN_RPT, 0x19 */
|
||||
#define MAC_HIDDEN_RPT_LEN 8
|
||||
int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len);
|
||||
|
||||
/* C2H_MAC_HIDDEN_RPT_2, 0x1A */
|
||||
#define MAC_HIDDEN_RPT_2_LEN 5
|
||||
int c2h_mac_hidden_rpt_2_hdl(_adapter *adapter, u8 *data, u8 len);
|
||||
int hal_read_mac_hidden_rpt(_adapter *adapter);
|
||||
#endif /* CONFIG_RTW_MAC_HIDDEN_RPT */
|
||||
|
||||
/* C2H_DEFEATURE_DBG, 0x22 */
|
||||
#define DEFEATURE_DBG_LEN 1
|
||||
int c2h_defeature_dbg_hdl(_adapter *adapter, u8 *data, u8 len);
|
||||
|
||||
#ifdef CONFIG_RTW_CUSTOMER_STR
|
||||
/* C2H_CUSTOMER_STR_RPT, 0x24 */
|
||||
#define CUSTOMER_STR_RPT_LEN 8
|
||||
int c2h_customer_str_rpt_hdl(_adapter *adapter, u8 *data, u8 len);
|
||||
|
||||
/* C2H_CUSTOMER_STR_RPT_2, 0x25 */
|
||||
#define CUSTOMER_STR_RPT_2_LEN 8
|
||||
int c2h_customer_str_rpt_2_hdl(_adapter *adapter, u8 *data, u8 len);
|
||||
#endif /* CONFIG_RTW_CUSTOMER_STR */
|
||||
|
||||
#endif /* __COMMON_C2H_H__ */
|
||||
File diff suppressed because it is too large
Load Diff
+217
@@ -0,0 +1,217 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2014 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include <drv_types.h>
|
||||
#include <hal_data.h>
|
||||
|
||||
/* A mapping from HalData to ODM. */
|
||||
ODM_BOARD_TYPE_E boardType(u8 InterfaceSel)
|
||||
{
|
||||
ODM_BOARD_TYPE_E board = ODM_BOARD_DEFAULT;
|
||||
|
||||
#ifdef CONFIG_PCI_HCI
|
||||
INTERFACE_SELECT_PCIE pcie = (INTERFACE_SELECT_PCIE)InterfaceSel;
|
||||
switch (pcie) {
|
||||
case INTF_SEL0_SOLO_MINICARD:
|
||||
board |= ODM_BOARD_MINICARD;
|
||||
break;
|
||||
case INTF_SEL1_BT_COMBO_MINICARD:
|
||||
board |= ODM_BOARD_BT;
|
||||
board |= ODM_BOARD_MINICARD;
|
||||
break;
|
||||
default:
|
||||
board = ODM_BOARD_DEFAULT;
|
||||
break;
|
||||
}
|
||||
|
||||
#elif defined(CONFIG_USB_HCI)
|
||||
INTERFACE_SELECT_USB usb = (INTERFACE_SELECT_USB)InterfaceSel;
|
||||
switch (usb) {
|
||||
case INTF_SEL1_USB_High_Power:
|
||||
board |= ODM_BOARD_EXT_LNA;
|
||||
board |= ODM_BOARD_EXT_PA;
|
||||
break;
|
||||
case INTF_SEL2_MINICARD:
|
||||
board |= ODM_BOARD_MINICARD;
|
||||
break;
|
||||
case INTF_SEL4_USB_Combo:
|
||||
board |= ODM_BOARD_BT;
|
||||
break;
|
||||
case INTF_SEL5_USB_Combo_MF:
|
||||
board |= ODM_BOARD_BT;
|
||||
break;
|
||||
case INTF_SEL0_USB:
|
||||
case INTF_SEL3_USB_Solo:
|
||||
default:
|
||||
board = ODM_BOARD_DEFAULT;
|
||||
break;
|
||||
}
|
||||
|
||||
#endif
|
||||
/* RTW_INFO("===> boardType(): (pHalData->InterfaceSel, pDM_Odm->BoardType) = (%d, %d)\n", InterfaceSel, board); */
|
||||
|
||||
return board;
|
||||
}
|
||||
|
||||
void Init_ODM_ComInfo(_adapter *adapter)
|
||||
{
|
||||
struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
|
||||
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(adapter);
|
||||
PDM_ODM_T pDM_Odm = &(pHalData->odmpriv);
|
||||
struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv;
|
||||
struct mlme_priv *pmlmepriv = &adapter->mlmepriv;
|
||||
struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
|
||||
int i;
|
||||
|
||||
_rtw_memset(pDM_Odm, 0, sizeof(*pDM_Odm));
|
||||
|
||||
pDM_Odm->Adapter = adapter;
|
||||
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PLATFORM, ODM_CE);
|
||||
|
||||
rtw_odm_init_ic_type(adapter);
|
||||
|
||||
if (rtw_get_intf_type(adapter) == RTW_GSPI)
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_INTERFACE, ODM_ITRF_SDIO);
|
||||
else
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_INTERFACE, rtw_get_intf_type(adapter));
|
||||
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(pHalData->VersionID));
|
||||
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PATCH_ID, pHalData->CustomerID);
|
||||
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BWIFI_TEST, adapter->registrypriv.wifi_spec);
|
||||
|
||||
|
||||
if (pHalData->rf_type == RF_1T1R)
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R);
|
||||
else if (pHalData->rf_type == RF_1T2R)
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R);
|
||||
else if (pHalData->rf_type == RF_2T2R)
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R);
|
||||
else if (pHalData->rf_type == RF_2T2R_GREEN)
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R_GREEN);
|
||||
else if (pHalData->rf_type == RF_2T3R)
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T3R);
|
||||
else if (pHalData->rf_type == RF_2T4R)
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T4R);
|
||||
else if (pHalData->rf_type == RF_3T3R)
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_3T3R);
|
||||
else if (pHalData->rf_type == RF_3T4R)
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_3T4R);
|
||||
else if (pHalData->rf_type == RF_4T4R)
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_4T4R);
|
||||
else
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_XTXR);
|
||||
|
||||
|
||||
{
|
||||
/* 1 ======= BoardType: ODM_CMNINFO_BOARD_TYPE ======= */
|
||||
u8 odm_board_type = ODM_BOARD_DEFAULT;
|
||||
|
||||
if (pHalData->ExternalLNA_2G != 0) {
|
||||
odm_board_type |= ODM_BOARD_EXT_LNA;
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_LNA, 1);
|
||||
}
|
||||
if (pHalData->ExternalLNA_5G != 0) {
|
||||
odm_board_type |= ODM_BOARD_EXT_LNA_5G;
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_LNA, 1);
|
||||
}
|
||||
if (pHalData->ExternalPA_2G != 0) {
|
||||
odm_board_type |= ODM_BOARD_EXT_PA;
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_PA, 1);
|
||||
}
|
||||
if (pHalData->ExternalPA_5G != 0) {
|
||||
odm_board_type |= ODM_BOARD_EXT_PA_5G;
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_PA, 1);
|
||||
}
|
||||
if (pHalData->EEPROMBluetoothCoexist)
|
||||
odm_board_type |= ODM_BOARD_BT;
|
||||
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BOARD_TYPE, odm_board_type);
|
||||
/* 1 ============== End of BoardType ============== */
|
||||
}
|
||||
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_2G, pHalData->Regulation2_4G);
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_5G, pHalData->Regulation5G);
|
||||
|
||||
#ifdef CONFIG_DFS_MASTER
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DFS_REGION_DOMAIN, adapter->registrypriv.dfs_region_domain);
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_DFS_MASTER_ENABLE, &(adapter_to_rfctl(adapter)->dfs_master_enabled));
|
||||
#endif
|
||||
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GPA, pHalData->TypeGPA);
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_APA, pHalData->TypeAPA);
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GLNA, pHalData->TypeGLNA);
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_ALNA, pHalData->TypeALNA);
|
||||
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RFE_TYPE, pHalData->RFEType);
|
||||
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_TRSW, 0);
|
||||
|
||||
/*Add by YuChen for kfree init*/
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_REGRFKFREEENABLE, adapter->registrypriv.RegPwrTrimEnable);
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RFKFREEENABLE, pHalData->RfKFreeEnable);
|
||||
|
||||
/*Antenna diversity relative parameters*/
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType);
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BE_FIX_TX_ANT, pHalData->b_fix_tx_ant);
|
||||
ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_WITH_EXT_ANTENNA_SWITCH, pHalData->with_extenal_ant_switch);
|
||||
|
||||
/*Add by YuChen for adaptivity init*/
|
||||
phydm_adaptivityInfoInit(pDM_Odm, PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE, (adapter->registrypriv.adaptivity_mode != 0) ? TRUE : FALSE);
|
||||
phydm_adaptivityInfoInit(pDM_Odm, PHYDM_ADAPINFO_DCBACKOFF, adapter->registrypriv.adaptivity_dc_backoff);
|
||||
phydm_adaptivityInfoInit(pDM_Odm, PHYDM_ADAPINFO_DYNAMICLINKADAPTIVITY, (adapter->registrypriv.adaptivity_dml != 0) ? TRUE : FALSE);
|
||||
phydm_adaptivityInfoInit(pDM_Odm, PHYDM_ADAPINFO_TH_L2H_INI, adapter->registrypriv.adaptivity_th_l2h_ini);
|
||||
phydm_adaptivityInfoInit(pDM_Odm, PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF, adapter->registrypriv.adaptivity_th_edcca_hl_diff);
|
||||
|
||||
|
||||
/* Pointer reference */
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_TX_UNI, &(dvobj->traffic_stat.tx_bytes));
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_RX_UNI, &(dvobj->traffic_stat.rx_bytes));
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_WM_MODE, &(pmlmeext->cur_wireless_mode));
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BAND, &(pHalData->CurrentBandType));
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_RATE, &(pHalData->ForcedDataRate));
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_IGI_LB, &(pHalData->u1ForcedIgiLb));
|
||||
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SEC_CHNL_OFFSET, &(pHalData->nCur40MhzPrimeSC));
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SEC_MODE, &(adapter->securitypriv.dot11PrivacyAlgrthm));
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BW, &(pHalData->CurrentChannelBW));
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_CHNL, &(pHalData->CurrentChannel));
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_NET_CLOSED, &(adapter->net_closed));
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_IGI_LB, &(pHalData->u1ForcedIgiLb));
|
||||
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SCAN, &(pmlmepriv->bScanInProcess));
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_POWER_SAVING, &(pwrctl->bpower_saving));
|
||||
/*Add by Yuchen for phydm beamforming*/
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_TX_TP, &(dvobj->traffic_stat.cur_tx_tp));
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_RX_TP, &(dvobj->traffic_stat.cur_rx_tp));
|
||||
#ifdef CONFIG_USB_HCI
|
||||
ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_HUBUSBMODE, &(dvobj->usb_speed));
|
||||
#endif
|
||||
for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++)
|
||||
ODM_CmnInfoPtrArrayHook(pDM_Odm, ODM_CMNINFO_STA_STATUS, i, NULL);
|
||||
|
||||
PHYDM_InitDebugSetting(pDM_Odm);
|
||||
|
||||
/* TODO */
|
||||
/* ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BT_OPERATION, _FALSE); */
|
||||
/* ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BT_DISABLE_EDCA, _FALSE); */
|
||||
}
|
||||
@@ -0,0 +1,25 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef __HAL_DM_H__
|
||||
#define __HAL_DM_H__
|
||||
|
||||
void Init_ODM_ComInfo(_adapter *adapter);
|
||||
|
||||
#endif /* __HAL_DM_H__ */
|
||||
+2379
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,118 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
#ifndef _HAL_HALMAC_H_
|
||||
#define _HAL_HALMAC_H_
|
||||
|
||||
#include <drv_types.h> /* adapter_to_dvobj(), struct intf_hdl and etc. */
|
||||
#include "halmac/halmac_api.h" /* PHALMAC_ADAPTER and etc. */
|
||||
|
||||
/* HALMAC Definition for Driver */
|
||||
#define RTW_HALMAC_H2C_MAX_SIZE HALMAC_H2C_CMD_ORIGINAL_SIZE_88XX
|
||||
#define RTW_HALMAC_BA_SSN_RPT_SIZE 4
|
||||
|
||||
#define dvobj_set_halmac(d, mac) ((d)->halmac = (mac))
|
||||
#define dvobj_to_halmac(d) ((PHALMAC_ADAPTER)((d)->halmac))
|
||||
#define adapter_to_halmac(p) dvobj_to_halmac(adapter_to_dvobj(p))
|
||||
|
||||
/* for H2C cmd */
|
||||
#define MAX_H2C_BOX_NUMS 4
|
||||
#define MESSAGE_BOX_SIZE 4
|
||||
#define EX_MESSAGE_BOX_SIZE 4
|
||||
|
||||
typedef enum _RTW_HALMAC_MODE {
|
||||
RTW_HALMAC_MODE_NORMAL,
|
||||
RTW_HALMAC_MODE_WIFI_TEST,
|
||||
} RTW_HALMAC_MODE;
|
||||
|
||||
extern HALMAC_PLATFORM_API rtw_halmac_platform_api;
|
||||
|
||||
/* HALMAC API for Driver(HAL) */
|
||||
u8 rtw_halmac_read8(struct intf_hdl *, u32 addr);
|
||||
u16 rtw_halmac_read16(struct intf_hdl *, u32 addr);
|
||||
u32 rtw_halmac_read32(struct intf_hdl *, u32 addr);
|
||||
void rtw_halmac_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
|
||||
#ifdef CONFIG_SDIO_INDIRECT_ACCESS
|
||||
u8 rtw_halmac_iread8(struct intf_hdl *pintfhdl, u32 addr);
|
||||
u16 rtw_halmac_iread16(struct intf_hdl *pintfhdl, u32 addr);
|
||||
u32 rtw_halmac_iread32(struct intf_hdl *pintfhdl, u32 addr);
|
||||
#endif
|
||||
int rtw_halmac_write8(struct intf_hdl *, u32 addr, u8 value);
|
||||
int rtw_halmac_write16(struct intf_hdl *, u32 addr, u16 value);
|
||||
int rtw_halmac_write32(struct intf_hdl *, u32 addr, u32 value);
|
||||
|
||||
int rtw_halmac_init_adapter(struct dvobj_priv *, PHALMAC_PLATFORM_API);
|
||||
int rtw_halmac_deinit_adapter(struct dvobj_priv *);
|
||||
int rtw_halmac_poweron(struct dvobj_priv *);
|
||||
int rtw_halmac_poweroff(struct dvobj_priv *);
|
||||
int rtw_halmac_init_hal(struct dvobj_priv *);
|
||||
int rtw_halmac_init_hal_fw(struct dvobj_priv *, u8 *fw, u32 fwsize);
|
||||
int rtw_halmac_init_hal_fw_file(struct dvobj_priv *, u8 *fwpath);
|
||||
int rtw_halmac_deinit_hal(struct dvobj_priv *);
|
||||
int rtw_halmac_self_verify(struct dvobj_priv *);
|
||||
int rtw_halmac_dlfw(struct dvobj_priv *, u8 *fw, u32 fwsize);
|
||||
int rtw_halmac_dlfw_from_file(struct dvobj_priv *, u8 *fwpath);
|
||||
int rtw_halmac_phy_power_switch(struct dvobj_priv *, u8 enable);
|
||||
int rtw_halmac_send_h2c(struct dvobj_priv *, u8 *h2c);
|
||||
int rtw_halmac_c2h_handle(struct dvobj_priv *, u8 *c2h, u32 size);
|
||||
|
||||
int rtw_halmac_get_physical_efuse_size(struct dvobj_priv *, u32 *size);
|
||||
int rtw_halmac_read_physical_efuse_map(struct dvobj_priv *, u8 *map, u32 size);
|
||||
int rtw_halmac_read_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
|
||||
int rtw_halmac_write_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
|
||||
int rtw_halmac_get_logical_efuse_size(struct dvobj_priv *, u32 *size);
|
||||
int rtw_halmac_read_logical_efuse_map(struct dvobj_priv *, u8 *map, u32 size);
|
||||
int rtw_halmac_write_logical_efuse_map(struct dvobj_priv *, u8 *map, u32 size, u8 *maskmap, u32 masksize);
|
||||
int rtw_halmac_read_logical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
|
||||
int rtw_halmac_write_logical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
|
||||
|
||||
int rtw_halmac_write_bt_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
|
||||
int rtw_halmac_read_bt_physical_efuse_map(struct dvobj_priv *, u8 *map, u32 size);
|
||||
|
||||
int rtw_halmac_config_rx_info(struct dvobj_priv *, HALMAC_DRV_INFO);
|
||||
int rtw_halmac_set_mac_address(struct dvobj_priv *, enum _hw_port, u8 *addr);
|
||||
int rtw_halmac_set_bssid(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr);
|
||||
|
||||
int rtw_halmac_set_bandwidth(struct dvobj_priv *, u8 channel, u8 pri_ch_idx, u8 bw);
|
||||
int rtw_halmac_rx_agg_switch(struct dvobj_priv *, u8 enable);
|
||||
int rtw_halmac_get_hw_value(struct dvobj_priv *d, HALMAC_HW_ID hw_id, VOID *pvalue);
|
||||
|
||||
int rtw_halmac_get_wow_reason(struct dvobj_priv *, u8 *reason);
|
||||
int rtw_halmac_get_drv_info_sz(struct dvobj_priv *d, u8 *sz);
|
||||
|
||||
int rtw_halmac_get_rsvd_drv_pg_bndy(struct dvobj_priv *dvobj, u16 *drv_pg);
|
||||
int rtw_halmac_download_rsvd_page(struct dvobj_priv *dvobj, u8 pg_offset, u8 *pbuf, u32 size);
|
||||
|
||||
#ifdef CONFIG_SDIO_HCI
|
||||
int rtw_halmac_query_tx_page_num(struct dvobj_priv *);
|
||||
int rtw_halmac_get_tx_queue_page_num(struct dvobj_priv *, u8 queue, u32 *page);
|
||||
u32 rtw_halmac_sdio_get_tx_addr(struct dvobj_priv *, u8 *desc, u32 size);
|
||||
int rtw_halmac_sdio_tx_allowed(struct dvobj_priv *, u8 *buf, u32 size);
|
||||
u32 rtw_halmac_sdio_get_rx_addr(struct dvobj_priv *, u8 *seq);
|
||||
#endif /* CONFIG_SDIO_HCI */
|
||||
|
||||
#ifdef CONFIG_USB_HCI
|
||||
u8 rtw_halmac_usb_get_bulkout_id(struct dvobj_priv *, u8 *buf, u32 size);
|
||||
u8 rtw_halmac_switch_usb_mode(struct dvobj_priv *d, enum RTW_USB_SPEED usb_mode);
|
||||
#endif /* CONFIG_USB_HCI */
|
||||
|
||||
#ifdef CONFIG_SUPPORT_TRX_SHARED
|
||||
void dump_trx_share_mode(void *sel, _adapter *adapter);
|
||||
#endif
|
||||
#endif /* _HAL_HALMAC_H_ */
|
||||
@@ -0,0 +1,297 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
#define _HAL_SDIO_C_
|
||||
|
||||
#include <drv_types.h>
|
||||
#include <hal_data.h>
|
||||
|
||||
#ifndef RTW_HALMAC
|
||||
static void dump_sdio_f0(PADAPTER padapter)
|
||||
{
|
||||
char str_out[128];
|
||||
char str_val[8];
|
||||
char *p = NULL;
|
||||
int index = 0, i = 0;
|
||||
u8 val8 = 0, len = 0;
|
||||
|
||||
RTW_ERR("Dump SDIO function_0 register:\n");
|
||||
for (index = 0 ; index < 0x100 ; index += 16) {
|
||||
p = &str_out[0];
|
||||
len = snprintf(str_val, sizeof(str_val),
|
||||
"0x%02x: ", index);
|
||||
strncpy(str_out, str_val, len);
|
||||
p += len;
|
||||
|
||||
for (i = 0 ; i < 16 ; i++) {
|
||||
len = snprintf(str_val, sizeof(str_val), "%02x ",
|
||||
rtw_sd_f0_read8(padapter, index + i));
|
||||
strncpy(p, str_val, len);
|
||||
p += len;
|
||||
}
|
||||
RTW_INFO("%s\n", str_out);
|
||||
_rtw_memset(&str_out, '\0', sizeof(str_out));
|
||||
}
|
||||
}
|
||||
|
||||
static void dump_sdio_local(PADAPTER padapter)
|
||||
{
|
||||
char str_out[128];
|
||||
char str_val[8];
|
||||
char *p = NULL;
|
||||
int index = 0, i = 0;
|
||||
u8 val8 = 0, len = 0;
|
||||
|
||||
RTW_ERR("Dump SDIO local register:\n");
|
||||
for (index = 0 ; index < 0x100 ; index += 16) {
|
||||
p = &str_out[0];
|
||||
len = snprintf(str_val, sizeof(str_val),
|
||||
"0x%02x: ", index);
|
||||
strncpy(str_out, str_val, len);
|
||||
p += len;
|
||||
|
||||
for (i = 0 ; i < 16 ; i++) {
|
||||
len = snprintf(str_val, sizeof(str_val), "%02x ",
|
||||
rtw_read8(padapter, (0x1025 << 16) | (index + i)));
|
||||
strncpy(p, str_val, len);
|
||||
p += len;
|
||||
}
|
||||
RTW_INFO("%s\n", str_out);
|
||||
_rtw_memset(&str_out, '\0', sizeof(str_out));
|
||||
}
|
||||
}
|
||||
|
||||
static void dump_mac_page0(PADAPTER padapter)
|
||||
{
|
||||
char str_out[128];
|
||||
char str_val[8];
|
||||
char *p = NULL;
|
||||
int index = 0, i = 0;
|
||||
u8 val8 = 0, len = 0;
|
||||
|
||||
RTW_ERR("Dump MAC Page0 register:\n");
|
||||
for (index = 0 ; index < 0x100 ; index += 16) {
|
||||
p = &str_out[0];
|
||||
len = snprintf(str_val, sizeof(str_val),
|
||||
"0x%02x: ", index);
|
||||
strncpy(str_out, str_val, len);
|
||||
p += len;
|
||||
|
||||
for (i = 0 ; i < 16 ; i++) {
|
||||
len = snprintf(str_val, sizeof(str_val), "%02x ",
|
||||
rtw_read8(padapter, index + i));
|
||||
strncpy(p, str_val, len);
|
||||
p += len;
|
||||
}
|
||||
RTW_INFO("%s\n", str_out);
|
||||
_rtw_memset(&str_out, '\0', sizeof(str_out));
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Description:
|
||||
* Call this function to make sure power on successfully
|
||||
*
|
||||
* Return:
|
||||
* _SUCCESS enable success
|
||||
* _FAIL enable fail
|
||||
*/
|
||||
bool sdio_power_on_check(PADAPTER padapter) {
|
||||
u32 val_offset0, val_offset1, val_offset2, val_offset3;
|
||||
u32 val_mix = 0;
|
||||
u32 res = 0;
|
||||
bool ret = _FAIL;
|
||||
int index = 0;
|
||||
|
||||
val_offset0 = rtw_read8(padapter, REG_CR);
|
||||
val_offset1 = rtw_read8(padapter, REG_CR + 1);
|
||||
val_offset2 = rtw_read8(padapter, REG_CR + 2);
|
||||
val_offset3 = rtw_read8(padapter, REG_CR + 3);
|
||||
|
||||
if (val_offset0 == 0xEA || val_offset1 == 0xEA ||
|
||||
val_offset2 == 0xEA || val_offset3 == 0xEA) {
|
||||
RTW_INFO("%s: power on fail, do Power on again\n", __func__);
|
||||
goto _exit;
|
||||
}
|
||||
|
||||
val_mix = val_offset3 << 24 | val_mix;
|
||||
val_mix = val_offset2 << 16 | val_mix;
|
||||
val_mix = val_offset1 << 8 | val_mix;
|
||||
val_mix = val_offset0 | val_mix;
|
||||
|
||||
res = rtw_read32(padapter, REG_CR);
|
||||
|
||||
RTW_INFO("%s: val_mix:0x%08x, res:0x%08x\n", __func__, val_mix, res);
|
||||
|
||||
while (index < 100) {
|
||||
if (res == val_mix) {
|
||||
RTW_INFO("%s: 0x100 the result of cmd52 and cmd53 is the same.\n", __func__);
|
||||
ret = _SUCCESS;
|
||||
break;
|
||||
} else {
|
||||
RTW_INFO("%s: 0x100 cmd52 and cmd53 is not the same(index:%d).\n", __func__, index);
|
||||
res = rtw_read32(padapter, REG_CR);
|
||||
index++;
|
||||
ret = _FAIL;
|
||||
}
|
||||
}
|
||||
|
||||
if (ret) {
|
||||
index = 0;
|
||||
while (index < 100) {
|
||||
rtw_write32(padapter, 0x1B8, 0x12345678);
|
||||
res = rtw_read32(padapter, 0x1B8);
|
||||
if (res == 0x12345678) {
|
||||
RTW_INFO("%s: 0x1B8 test Pass.\n", __func__);
|
||||
ret = _SUCCESS;
|
||||
break;
|
||||
} else {
|
||||
index++;
|
||||
RTW_INFO("%s: 0x1B8 test Fail(index: %d).\n", __func__, index);
|
||||
ret = _FAIL;
|
||||
}
|
||||
}
|
||||
} else
|
||||
RTW_INFO("%s: fail at cmd52, cmd53.\n", __func__);
|
||||
|
||||
_exit:
|
||||
if (ret == _FAIL) {
|
||||
dump_sdio_f0(padapter);
|
||||
dump_sdio_local(padapter);
|
||||
dump_mac_page0(padapter);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
u8 rtw_hal_sdio_max_txoqt_free_space(_adapter *padapter)
|
||||
{
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
||||
|
||||
if (pHalData->SdioTxOQTMaxFreeSpace < 8)
|
||||
pHalData->SdioTxOQTMaxFreeSpace = 8;
|
||||
|
||||
return pHalData->SdioTxOQTMaxFreeSpace;
|
||||
}
|
||||
|
||||
u8 rtw_hal_sdio_query_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum)
|
||||
{
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
||||
|
||||
if ((pHalData->SdioTxFIFOFreePage[PageIdx] + pHalData->SdioTxFIFOFreePage[PUBLIC_QUEUE_IDX]) >= (RequiredPageNum))
|
||||
return _TRUE;
|
||||
else
|
||||
return _FALSE;
|
||||
}
|
||||
|
||||
void rtw_hal_sdio_update_tx_freepage(_adapter *padapter, u8 PageIdx, u8 RequiredPageNum)
|
||||
{
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
||||
u8 DedicatedPgNum = 0;
|
||||
u8 RequiredPublicFreePgNum = 0;
|
||||
/* _irqL irql; */
|
||||
|
||||
/* _enter_critical_bh(&pHalData->SdioTxFIFOFreePageLock, &irql); */
|
||||
|
||||
DedicatedPgNum = pHalData->SdioTxFIFOFreePage[PageIdx];
|
||||
if (RequiredPageNum <= DedicatedPgNum)
|
||||
pHalData->SdioTxFIFOFreePage[PageIdx] -= RequiredPageNum;
|
||||
else {
|
||||
pHalData->SdioTxFIFOFreePage[PageIdx] = 0;
|
||||
RequiredPublicFreePgNum = RequiredPageNum - DedicatedPgNum;
|
||||
pHalData->SdioTxFIFOFreePage[PUBLIC_QUEUE_IDX] -= RequiredPublicFreePgNum;
|
||||
}
|
||||
|
||||
/* _exit_critical_bh(&pHalData->SdioTxFIFOFreePageLock, &irql); */
|
||||
}
|
||||
|
||||
void rtw_hal_set_sdio_tx_max_length(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ)
|
||||
{
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
||||
u32 page_size;
|
||||
u32 lenHQ, lenNQ, lenLQ;
|
||||
|
||||
rtw_hal_get_def_var(padapter, HAL_DEF_TX_PAGE_SIZE, &page_size);
|
||||
|
||||
lenHQ = ((numHQ + numPubQ) >> 1) * page_size;
|
||||
lenNQ = ((numNQ + numPubQ) >> 1) * page_size;
|
||||
lenLQ = ((numLQ + numPubQ) >> 1) * page_size;
|
||||
|
||||
pHalData->sdio_tx_max_len[HI_QUEUE_IDX] = (lenHQ > MAX_XMITBUF_SZ) ? MAX_XMITBUF_SZ : lenHQ;
|
||||
pHalData->sdio_tx_max_len[MID_QUEUE_IDX] = (lenNQ > MAX_XMITBUF_SZ) ? MAX_XMITBUF_SZ : lenNQ;
|
||||
pHalData->sdio_tx_max_len[LOW_QUEUE_IDX] = (lenLQ > MAX_XMITBUF_SZ) ? MAX_XMITBUF_SZ : lenLQ;
|
||||
}
|
||||
|
||||
u32 rtw_hal_get_sdio_tx_max_length(PADAPTER padapter, u8 queue_idx)
|
||||
{
|
||||
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
|
||||
u32 deviceId, max_len;
|
||||
|
||||
|
||||
deviceId = ffaddr2deviceId(pdvobjpriv, queue_idx);
|
||||
switch (deviceId) {
|
||||
case WLAN_TX_HIQ_DEVICE_ID:
|
||||
max_len = pHalData->sdio_tx_max_len[HI_QUEUE_IDX];
|
||||
break;
|
||||
|
||||
case WLAN_TX_MIQ_DEVICE_ID:
|
||||
max_len = pHalData->sdio_tx_max_len[MID_QUEUE_IDX];
|
||||
break;
|
||||
|
||||
case WLAN_TX_LOQ_DEVICE_ID:
|
||||
max_len = pHalData->sdio_tx_max_len[LOW_QUEUE_IDX];
|
||||
break;
|
||||
|
||||
default:
|
||||
max_len = pHalData->sdio_tx_max_len[MID_QUEUE_IDX];
|
||||
break;
|
||||
}
|
||||
|
||||
return max_len;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_FW_C2H_REG
|
||||
void sd_c2h_hisr_hdl(_adapter *adapter)
|
||||
{
|
||||
u8 c2h_evt[C2H_REG_LEN] = {0};
|
||||
u8 id, seq, plen;
|
||||
u8 *payload;
|
||||
|
||||
if (rtw_hal_c2h_evt_read(adapter, c2h_evt) != _SUCCESS)
|
||||
goto exit;
|
||||
|
||||
if (rtw_hal_c2h_reg_hdr_parse(adapter, c2h_evt, &id, &seq, &plen, &payload) != _SUCCESS)
|
||||
goto exit;
|
||||
|
||||
if (rtw_hal_c2h_id_handle_directly(adapter, id, seq, plen, payload)) {
|
||||
/* Handle directly */
|
||||
rtw_hal_c2h_handler(adapter, id, seq, plen, payload);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
if (rtw_c2h_reg_wk_cmd(adapter, c2h_evt) != _SUCCESS)
|
||||
RTW_ERR("%s rtw_c2h_reg_wk_cmd fail\n", __func__);
|
||||
|
||||
exit:
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* !RTW_HALMAC */
|
||||
+1296
File diff suppressed because it is too large
Load Diff
+1490
File diff suppressed because it is too large
Load Diff
+2255
File diff suppressed because it is too large
Load Diff
+260
@@ -0,0 +1,260 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
#define _HAL_PHY_C_
|
||||
|
||||
#include <drv_types.h>
|
||||
|
||||
/* ********************************************************************************
|
||||
* Constant.
|
||||
* ********************************************************************************
|
||||
* 2008/11/20 MH For Debug only, RF */
|
||||
static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG];
|
||||
|
||||
/**
|
||||
* Function: PHY_CalculateBitShift
|
||||
*
|
||||
* OverView: Get shifted position of the BitMask
|
||||
*
|
||||
* Input:
|
||||
* u4Byte BitMask,
|
||||
*
|
||||
* Output: none
|
||||
* Return: u4Byte Return the shift bit bit position of the mask
|
||||
*/
|
||||
u32
|
||||
PHY_CalculateBitShift(
|
||||
u32 BitMask
|
||||
)
|
||||
{
|
||||
u32 i;
|
||||
|
||||
for (i = 0; i <= 31; i++) {
|
||||
if (((BitMask >> i) & 0x1) == 1)
|
||||
break;
|
||||
}
|
||||
|
||||
return i;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* ==> RF shadow Operation API Code Section!!!
|
||||
*
|
||||
*-----------------------------------------------------------------------------
|
||||
* Function: PHY_RFShadowRead
|
||||
* PHY_RFShadowWrite
|
||||
* PHY_RFShadowCompare
|
||||
* PHY_RFShadowRecorver
|
||||
* PHY_RFShadowCompareAll
|
||||
* PHY_RFShadowRecorverAll
|
||||
* PHY_RFShadowCompareFlagSet
|
||||
* PHY_RFShadowRecorverFlagSet
|
||||
*
|
||||
* Overview: When we set RF register, we must write shadow at first.
|
||||
* When we are running, we must compare shadow abd locate error addr.
|
||||
* Decide to recorver or not.
|
||||
*
|
||||
* Input: NONE
|
||||
*
|
||||
* Output: NONE
|
||||
*
|
||||
* Return: NONE
|
||||
*
|
||||
* Revised History:
|
||||
* When Who Remark
|
||||
* 11/20/2008 MHC Create Version 0.
|
||||
*
|
||||
*---------------------------------------------------------------------------*/
|
||||
u32
|
||||
PHY_RFShadowRead(
|
||||
IN PADAPTER Adapter,
|
||||
IN u8 eRFPath,
|
||||
IN u32 Offset)
|
||||
{
|
||||
return RF_Shadow[eRFPath][Offset].Value;
|
||||
|
||||
} /* PHY_RFShadowRead */
|
||||
|
||||
|
||||
VOID
|
||||
PHY_RFShadowWrite(
|
||||
IN PADAPTER Adapter,
|
||||
IN u8 eRFPath,
|
||||
IN u32 Offset,
|
||||
IN u32 Data)
|
||||
{
|
||||
RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask);
|
||||
RF_Shadow[eRFPath][Offset].Driver_Write = _TRUE;
|
||||
|
||||
} /* PHY_RFShadowWrite */
|
||||
|
||||
|
||||
BOOLEAN
|
||||
PHY_RFShadowCompare(
|
||||
IN PADAPTER Adapter,
|
||||
IN u8 eRFPath,
|
||||
IN u32 Offset)
|
||||
{
|
||||
u32 reg;
|
||||
/* Check if we need to check the register */
|
||||
if (RF_Shadow[eRFPath][Offset].Compare == _TRUE) {
|
||||
reg = rtw_hal_read_rfreg(Adapter, eRFPath, Offset, bRFRegOffsetMask);
|
||||
/* Compare shadow and real rf register for 20bits!! */
|
||||
if (RF_Shadow[eRFPath][Offset].Value != reg) {
|
||||
/* Locate error position. */
|
||||
RF_Shadow[eRFPath][Offset].ErrorOrNot = _TRUE;
|
||||
}
|
||||
return RF_Shadow[eRFPath][Offset].ErrorOrNot ;
|
||||
}
|
||||
return _FALSE;
|
||||
} /* PHY_RFShadowCompare */
|
||||
|
||||
|
||||
VOID
|
||||
PHY_RFShadowRecorver(
|
||||
IN PADAPTER Adapter,
|
||||
IN u8 eRFPath,
|
||||
IN u32 Offset)
|
||||
{
|
||||
/* Check if the address is error */
|
||||
if (RF_Shadow[eRFPath][Offset].ErrorOrNot == _TRUE) {
|
||||
/* Check if we need to recorver the register. */
|
||||
if (RF_Shadow[eRFPath][Offset].Recorver == _TRUE) {
|
||||
rtw_hal_write_rfreg(Adapter, eRFPath, Offset, bRFRegOffsetMask,
|
||||
RF_Shadow[eRFPath][Offset].Value);
|
||||
}
|
||||
}
|
||||
|
||||
} /* PHY_RFShadowRecorver */
|
||||
|
||||
|
||||
VOID
|
||||
PHY_RFShadowCompareAll(
|
||||
IN PADAPTER Adapter)
|
||||
{
|
||||
u8 eRFPath = 0 ;
|
||||
u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
|
||||
|
||||
for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
|
||||
for (Offset = 0; Offset < maxReg; Offset++)
|
||||
PHY_RFShadowCompare(Adapter, eRFPath, Offset);
|
||||
}
|
||||
|
||||
} /* PHY_RFShadowCompareAll */
|
||||
|
||||
|
||||
VOID
|
||||
PHY_RFShadowRecorverAll(
|
||||
IN PADAPTER Adapter)
|
||||
{
|
||||
u8 eRFPath = 0;
|
||||
u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
|
||||
|
||||
for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
|
||||
for (Offset = 0; Offset < maxReg; Offset++)
|
||||
PHY_RFShadowRecorver(Adapter, eRFPath, Offset);
|
||||
}
|
||||
|
||||
} /* PHY_RFShadowRecorverAll */
|
||||
|
||||
|
||||
VOID
|
||||
PHY_RFShadowCompareFlagSet(
|
||||
IN PADAPTER Adapter,
|
||||
IN u8 eRFPath,
|
||||
IN u32 Offset,
|
||||
IN u8 Type)
|
||||
{
|
||||
/* Set True or False!!! */
|
||||
RF_Shadow[eRFPath][Offset].Compare = Type;
|
||||
|
||||
} /* PHY_RFShadowCompareFlagSet */
|
||||
|
||||
|
||||
VOID
|
||||
PHY_RFShadowRecorverFlagSet(
|
||||
IN PADAPTER Adapter,
|
||||
IN u8 eRFPath,
|
||||
IN u32 Offset,
|
||||
IN u8 Type)
|
||||
{
|
||||
/* Set True or False!!! */
|
||||
RF_Shadow[eRFPath][Offset].Recorver = Type;
|
||||
|
||||
} /* PHY_RFShadowRecorverFlagSet */
|
||||
|
||||
|
||||
VOID
|
||||
PHY_RFShadowCompareFlagSetAll(
|
||||
IN PADAPTER Adapter)
|
||||
{
|
||||
u8 eRFPath = 0;
|
||||
u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
|
||||
|
||||
for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
|
||||
for (Offset = 0; Offset < maxReg; Offset++) {
|
||||
/* 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! */
|
||||
if (Offset != 0x26 && Offset != 0x27)
|
||||
PHY_RFShadowCompareFlagSet(Adapter, eRFPath, Offset, _FALSE);
|
||||
else
|
||||
PHY_RFShadowCompareFlagSet(Adapter, eRFPath, Offset, _TRUE);
|
||||
}
|
||||
}
|
||||
|
||||
} /* PHY_RFShadowCompareFlagSetAll */
|
||||
|
||||
|
||||
VOID
|
||||
PHY_RFShadowRecorverFlagSetAll(
|
||||
IN PADAPTER Adapter)
|
||||
{
|
||||
u8 eRFPath = 0;
|
||||
u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
|
||||
|
||||
for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
|
||||
for (Offset = 0; Offset < maxReg; Offset++) {
|
||||
/* 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! */
|
||||
if (Offset != 0x26 && Offset != 0x27)
|
||||
PHY_RFShadowRecorverFlagSet(Adapter, eRFPath, Offset, _FALSE);
|
||||
else
|
||||
PHY_RFShadowRecorverFlagSet(Adapter, eRFPath, Offset, _TRUE);
|
||||
}
|
||||
}
|
||||
|
||||
} /* PHY_RFShadowCompareFlagSetAll */
|
||||
|
||||
VOID
|
||||
PHY_RFShadowRefresh(
|
||||
IN PADAPTER Adapter)
|
||||
{
|
||||
u8 eRFPath = 0;
|
||||
u32 Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
|
||||
|
||||
for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
|
||||
for (Offset = 0; Offset < maxReg; Offset++) {
|
||||
RF_Shadow[eRFPath][Offset].Value = 0;
|
||||
RF_Shadow[eRFPath][Offset].Compare = _FALSE;
|
||||
RF_Shadow[eRFPath][Offset].Recorver = _FALSE;
|
||||
RF_Shadow[eRFPath][Offset].ErrorOrNot = _FALSE;
|
||||
RF_Shadow[eRFPath][Offset].Driver_Write = _FALSE;
|
||||
}
|
||||
}
|
||||
|
||||
} /* PHY_RFShadowRead */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,123 @@
|
||||
#pragma once
|
||||
#ifndef __INC_HW_IMG_H
|
||||
#define __INC_HW_IMG_H
|
||||
|
||||
//
|
||||
// 2011/03/15 MH Add for different IC HW image file selection. code size consideration.
|
||||
//
|
||||
#if RT_PLATFORM == PLATFORM_LINUX
|
||||
|
||||
#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
|
||||
// For 92C
|
||||
#define RTL8192CE_HWIMG_SUPPORT 1
|
||||
#define RTL8192CE_TEST_HWIMG_SUPPORT 0
|
||||
#define RTL8192CU_HWIMG_SUPPORT 0
|
||||
#define RTL8192CU_TEST_HWIMG_SUPPORT 0
|
||||
|
||||
// For 92D
|
||||
#define RTL8192DE_HWIMG_SUPPORT 1
|
||||
#define RTL8192DE_TEST_HWIMG_SUPPORT 0
|
||||
#define RTL8192DU_HWIMG_SUPPORT 0
|
||||
#define RTL8192DU_TEST_HWIMG_SUPPORT 0
|
||||
|
||||
// For 8723
|
||||
#define RTL8723E_HWIMG_SUPPORT 1
|
||||
#define RTL8723U_HWIMG_SUPPORT 0
|
||||
#define RTL8723S_HWIMG_SUPPORT 0
|
||||
|
||||
//For 88E
|
||||
#define RTL8188EE_HWIMG_SUPPORT 0
|
||||
#define RTL8188EU_HWIMG_SUPPORT 0
|
||||
#define RTL8188ES_HWIMG_SUPPORT 0
|
||||
|
||||
#elif (DEV_BUS_TYPE == RT_USB_INTERFACE)
|
||||
// For 92C
|
||||
#define RTL8192CE_HWIMG_SUPPORT 0
|
||||
#define RTL8192CE_TEST_HWIMG_SUPPORT 0
|
||||
#define RTL8192CU_HWIMG_SUPPORT 1
|
||||
#define RTL8192CU_TEST_HWIMG_SUPPORT 0
|
||||
|
||||
//For 92D
|
||||
#define RTL8192DE_HWIMG_SUPPORT 0
|
||||
#define RTL8192DE_TEST_HWIMG_SUPPORT 0
|
||||
#define RTL8192DU_HWIMG_SUPPORT 1
|
||||
#define RTL8192DU_TEST_HWIMG_SUPPORT 0
|
||||
|
||||
// For 8723
|
||||
#define RTL8723E_HWIMG_SUPPORT 0
|
||||
#define RTL8723U_HWIMG_SUPPORT 1
|
||||
#define RTL8723S_HWIMG_SUPPORT 0
|
||||
|
||||
//For 88E
|
||||
#define RTL8188EE_HWIMG_SUPPORT 0
|
||||
#define RTL8188EU_HWIMG_SUPPORT 0
|
||||
#define RTL8188ES_HWIMG_SUPPORT 0
|
||||
|
||||
#elif (DEV_BUS_TYPE == RT_SDIO_INTERFACE)
|
||||
// For 92C
|
||||
#define RTL8192CE_HWIMG_SUPPORT 0
|
||||
#define RTL8192CE_TEST_HWIMG_SUPPORT 0
|
||||
#define RTL8192CU_HWIMG_SUPPORT 1
|
||||
#define RTL8192CU_TEST_HWIMG_SUPPORT 0
|
||||
|
||||
//For 92D
|
||||
#define RTL8192DE_HWIMG_SUPPORT 0
|
||||
#define RTL8192DE_TEST_HWIMG_SUPPORT 0
|
||||
#define RTL8192DU_HWIMG_SUPPORT 1
|
||||
#define RTL8192DU_TEST_HWIMG_SUPPORT 0
|
||||
|
||||
// For 8723
|
||||
#define RTL8723E_HWIMG_SUPPORT 0
|
||||
#define RTL8723U_HWIMG_SUPPORT 0
|
||||
#define RTL8723S_HWIMG_SUPPORT 1
|
||||
|
||||
//For 88E
|
||||
#define RTL8188EE_HWIMG_SUPPORT 0
|
||||
#define RTL8188EU_HWIMG_SUPPORT 0
|
||||
#define RTL8188ES_HWIMG_SUPPORT 0
|
||||
#endif
|
||||
|
||||
#else // PLATFORM_WINDOWS & MacOSX
|
||||
|
||||
//For 92C
|
||||
#define RTL8192CE_HWIMG_SUPPORT 1
|
||||
#define RTL8192CE_TEST_HWIMG_SUPPORT 1
|
||||
#define RTL8192CU_HWIMG_SUPPORT 1
|
||||
#define RTL8192CU_TEST_HWIMG_SUPPORT 1
|
||||
|
||||
// For 92D
|
||||
#define RTL8192DE_HWIMG_SUPPORT 1
|
||||
#define RTL8192DE_TEST_HWIMG_SUPPORT 1
|
||||
#define RTL8192DU_HWIMG_SUPPORT 1
|
||||
#define RTL8192DU_TEST_HWIMG_SUPPORT 1
|
||||
|
||||
#if defined(UNDER_CE)
|
||||
// For 8723
|
||||
#define RTL8723E_HWIMG_SUPPORT 0
|
||||
#define RTL8723U_HWIMG_SUPPORT 0
|
||||
#define RTL8723S_HWIMG_SUPPORT 1
|
||||
|
||||
// For 88E
|
||||
#define RTL8188EE_HWIMG_SUPPORT 0
|
||||
#define RTL8188EU_HWIMG_SUPPORT 0
|
||||
#define RTL8188ES_HWIMG_SUPPORT 0
|
||||
|
||||
#else
|
||||
|
||||
// For 8723
|
||||
#define RTL8723E_HWIMG_SUPPORT 1
|
||||
//#define RTL_8723E_TEST_HWIMG_SUPPORT 1
|
||||
#define RTL8723U_HWIMG_SUPPORT 1
|
||||
//#define RTL_8723U_TEST_HWIMG_SUPPORT 1
|
||||
#define RTL8723S_HWIMG_SUPPORT 1
|
||||
//#define RTL_8723S_TEST_HWIMG_SUPPORT 1
|
||||
|
||||
//For 88E
|
||||
#define RTL8188EE_HWIMG_SUPPORT 1
|
||||
#define RTL8188EU_HWIMG_SUPPORT 1
|
||||
#define RTL8188ES_HWIMG_SUPPORT 1
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#endif //__INC_HW_IMG_H
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,179 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __HAL_PHY_RF_H__
|
||||
#define __HAL_PHY_RF_H__
|
||||
|
||||
#include "phydm_powertracking_ap.h"
|
||||
#if (RTL8814A_SUPPORT == 1)
|
||||
#include "rtl8814a/phydm_iqk_8814a.h"
|
||||
#endif
|
||||
|
||||
#if (RTL8822B_SUPPORT == 1)
|
||||
#include "rtl8822b/phydm_iqk_8822b.h"
|
||||
#endif
|
||||
|
||||
#if (RTL8821C_SUPPORT == 1)
|
||||
#include "rtl8822b/phydm_iqk_8821c.h"
|
||||
#endif
|
||||
|
||||
typedef enum _PWRTRACK_CONTROL_METHOD {
|
||||
BBSWING,
|
||||
TXAGC,
|
||||
MIX_MODE,
|
||||
TSSI_MODE
|
||||
} PWRTRACK_METHOD;
|
||||
|
||||
typedef VOID (*FuncSetPwr)(PVOID, PWRTRACK_METHOD, u1Byte, u1Byte);
|
||||
typedef VOID(*FuncIQK)(PVOID, u1Byte, u1Byte, u1Byte);
|
||||
typedef VOID (*FuncLCK)(PVOID);
|
||||
//refine by YuChen for 8814A
|
||||
typedef VOID (*FuncSwing)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*);
|
||||
typedef VOID (*FuncSwing8814only)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*);
|
||||
typedef VOID (*FuncAllSwing)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*);
|
||||
|
||||
|
||||
typedef struct _TXPWRTRACK_CFG {
|
||||
u1Byte SwingTableSize_CCK;
|
||||
u1Byte SwingTableSize_OFDM;
|
||||
u1Byte Threshold_IQK;
|
||||
u1Byte Threshold_DPK;
|
||||
u1Byte AverageThermalNum;
|
||||
u1Byte RfPathCount;
|
||||
u4Byte ThermalRegAddr;
|
||||
FuncSetPwr ODM_TxPwrTrackSetPwr;
|
||||
FuncIQK DoIQK;
|
||||
FuncLCK PHY_LCCalibrate;
|
||||
FuncSwing GetDeltaSwingTable;
|
||||
FuncSwing8814only GetDeltaSwingTable8814only;
|
||||
FuncAllSwing GetDeltaAllSwingTable;
|
||||
} TXPWRTRACK_CFG, *PTXPWRTRACK_CFG;
|
||||
|
||||
VOID
|
||||
ConfigureTxpowerTrack(
|
||||
IN PVOID pDM_VOID,
|
||||
OUT PTXPWRTRACK_CFG pConfig
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
ODM_TXPowerTrackingCallback_ThermalMeter(
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
IN PVOID pDM_VOID
|
||||
#else
|
||||
IN PADAPTER Adapter
|
||||
#endif
|
||||
);
|
||||
|
||||
#if (RTL8192E_SUPPORT==1)
|
||||
VOID
|
||||
ODM_TXPowerTrackingCallback_ThermalMeter_92E(
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
IN PVOID pDM_VOID
|
||||
#else
|
||||
IN PADAPTER Adapter
|
||||
#endif
|
||||
);
|
||||
#endif
|
||||
|
||||
#if (RTL8814A_SUPPORT == 1)
|
||||
VOID
|
||||
ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries2(
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
IN PVOID pDM_VOID
|
||||
#else
|
||||
IN PADAPTER Adapter
|
||||
#endif
|
||||
);
|
||||
|
||||
#elif ODM_IC_11AC_SERIES_SUPPORT
|
||||
VOID
|
||||
ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries(
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
IN PVOID pDM_VOID
|
||||
#else
|
||||
IN PADAPTER Adapter
|
||||
#endif
|
||||
);
|
||||
|
||||
#elif (RTL8197F_SUPPORT == 1 || RTL8822B_SUPPORT == 1)
|
||||
VOID
|
||||
ODM_TXPowerTrackingCallback_ThermalMeter_JaguarSeries3(
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
IN PVOID pDM_VOID
|
||||
#else
|
||||
IN PADAPTER Adapter
|
||||
#endif
|
||||
);
|
||||
|
||||
#endif
|
||||
|
||||
#define IS_CCK_RATE(_rate) (ODM_MGN_1M == _rate || _rate == ODM_MGN_2M || _rate == ODM_MGN_5_5M || _rate == ODM_MGN_11M )
|
||||
|
||||
|
||||
#if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
||||
#define MAX_TOLERANCE 5
|
||||
#define IQK_DELAY_TIME 1 //ms
|
||||
|
||||
//
|
||||
// BB/MAC/RF other monitor API
|
||||
//
|
||||
|
||||
void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter,
|
||||
IN BOOLEAN bEnableMonitorMode );
|
||||
|
||||
//
|
||||
// IQ calibrate
|
||||
//
|
||||
void
|
||||
PHY_IQCalibrate_8192C( IN PADAPTER pAdapter,
|
||||
IN BOOLEAN bReCovery);
|
||||
|
||||
//
|
||||
// LC calibrate
|
||||
//
|
||||
void
|
||||
PHY_LCCalibrate_8192C( IN PADAPTER pAdapter);
|
||||
|
||||
//
|
||||
// AP calibrate
|
||||
//
|
||||
void
|
||||
PHY_APCalibrate_8192C( IN PADAPTER pAdapter,
|
||||
IN s1Byte delta);
|
||||
#endif
|
||||
|
||||
#define ODM_TARGET_CHNL_NUM_2G_5G 59
|
||||
|
||||
|
||||
VOID
|
||||
ODM_ResetIQKResult(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
u1Byte
|
||||
ODM_GetRightChnlPlaceforIQK(
|
||||
IN u1Byte chnl
|
||||
);
|
||||
|
||||
void phydm_rf_init(IN PVOID pDM_VOID);
|
||||
void phydm_rf_watchdog(IN PVOID pDM_VOID);
|
||||
|
||||
#endif // #ifndef __HAL_PHY_RF_H__
|
||||
|
||||
@@ -0,0 +1,807 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include "mp_precomp.h"
|
||||
#include "phydm_precomp.h"
|
||||
|
||||
#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _deltaThermal) \
|
||||
do {\
|
||||
for(_offset = 0; _offset < _size; _offset++)\
|
||||
{\
|
||||
if(_deltaThermal < thermalThreshold[_direction][_offset])\
|
||||
{\
|
||||
if(_offset != 0)\
|
||||
_offset--;\
|
||||
break;\
|
||||
}\
|
||||
} \
|
||||
if(_offset >= _size)\
|
||||
_offset = _size-1;\
|
||||
} while(0)
|
||||
|
||||
void ConfigureTxpowerTrack(
|
||||
IN PVOID pDM_VOID,
|
||||
OUT PTXPWRTRACK_CFG pConfig
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
|
||||
#if RTL8192E_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8192E)
|
||||
ConfigureTxpowerTrack_8192E(pConfig);
|
||||
#endif
|
||||
#if RTL8821A_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8821)
|
||||
ConfigureTxpowerTrack_8821A(pConfig);
|
||||
#endif
|
||||
#if RTL8812A_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8812)
|
||||
ConfigureTxpowerTrack_8812A(pConfig);
|
||||
#endif
|
||||
#if RTL8188E_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8188E)
|
||||
ConfigureTxpowerTrack_8188E(pConfig);
|
||||
#endif
|
||||
|
||||
#if RTL8723B_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8723B)
|
||||
ConfigureTxpowerTrack_8723B(pConfig);
|
||||
#endif
|
||||
|
||||
#if RTL8814A_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8814A)
|
||||
ConfigureTxpowerTrack_8814A(pConfig);
|
||||
#endif
|
||||
|
||||
#if RTL8703B_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8703B)
|
||||
ConfigureTxpowerTrack_8703B(pConfig);
|
||||
#endif
|
||||
|
||||
#if RTL8188F_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8188F)
|
||||
ConfigureTxpowerTrack_8188F(pConfig);
|
||||
#endif
|
||||
#if RTL8723D_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8723D)
|
||||
ConfigureTxpowerTrack_8723D(pConfig);
|
||||
#endif
|
||||
#if RTL8822B_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8822B)
|
||||
ConfigureTxpowerTrack_8822B(pConfig);
|
||||
#endif
|
||||
#if RTL8821C_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8821C)
|
||||
ConfigureTxpowerTrack_8821C(pConfig);
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
//======================================================================
|
||||
// <20121113, Kordan> This function should be called when TxAGC changed.
|
||||
// Otherwise the previous compensation is gone, because we record the
|
||||
// delta of temperature between two TxPowerTracking watch dogs.
|
||||
//
|
||||
// NOTE: If Tx BB swing or Tx scaling is varified during run-time, still
|
||||
// need to call this function.
|
||||
//======================================================================
|
||||
VOID
|
||||
ODM_ClearTxPowerTrackingState(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pDM_Odm->Adapter);
|
||||
u1Byte p = 0;
|
||||
PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo);
|
||||
|
||||
pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->DefaultCckIndex;
|
||||
pRFCalibrateInfo->BbSwingIdxCck = pRFCalibrateInfo->DefaultCckIndex;
|
||||
pDM_Odm->RFCalibrateInfo.CCK_index = 0;
|
||||
|
||||
for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p)
|
||||
{
|
||||
pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->DefaultOfdmIndex;
|
||||
pRFCalibrateInfo->BbSwingIdxOfdm[p] = pRFCalibrateInfo->DefaultOfdmIndex;
|
||||
pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->DefaultOfdmIndex;
|
||||
|
||||
pRFCalibrateInfo->PowerIndexOffset[p] = 0;
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = 0;
|
||||
pRFCalibrateInfo->DeltaPowerIndexLast[p] = 0;
|
||||
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = 0; /* Initial Mix mode power tracking*/
|
||||
pRFCalibrateInfo->Remnant_OFDMSwingIdx[p] = 0;
|
||||
pRFCalibrateInfo->KfreeOffset[p] = 0;
|
||||
}
|
||||
|
||||
pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = FALSE; /*Initial at Modify Tx Scaling Mode*/
|
||||
pRFCalibrateInfo->Modify_TxAGC_Flag_PathB = FALSE; /*Initial at Modify Tx Scaling Mode*/
|
||||
pRFCalibrateInfo->Modify_TxAGC_Flag_PathC = FALSE; /*Initial at Modify Tx Scaling Mode*/
|
||||
pRFCalibrateInfo->Modify_TxAGC_Flag_PathD = FALSE; /*Initial at Modify Tx Scaling Mode*/
|
||||
pRFCalibrateInfo->Remnant_CCKSwingIdx = 0;
|
||||
pRFCalibrateInfo->ThermalValue = pHalData->EEPROMThermalMeter;
|
||||
|
||||
pRFCalibrateInfo->Modify_TxAGC_Value_CCK=0; //modify by Mingzhi.Guo
|
||||
pRFCalibrateInfo->Modify_TxAGC_Value_OFDM=0; //modify by Mingzhi.Guo
|
||||
|
||||
}
|
||||
|
||||
VOID
|
||||
ODM_TXPowerTrackingCallback_ThermalMeter(
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
#else
|
||||
IN PADAPTER Adapter
|
||||
#endif
|
||||
)
|
||||
{
|
||||
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo);
|
||||
|
||||
u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0;
|
||||
s1Byte diff_DPK[4] = {0};
|
||||
u1Byte ThermalValue_AVG_count = 0;
|
||||
u4Byte ThermalValue_AVG = 0, RegC80, RegCd0, RegCd4, Regab4;
|
||||
|
||||
u1Byte OFDM_min_index = 0; // OFDM BB Swing should be less than +3.0dB, which is required by Arthur
|
||||
u1Byte Indexforchannel = 0; // GetRightChnlPlaceforIQK(pHalData->CurrentChannel)
|
||||
u1Byte PowerTrackingType = pHalData->RfPowerTrackingType;
|
||||
u1Byte XtalOffsetEanble = 0;
|
||||
|
||||
TXPWRTRACK_CFG c;
|
||||
|
||||
//4 1. The following TWO tables decide the final index of OFDM/CCK swing table.
|
||||
pu1Byte deltaSwingTableIdx_TUP_A = NULL;
|
||||
pu1Byte deltaSwingTableIdx_TDOWN_A = NULL;
|
||||
pu1Byte deltaSwingTableIdx_TUP_B = NULL;
|
||||
pu1Byte deltaSwingTableIdx_TDOWN_B = NULL;
|
||||
/*for 8814 add by Yu Chen*/
|
||||
pu1Byte deltaSwingTableIdx_TUP_C = NULL;
|
||||
pu1Byte deltaSwingTableIdx_TDOWN_C = NULL;
|
||||
pu1Byte deltaSwingTableIdx_TUP_D = NULL;
|
||||
pu1Byte deltaSwingTableIdx_TDOWN_D = NULL;
|
||||
/*for Xtal Offset by James.Tung*/
|
||||
ps1Byte deltaSwingTableXtal_UP = NULL;
|
||||
ps1Byte deltaSwingTableXtal_DOWN = NULL;
|
||||
|
||||
//4 2. Initilization ( 7 steps in total )
|
||||
|
||||
ConfigureTxpowerTrack(pDM_Odm, &c);
|
||||
|
||||
(*c.GetDeltaSwingTable)(pDM_Odm, (pu1Byte *)&deltaSwingTableIdx_TUP_A, (pu1Byte *)&deltaSwingTableIdx_TDOWN_A,
|
||||
(pu1Byte *)&deltaSwingTableIdx_TUP_B, (pu1Byte *)&deltaSwingTableIdx_TDOWN_B);
|
||||
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8814A) /*for 8814 path C & D*/
|
||||
(*c.GetDeltaSwingTable8814only)(pDM_Odm, (pu1Byte *)&deltaSwingTableIdx_TUP_C, (pu1Byte *)&deltaSwingTableIdx_TDOWN_C,
|
||||
(pu1Byte *)&deltaSwingTableIdx_TUP_D, (pu1Byte *)&deltaSwingTableIdx_TDOWN_D);
|
||||
|
||||
if (pDM_Odm->SupportICType & (ODM_RTL8703B | ODM_RTL8723D)) /*for Xtal Offset*/
|
||||
(*c.GetDeltaSwingXtalTable)(pDM_Odm, (ps1Byte *)&deltaSwingTableXtal_UP, (ps1Byte *)&deltaSwingTableXtal_DOWN);
|
||||
|
||||
pRFCalibrateInfo->TXPowerTrackingCallbackCnt++; /*cosa add for debug*/
|
||||
pRFCalibrateInfo->bTXPowerTrackingInit = TRUE;
|
||||
|
||||
/*pRFCalibrateInfo->TxPowerTrackControl = pHalData->TxPowerTrackControl;
|
||||
<Kordan> We should keep updating the control variable according to HalData.
|
||||
<Kordan> RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. */
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
||||
#if (MP_DRIVER == 1)
|
||||
pRFCalibrateInfo->RegA24 = 0x090e1317;
|
||||
#endif
|
||||
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
if (pDM_Odm->mp_mode == TRUE)
|
||||
pRFCalibrateInfo->RegA24 = 0x090e1317;
|
||||
#endif
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("===>ODM_TXPowerTrackingCallback_ThermalMeter\n pRFCalibrateInfo->BbSwingIdxCckBase: %d, pRFCalibrateInfo->BbSwingIdxOfdmBase[A]: %d, pRFCalibrateInfo->DefaultOfdmIndex: %d\n",
|
||||
pRFCalibrateInfo->BbSwingIdxCckBase, pRFCalibrateInfo->BbSwingIdxOfdmBase[ODM_RF_PATH_A], pRFCalibrateInfo->DefaultOfdmIndex));
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("pRFCalibrateInfo->TxPowerTrackControl=%d, pHalData->EEPROMThermalMeter %d\n", pRFCalibrateInfo->TxPowerTrackControl, pHalData->EEPROMThermalMeter));
|
||||
ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, c.ThermalRegAddr, 0xfc00); //0x42: RF Reg[15:10] 88E
|
||||
|
||||
/*add log by zhao he, check c80/c94/c14/ca0 value*/
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8723D) {
|
||||
RegC80 = ODM_GetBBReg(pDM_Odm, 0xc80, bMaskDWord);
|
||||
RegCd0 = ODM_GetBBReg(pDM_Odm, 0xcd0, bMaskDWord);
|
||||
RegCd4 = ODM_GetBBReg(pDM_Odm, 0xcd4, bMaskDWord);
|
||||
Regab4 = ODM_GetBBReg(pDM_Odm, 0xab4, 0x000007FF);
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", RegC80, RegCd0, RegCd4, Regab4));
|
||||
}
|
||||
|
||||
if (!pRFCalibrateInfo->TxPowerTrackControl)
|
||||
return;
|
||||
|
||||
|
||||
/*4 3. Initialize ThermalValues of RFCalibrateInfo*/
|
||||
|
||||
if (pRFCalibrateInfo->bReloadtxpowerindex)
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("reload ofdm index for band switch\n"));
|
||||
|
||||
/*4 4. Calculate average thermal meter*/
|
||||
|
||||
pRFCalibrateInfo->ThermalValue_AVG[pRFCalibrateInfo->ThermalValue_AVG_index] = ThermalValue;
|
||||
pRFCalibrateInfo->ThermalValue_AVG_index++;
|
||||
if (pRFCalibrateInfo->ThermalValue_AVG_index == c.AverageThermalNum) /*Average times = c.AverageThermalNum*/
|
||||
pRFCalibrateInfo->ThermalValue_AVG_index = 0;
|
||||
|
||||
for(i = 0; i < c.AverageThermalNum; i++)
|
||||
{
|
||||
if (pRFCalibrateInfo->ThermalValue_AVG[i]) {
|
||||
ThermalValue_AVG += pRFCalibrateInfo->ThermalValue_AVG[i];
|
||||
ThermalValue_AVG_count++;
|
||||
}
|
||||
}
|
||||
|
||||
if(ThermalValue_AVG_count) //Calculate Average ThermalValue after average enough times
|
||||
{
|
||||
ThermalValue = (u1Byte)(ThermalValue_AVG / ThermalValue_AVG_count);
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("AVG Thermal Meter = 0x%X, EFUSE Thermal Base = 0x%X\n", ThermalValue, pHalData->EEPROMThermalMeter));
|
||||
}
|
||||
|
||||
//4 5. Calculate delta, delta_LCK, delta_IQK.
|
||||
|
||||
//"delta" here is used to determine whether thermal value changes or not.
|
||||
delta = (ThermalValue > pRFCalibrateInfo->ThermalValue)?(ThermalValue - pRFCalibrateInfo->ThermalValue):(pRFCalibrateInfo->ThermalValue - ThermalValue);
|
||||
delta_LCK = (ThermalValue > pRFCalibrateInfo->ThermalValue_LCK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_LCK):(pRFCalibrateInfo->ThermalValue_LCK - ThermalValue);
|
||||
delta_IQK = (ThermalValue > pRFCalibrateInfo->ThermalValue_IQK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_IQK):(pRFCalibrateInfo->ThermalValue_IQK - ThermalValue);
|
||||
|
||||
if (pRFCalibrateInfo->ThermalValue_IQK == 0xff) { /*no PG, use thermal value for IQK*/
|
||||
pRFCalibrateInfo->ThermalValue_IQK = ThermalValue;
|
||||
delta_IQK = (ThermalValue > pRFCalibrateInfo->ThermalValue_IQK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_IQK):(pRFCalibrateInfo->ThermalValue_IQK - ThermalValue);
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, use ThermalValue for IQK\n"));
|
||||
}
|
||||
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
diff_DPK[p] = (s1Byte)ThermalValue - (s1Byte)pRFCalibrateInfo->DpkThermal[p];
|
||||
|
||||
/*4 6. If necessary, do LCK.*/
|
||||
|
||||
if (!(pDM_Odm->SupportICType & ODM_RTL8821)) { /*no PG , do LCK at initial status*/
|
||||
if (pRFCalibrateInfo->ThermalValue_LCK == 0xff) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, do LCK\n"));
|
||||
pRFCalibrateInfo->ThermalValue_LCK = ThermalValue;
|
||||
|
||||
/*Use RTLCK, so close power tracking driver LCK*/
|
||||
if (!(pDM_Odm->SupportICType & ODM_RTL8814A)) {
|
||||
if (c.PHY_LCCalibrate)
|
||||
(*c.PHY_LCCalibrate)(pDM_Odm);
|
||||
}
|
||||
|
||||
delta_LCK = (ThermalValue > pRFCalibrateInfo->ThermalValue_LCK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_LCK):(pRFCalibrateInfo->ThermalValue_LCK - ThermalValue);
|
||||
}
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK));
|
||||
|
||||
/* Delta temperature is equal to or larger than 20 centigrade.*/
|
||||
if (delta_LCK >= c.Threshold_IQK) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= Threshold_IQK(%d)\n", delta_LCK, c.Threshold_IQK));
|
||||
pRFCalibrateInfo->ThermalValue_LCK = ThermalValue;
|
||||
|
||||
/*Use RTLCK, so close power tracking driver LCK*/
|
||||
if (!(pDM_Odm->SupportICType & ODM_RTL8814A)) {
|
||||
if (c.PHY_LCCalibrate)
|
||||
(*c.PHY_LCCalibrate)(pDM_Odm);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*3 7. If necessary, move the index of swing table to adjust Tx power.*/
|
||||
|
||||
if (delta > 0 && pRFCalibrateInfo->TxPowerTrackControl)
|
||||
{
|
||||
//"delta" here is used to record the absolute value of differrence.
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue);
|
||||
#else
|
||||
delta = (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)?(ThermalValue - pDM_Odm->priv->pmib->dot11RFEntry.ther):(pDM_Odm->priv->pmib->dot11RFEntry.ther - ThermalValue);
|
||||
#endif
|
||||
if (delta >= TXPWR_TRACK_TABLE_SIZE)
|
||||
delta = TXPWR_TRACK_TABLE_SIZE - 1;
|
||||
|
||||
/*4 7.1 The Final Power Index = BaseIndex + PowerIndexOffset*/
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
if(ThermalValue > pHalData->EEPROMThermalMeter) {
|
||||
#else
|
||||
if(ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) {
|
||||
#endif
|
||||
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) {
|
||||
pRFCalibrateInfo->DeltaPowerIndexLast[p] = pRFCalibrateInfo->DeltaPowerIndex[p]; /*recording poer index offset*/
|
||||
switch (p) {
|
||||
case ODM_RF_PATH_B:
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("deltaSwingTableIdx_TUP_B[%d] = %d\n", delta, deltaSwingTableIdx_TUP_B[delta]));
|
||||
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_B[delta];
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_B[delta]; /*Record delta swing for mix mode power tracking*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p]));
|
||||
break;
|
||||
|
||||
case ODM_RF_PATH_C:
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("deltaSwingTableIdx_TUP_C[%d] = %d\n", delta, deltaSwingTableIdx_TUP_C[delta]));
|
||||
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_C[delta];
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_C[delta]; /*Record delta swing for mix mode power tracking*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p]));
|
||||
break;
|
||||
|
||||
case ODM_RF_PATH_D:
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("deltaSwingTableIdx_TUP_D[%d] = %d\n", delta, deltaSwingTableIdx_TUP_D[delta]));
|
||||
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_D[delta];
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_D[delta]; /*Record delta swing for mix mode power tracking*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p]));
|
||||
break;
|
||||
|
||||
default:
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("deltaSwingTableIdx_TUP_A[%d] = %d\n", delta, deltaSwingTableIdx_TUP_A[delta]));
|
||||
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_A[delta];
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_A[delta]; /*Record delta swing for mix mode power tracking*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p]));
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (pDM_Odm->SupportICType & (ODM_RTL8703B | ODM_RTL8723D)) {
|
||||
/*Save XtalOffset from Xtal table*/
|
||||
pRFCalibrateInfo->XtalOffsetLast = pRFCalibrateInfo->XtalOffset; /*recording last Xtal offset*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("[Xtal] deltaSwingTableXtal_UP[%d] = %d\n", delta, deltaSwingTableXtal_UP[delta]));
|
||||
pRFCalibrateInfo->XtalOffset = deltaSwingTableXtal_UP[delta];
|
||||
|
||||
if (pRFCalibrateInfo->XtalOffsetLast == pRFCalibrateInfo->XtalOffset)
|
||||
XtalOffsetEanble = 0;
|
||||
else
|
||||
XtalOffsetEanble = 1;
|
||||
}
|
||||
|
||||
} else {
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) {
|
||||
pRFCalibrateInfo->DeltaPowerIndexLast[p] = pRFCalibrateInfo->DeltaPowerIndex[p]; /*recording poer index offset*/
|
||||
|
||||
switch (p) {
|
||||
case ODM_RF_PATH_B:
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("deltaSwingTableIdx_TDOWN_B[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_B[delta]));
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta];
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; /*Record delta swing for mix mode power tracking*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p]));
|
||||
break;
|
||||
|
||||
case ODM_RF_PATH_C:
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("deltaSwingTableIdx_TDOWN_C[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_C[delta]));
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta];
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta]; /*Record delta swing for mix mode power tracking*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p]));
|
||||
break;
|
||||
|
||||
case ODM_RF_PATH_D:
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("deltaSwingTableIdx_TDOWN_D[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_D[delta]));
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta];
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta]; /*Record delta swing for mix mode power tracking*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p]));
|
||||
break;
|
||||
|
||||
default:
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("deltaSwingTableIdx_TDOWN_A[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_A[delta]));
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta];
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; /*Record delta swing for mix mode power tracking*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p]));
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (pDM_Odm->SupportICType & (ODM_RTL8703B | ODM_RTL8723D)) {
|
||||
/*Save XtalOffset from Xtal table*/
|
||||
pRFCalibrateInfo->XtalOffsetLast = pRFCalibrateInfo->XtalOffset; /*recording last Xtal offset*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("[Xtal] deltaSwingTableXtal_DOWN[%d] = %d\n", delta, deltaSwingTableXtal_DOWN[delta]));
|
||||
pRFCalibrateInfo->XtalOffset = deltaSwingTableXtal_DOWN[delta];
|
||||
|
||||
if (pRFCalibrateInfo->XtalOffsetLast == pRFCalibrateInfo->XtalOffset)
|
||||
XtalOffsetEanble = 0;
|
||||
else
|
||||
XtalOffsetEanble = 1;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("\n\n=========================== [Path-%d] Calculating PowerIndexOffset===========================\n", p));
|
||||
|
||||
if (pRFCalibrateInfo->DeltaPowerIndex[p] == pRFCalibrateInfo->DeltaPowerIndexLast[p]) /*If Thermal value changes but lookup table value still the same*/
|
||||
pRFCalibrateInfo->PowerIndexOffset[p] = 0;
|
||||
else
|
||||
pRFCalibrateInfo->PowerIndexOffset[p] = pRFCalibrateInfo->DeltaPowerIndex[p] - pRFCalibrateInfo->DeltaPowerIndexLast[p]; /*Power Index Diff between 2 times Power Tracking*/
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("[Path-%d] PowerIndexOffset(%d) = DeltaPowerIndex(%d) - DeltaPowerIndexLast(%d)\n", p, pRFCalibrateInfo->PowerIndexOffset[p], pRFCalibrateInfo->DeltaPowerIndex[p], pRFCalibrateInfo->DeltaPowerIndexLast[p]));
|
||||
|
||||
pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->BbSwingIdxOfdmBase[p] + pRFCalibrateInfo->PowerIndexOffset[p];
|
||||
pRFCalibrateInfo->CCK_index = pRFCalibrateInfo->BbSwingIdxCckBase + pRFCalibrateInfo->PowerIndexOffset[p];
|
||||
|
||||
pRFCalibrateInfo->BbSwingIdxCck = pRFCalibrateInfo->CCK_index;
|
||||
pRFCalibrateInfo->BbSwingIdxOfdm[p] = pRFCalibrateInfo->OFDM_index[p];
|
||||
|
||||
/*************Print BB Swing Base and Index Offset*************/
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("The 'CCK' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxCck, pRFCalibrateInfo->BbSwingIdxCckBase, pRFCalibrateInfo->PowerIndexOffset[p]));
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("The 'OFDM' final index(%d) = BaseIndex[%d](%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxOfdm[p], p, pRFCalibrateInfo->BbSwingIdxOfdmBase[p], pRFCalibrateInfo->PowerIndexOffset[p]));
|
||||
|
||||
/*4 7.1 Handle boundary conditions of index.*/
|
||||
|
||||
if (pRFCalibrateInfo->OFDM_index[p] > c.SwingTableSize_OFDM-1)
|
||||
pRFCalibrateInfo->OFDM_index[p] = c.SwingTableSize_OFDM-1;
|
||||
else if (pRFCalibrateInfo->OFDM_index[p] <= OFDM_min_index)
|
||||
pRFCalibrateInfo->OFDM_index[p] = OFDM_min_index;
|
||||
}
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("\n\n========================================================================================================\n"));
|
||||
|
||||
if (pRFCalibrateInfo->CCK_index > c.SwingTableSize_CCK-1)
|
||||
pRFCalibrateInfo->CCK_index = c.SwingTableSize_CCK-1;
|
||||
else if (pRFCalibrateInfo->CCK_index <= 0)
|
||||
pRFCalibrateInfo->CCK_index = 0;
|
||||
} else {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("The thermal meter is unchanged or TxPowerTracking OFF(%d): ThermalValue: %d , pRFCalibrateInfo->ThermalValue: %d\n",
|
||||
pRFCalibrateInfo->TxPowerTrackControl, ThermalValue, pRFCalibrateInfo->ThermalValue));
|
||||
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
pRFCalibrateInfo->PowerIndexOffset[p] = 0;
|
||||
}
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("TxPowerTracking: [CCK] Swing Current Index: %d, Swing Base Index: %d\n",
|
||||
pRFCalibrateInfo->CCK_index, pRFCalibrateInfo->BbSwingIdxCckBase)); /*Print Swing base & current*/
|
||||
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("TxPowerTracking: [OFDM] Swing Current Index: %d, Swing Base Index[%d]: %d\n",
|
||||
pRFCalibrateInfo->OFDM_index[p], p, pRFCalibrateInfo->BbSwingIdxOfdmBase[p]));
|
||||
}
|
||||
|
||||
if ((pDM_Odm->SupportICType & ODM_RTL8814A)) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("PowerTrackingType=%d\n", PowerTrackingType));
|
||||
|
||||
if (PowerTrackingType == 0) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n"));
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0);
|
||||
} else if (PowerTrackingType == 1) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX(2G) TSSI(5G) MODE**********\n"));
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_2G_TSSI_5G_MODE, p, 0);
|
||||
} else if (PowerTrackingType == 2) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX(5G) TSSI(2G)MODE**********\n"));
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_5G_TSSI_2G_MODE, p, 0);
|
||||
} else if (PowerTrackingType == 3) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking TSSI MODE**********\n"));
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, TSSI_MODE, p, 0);
|
||||
}
|
||||
pRFCalibrateInfo->ThermalValue = ThermalValue; /*Record last Power Tracking Thermal Value*/
|
||||
|
||||
} else if ((pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_A] != 0 ||
|
||||
pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_B] != 0 ||
|
||||
pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_C] != 0 ||
|
||||
pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_D] != 0) &&
|
||||
pRFCalibrateInfo->TxPowerTrackControl && (pHalData->EEPROMThermalMeter != 0xff)) {
|
||||
//4 7.2 Configure the Swing Table to adjust Tx Power.
|
||||
|
||||
pRFCalibrateInfo->bTxPowerChanged = TRUE; /*Always TRUE after Tx Power is adjusted by power tracking.*/
|
||||
//
|
||||
// 2012/04/23 MH According to Luke's suggestion, we can not write BB digital
|
||||
// to increase TX power. Otherwise, EVM will be bad.
|
||||
//
|
||||
// 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E.
|
||||
if (ThermalValue > pRFCalibrateInfo->ThermalValue) {
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("Temperature Increasing(%d): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
|
||||
p, pRFCalibrateInfo->PowerIndexOffset[p], delta, ThermalValue, pHalData->EEPROMThermalMeter, pRFCalibrateInfo->ThermalValue));
|
||||
}
|
||||
} else if (ThermalValue < pRFCalibrateInfo->ThermalValue) { /*Low temperature*/
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("Temperature Decreasing(%d): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
|
||||
p, pRFCalibrateInfo->PowerIndexOffset[p], delta, ThermalValue, pHalData->EEPROMThermalMeter, pRFCalibrateInfo->ThermalValue));
|
||||
}
|
||||
}
|
||||
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
if (ThermalValue > pHalData->EEPROMThermalMeter)
|
||||
#else
|
||||
if (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)
|
||||
#endif
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("Temperature(%d) higher than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter));
|
||||
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8821 ||
|
||||
pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8814A ||
|
||||
pDM_Odm->SupportICType == ODM_RTL8703B || pDM_Odm->SupportICType == ODM_RTL8188F || pDM_Odm->SupportICType == ODM_RTL8822B ||
|
||||
pDM_Odm->SupportICType == ODM_RTL8723D || pDM_Odm->SupportICType == ODM_RTL8821C) {
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n"));
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0);
|
||||
} else {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking BBSWING_MODE**********\n"));
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("Temperature(%d) lower than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter));
|
||||
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8821 ||
|
||||
pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8814A ||
|
||||
pDM_Odm->SupportICType == ODM_RTL8703B || pDM_Odm->SupportICType == ODM_RTL8188F || pDM_Odm->SupportICType == ODM_RTL8822B ||
|
||||
pDM_Odm->SupportICType == ODM_RTL8723D || pDM_Odm->SupportICType == ODM_RTL8821C) {
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n"));
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, Indexforchannel);
|
||||
} else {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking BBSWING_MODE**********\n"));
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->BbSwingIdxCck; /*Record last time Power Tracking result as base.*/
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->BbSwingIdxOfdm[p];
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("pRFCalibrateInfo->ThermalValue = %d ThermalValue= %d\n", pRFCalibrateInfo->ThermalValue, ThermalValue));
|
||||
|
||||
pRFCalibrateInfo->ThermalValue = ThermalValue; /*Record last Power Tracking Thermal Value*/
|
||||
|
||||
}
|
||||
|
||||
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8703B || pDM_Odm->SupportICType == ODM_RTL8723D) {
|
||||
|
||||
if (XtalOffsetEanble != 0 && pRFCalibrateInfo->TxPowerTrackControl && (pHalData->EEPROMThermalMeter != 0xff)) {
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter Xtal Tracking**********\n"));
|
||||
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
if (ThermalValue > pHalData->EEPROMThermalMeter) {
|
||||
#else
|
||||
if (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) {
|
||||
#endif
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("Temperature(%d) higher than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter));
|
||||
(*c.ODM_TxXtalTrackSetXtal)(pDM_Odm);
|
||||
} else {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("Temperature(%d) lower than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter));
|
||||
(*c.ODM_TxXtalTrackSetXtal)(pDM_Odm);
|
||||
}
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********End Xtal Tracking**********\n"));
|
||||
}
|
||||
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
|
||||
if (!IS_HARDWARE_TYPE_8723B(Adapter)) {
|
||||
/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
|
||||
if (delta_IQK >= c.Threshold_IQK) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_IQK(%d) >= Threshold_IQK(%d)\n", delta_IQK, c.Threshold_IQK));
|
||||
if (!pRFCalibrateInfo->bIQKInProgress)
|
||||
(*c.DoIQK)(pDM_Odm, delta_IQK, ThermalValue, 8);
|
||||
}
|
||||
}
|
||||
if (pRFCalibrateInfo->DpkThermal[ODM_RF_PATH_A] != 0) {
|
||||
if (diff_DPK[ODM_RF_PATH_A] >= c.Threshold_DPK) {
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1);
|
||||
ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, (diff_DPK[ODM_RF_PATH_A] / c.Threshold_DPK));
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0);
|
||||
} else if ((diff_DPK[ODM_RF_PATH_A] <= -1 * c.Threshold_DPK)) {
|
||||
s4Byte value = 0x20 + (diff_DPK[ODM_RF_PATH_A] / c.Threshold_DPK);
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1);
|
||||
ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, value);
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0);
|
||||
} else {
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1);
|
||||
ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, 0);
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0);
|
||||
}
|
||||
}
|
||||
if (pRFCalibrateInfo->DpkThermal[ODM_RF_PATH_B] != 0) {
|
||||
if (diff_DPK[ODM_RF_PATH_B] >= c.Threshold_DPK) {
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1);
|
||||
ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, (diff_DPK[ODM_RF_PATH_B] / c.Threshold_DPK));
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0);
|
||||
} else if ((diff_DPK[ODM_RF_PATH_B] <= -1 * c.Threshold_DPK)) {
|
||||
s4Byte value = 0x20 + (diff_DPK[ODM_RF_PATH_B] / c.Threshold_DPK);
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1);
|
||||
ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, value);
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0);
|
||||
} else {
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1);
|
||||
ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, 0);
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0);
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("<===ODM_TXPowerTrackingCallback_ThermalMeter\n"));
|
||||
|
||||
pRFCalibrateInfo->TXPowercount = 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
//3============================================================
|
||||
//3 IQ Calibration
|
||||
//3============================================================
|
||||
|
||||
VOID
|
||||
ODM_ResetIQKResult(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
return;
|
||||
}
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl)
|
||||
{
|
||||
u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] =
|
||||
{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165};
|
||||
u1Byte place = chnl;
|
||||
|
||||
|
||||
if(chnl > 14)
|
||||
{
|
||||
for(place = 14; place<sizeof(channel_all); place++)
|
||||
{
|
||||
if(channel_all[place] == chnl)
|
||||
{
|
||||
return place-13;
|
||||
}
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
VOID
|
||||
odm_IQCalibrate(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
PADAPTER Adapter = pDM_Odm->Adapter;
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
if (*pDM_Odm->pIsFcsModeEnable)
|
||||
return;
|
||||
#endif
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
|
||||
if (IS_HARDWARE_TYPE_8812AU(Adapter))
|
||||
return;
|
||||
#endif
|
||||
|
||||
if (pDM_Odm->bLinked) {
|
||||
if ((*pDM_Odm->pChannel != pDM_Odm->preChannel) && (!*pDM_Odm->pbScanInProcess)) {
|
||||
pDM_Odm->preChannel = *pDM_Odm->pChannel;
|
||||
pDM_Odm->LinkedInterval = 0;
|
||||
}
|
||||
|
||||
if (pDM_Odm->LinkedInterval < 3)
|
||||
pDM_Odm->LinkedInterval++;
|
||||
|
||||
if (pDM_Odm->LinkedInterval == 2) {
|
||||
if (IS_HARDWARE_TYPE_8814A(Adapter)) {
|
||||
#if (RTL8814A_SUPPORT == 1)
|
||||
PHY_IQCalibrate_8814A(pDM_Odm, FALSE);
|
||||
#endif
|
||||
}
|
||||
|
||||
#if (RTL8822B_SUPPORT == 1)
|
||||
else if (IS_HARDWARE_TYPE_8822B(Adapter))
|
||||
PHY_IQCalibrate_8822B(pDM_Odm, FALSE);
|
||||
#endif
|
||||
|
||||
#if (RTL8821C_SUPPORT == 1)
|
||||
else if (IS_HARDWARE_TYPE_8821C(Adapter))
|
||||
PHY_IQCalibrate_8821C(pDM_Odm, FALSE);
|
||||
#endif
|
||||
|
||||
#if (RTL8821A_SUPPORT == 1)
|
||||
else if (IS_HARDWARE_TYPE_8821(Adapter))
|
||||
PHY_IQCalibrate_8821A(pDM_Odm, FALSE);
|
||||
#endif
|
||||
}
|
||||
} else
|
||||
pDM_Odm->LinkedInterval = 0;
|
||||
}
|
||||
|
||||
void phydm_rf_init(IN PVOID pDM_VOID)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
odm_TXPowerTrackingInit(pDM_Odm);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
ODM_ClearTxPowerTrackingState(pDM_Odm);
|
||||
#endif
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
|
||||
#if (RTL8814A_SUPPORT == 1)
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8814A)
|
||||
PHY_IQCalibrate_8814A_Init(pDM_Odm);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
void phydm_rf_watchdog(IN PVOID pDM_VOID)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
ODM_TXPowerTrackingCheck(pDM_Odm);
|
||||
if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
|
||||
odm_IQCalibrate(pDM_Odm);
|
||||
#endif
|
||||
}
|
||||
@@ -0,0 +1,118 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __HAL_PHY_RF_H__
|
||||
#define __HAL_PHY_RF_H__
|
||||
|
||||
#include "phydm_kfree.h"
|
||||
#if (RTL8814A_SUPPORT == 1)
|
||||
#include "rtl8814a/phydm_iqk_8814a.h"
|
||||
#endif
|
||||
|
||||
#if (RTL8822B_SUPPORT == 1)
|
||||
#include "rtl8822b/phydm_iqk_8822b.h"
|
||||
#endif
|
||||
|
||||
#if (RTL8821C_SUPPORT == 1)
|
||||
#include "rtl8821c/phydm_iqk_8821c.h"
|
||||
#endif
|
||||
|
||||
#include "phydm_powertracking_ce.h"
|
||||
|
||||
|
||||
typedef enum _SPUR_CAL_METHOD {
|
||||
PLL_RESET,
|
||||
AFE_PHASE_SEL
|
||||
} SPUR_CAL_METHOD;
|
||||
|
||||
typedef enum _PWRTRACK_CONTROL_METHOD {
|
||||
BBSWING,
|
||||
TXAGC,
|
||||
MIX_MODE,
|
||||
TSSI_MODE,
|
||||
MIX_2G_TSSI_5G_MODE,
|
||||
MIX_5G_TSSI_2G_MODE
|
||||
} PWRTRACK_METHOD;
|
||||
|
||||
typedef VOID (*FuncSetPwr)(PVOID, PWRTRACK_METHOD, u1Byte, u1Byte);
|
||||
typedef VOID(*FuncIQK)(PVOID, u1Byte, u1Byte, u1Byte);
|
||||
typedef VOID (*FuncLCK)(PVOID);
|
||||
typedef VOID (*FuncSwing)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*);
|
||||
typedef VOID (*FuncSwing8814only)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*);
|
||||
typedef VOID(*FuncSwingXtal)(PVOID, ps1Byte*, ps1Byte*);
|
||||
typedef VOID(*FuncSetXtal)(PVOID);
|
||||
|
||||
typedef struct _TXPWRTRACK_CFG {
|
||||
u1Byte SwingTableSize_CCK;
|
||||
u1Byte SwingTableSize_OFDM;
|
||||
u1Byte Threshold_IQK;
|
||||
u1Byte Threshold_DPK;
|
||||
u1Byte AverageThermalNum;
|
||||
u1Byte RfPathCount;
|
||||
u4Byte ThermalRegAddr;
|
||||
FuncSetPwr ODM_TxPwrTrackSetPwr;
|
||||
FuncIQK DoIQK;
|
||||
FuncLCK PHY_LCCalibrate;
|
||||
FuncSwing GetDeltaSwingTable;
|
||||
FuncSwing8814only GetDeltaSwingTable8814only;
|
||||
FuncSwingXtal GetDeltaSwingXtalTable;
|
||||
FuncSetXtal ODM_TxXtalTrackSetXtal;
|
||||
} TXPWRTRACK_CFG, *PTXPWRTRACK_CFG;
|
||||
|
||||
VOID
|
||||
ConfigureTxpowerTrack(
|
||||
IN PVOID pDM_VOID,
|
||||
OUT PTXPWRTRACK_CFG pConfig
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
ODM_ClearTxPowerTrackingState(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
ODM_TXPowerTrackingCallback_ThermalMeter(
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
IN PVOID pDM_VOID
|
||||
#else
|
||||
IN PADAPTER Adapter
|
||||
#endif
|
||||
);
|
||||
|
||||
|
||||
|
||||
#define ODM_TARGET_CHNL_NUM_2G_5G 59
|
||||
|
||||
|
||||
VOID
|
||||
ODM_ResetIQKResult(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
u1Byte
|
||||
ODM_GetRightChnlPlaceforIQK(
|
||||
IN u1Byte chnl
|
||||
);
|
||||
|
||||
void phydm_rf_init( IN PVOID pDM_VOID);
|
||||
void phydm_rf_watchdog( IN PVOID pDM_VOID);
|
||||
|
||||
#endif // #ifndef __HAL_PHY_RF_H__
|
||||
|
||||
@@ -0,0 +1,792 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#include "mp_precomp.h"
|
||||
#include "phydm_precomp.h"
|
||||
|
||||
#define CALCULATE_SWINGTALBE_OFFSET(_offset, _direction, _size, _deltaThermal) \
|
||||
do {\
|
||||
for(_offset = 0; _offset < _size; _offset++)\
|
||||
{\
|
||||
if(_deltaThermal < thermalThreshold[_direction][_offset])\
|
||||
{\
|
||||
if(_offset != 0)\
|
||||
_offset--;\
|
||||
break;\
|
||||
}\
|
||||
} \
|
||||
if(_offset >= _size)\
|
||||
_offset = _size-1;\
|
||||
} while(0)
|
||||
|
||||
void ConfigureTxpowerTrack(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
OUT PTXPWRTRACK_CFG pConfig
|
||||
)
|
||||
{
|
||||
#if RTL8192E_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8192E)
|
||||
ConfigureTxpowerTrack_8192E(pConfig);
|
||||
#endif
|
||||
#if RTL8821A_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8821)
|
||||
ConfigureTxpowerTrack_8821A(pConfig);
|
||||
#endif
|
||||
#if RTL8812A_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8812)
|
||||
ConfigureTxpowerTrack_8812A(pConfig);
|
||||
#endif
|
||||
#if RTL8188E_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8188E)
|
||||
ConfigureTxpowerTrack_8188E(pConfig);
|
||||
#endif
|
||||
|
||||
#if RTL8188F_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8188F)
|
||||
ConfigureTxpowerTrack_8188F(pConfig);
|
||||
#endif
|
||||
|
||||
#if RTL8723B_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8723B)
|
||||
ConfigureTxpowerTrack_8723B(pConfig);
|
||||
#endif
|
||||
|
||||
#if RTL8814A_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8814A)
|
||||
ConfigureTxpowerTrack_8814A(pConfig);
|
||||
#endif
|
||||
|
||||
#if RTL8703B_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8703B)
|
||||
ConfigureTxpowerTrack_8703B(pConfig);
|
||||
#endif
|
||||
|
||||
#if RTL8822B_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8822B)
|
||||
ConfigureTxpowerTrack_8822B(pConfig);
|
||||
#endif
|
||||
|
||||
#if RTL8723D_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8723D)
|
||||
ConfigureTxpowerTrack_8723D(pConfig);
|
||||
#endif
|
||||
|
||||
#if RTL8821C_SUPPORT
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8821C)
|
||||
ConfigureTxpowerTrack_8821C(pConfig);
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
//======================================================================
|
||||
// <20121113, Kordan> This function should be called when TxAGC changed.
|
||||
// Otherwise the previous compensation is gone, because we record the
|
||||
// delta of temperature between two TxPowerTracking watch dogs.
|
||||
//
|
||||
// NOTE: If Tx BB swing or Tx scaling is varified during run-time, still
|
||||
// need to call this function.
|
||||
//======================================================================
|
||||
VOID
|
||||
ODM_ClearTxPowerTrackingState(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(pDM_Odm->Adapter);
|
||||
u1Byte p = 0;
|
||||
PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo);
|
||||
|
||||
pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->DefaultCckIndex;
|
||||
pRFCalibrateInfo->BbSwingIdxCck = pRFCalibrateInfo->DefaultCckIndex;
|
||||
pRFCalibrateInfo->CCK_index = 0;
|
||||
|
||||
for (p = ODM_RF_PATH_A; p < MAX_RF_PATH; ++p)
|
||||
{
|
||||
pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->DefaultOfdmIndex;
|
||||
pRFCalibrateInfo->BbSwingIdxOfdm[p] = pRFCalibrateInfo->DefaultOfdmIndex;
|
||||
pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->DefaultOfdmIndex;
|
||||
|
||||
pRFCalibrateInfo->PowerIndexOffset[p] = 0;
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = 0;
|
||||
pRFCalibrateInfo->DeltaPowerIndexLast[p] = 0;
|
||||
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = 0; /* Initial Mix mode power tracking*/
|
||||
pRFCalibrateInfo->Remnant_OFDMSwingIdx[p] = 0;
|
||||
pRFCalibrateInfo->KfreeOffset[p] = 0;
|
||||
}
|
||||
|
||||
pRFCalibrateInfo->Modify_TxAGC_Flag_PathA = FALSE; /*Initial at Modify Tx Scaling Mode*/
|
||||
pRFCalibrateInfo->Modify_TxAGC_Flag_PathB = FALSE; /*Initial at Modify Tx Scaling Mode*/
|
||||
pRFCalibrateInfo->Modify_TxAGC_Flag_PathC = FALSE; /*Initial at Modify Tx Scaling Mode*/
|
||||
pRFCalibrateInfo->Modify_TxAGC_Flag_PathD = FALSE; /*Initial at Modify Tx Scaling Mode*/
|
||||
pRFCalibrateInfo->Remnant_CCKSwingIdx = 0;
|
||||
pRFCalibrateInfo->ThermalValue = pHalData->EEPROMThermalMeter;
|
||||
|
||||
pRFCalibrateInfo->Modify_TxAGC_Value_CCK=0; //modify by Mingzhi.Guo
|
||||
pRFCalibrateInfo->Modify_TxAGC_Value_OFDM=0; //modify by Mingzhi.Guo
|
||||
|
||||
}
|
||||
|
||||
VOID
|
||||
ODM_TXPowerTrackingCallback_ThermalMeter(
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
#else
|
||||
IN PADAPTER Adapter
|
||||
#endif
|
||||
)
|
||||
{
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
PODM_RF_CAL_T pRFCalibrateInfo = &(pDM_Odm->RFCalibrateInfo);
|
||||
|
||||
u1Byte ThermalValue = 0, delta, delta_LCK, delta_IQK, p = 0, i = 0;
|
||||
s1Byte diff_DPK[4] = {0};
|
||||
u1Byte ThermalValue_AVG_count = 0;
|
||||
u4Byte ThermalValue_AVG = 0, RegC80, RegCd0, RegCd4, Regab4;
|
||||
|
||||
u1Byte OFDM_min_index = 0; // OFDM BB Swing should be less than +3.0dB, which is required by Arthur
|
||||
u1Byte Indexforchannel = 0; // GetRightChnlPlaceforIQK(pHalData->CurrentChannel)
|
||||
u1Byte PowerTrackingType = pHalData->RfPowerTrackingType;
|
||||
u1Byte XtalOffsetEanble = 0;
|
||||
|
||||
TXPWRTRACK_CFG c;
|
||||
|
||||
//4 1. The following TWO tables decide the final index of OFDM/CCK swing table.
|
||||
pu1Byte deltaSwingTableIdx_TUP_A = NULL;
|
||||
pu1Byte deltaSwingTableIdx_TDOWN_A = NULL;
|
||||
pu1Byte deltaSwingTableIdx_TUP_B = NULL;
|
||||
pu1Byte deltaSwingTableIdx_TDOWN_B = NULL;
|
||||
/*for 8814 add by Yu Chen*/
|
||||
pu1Byte deltaSwingTableIdx_TUP_C = NULL;
|
||||
pu1Byte deltaSwingTableIdx_TDOWN_C = NULL;
|
||||
pu1Byte deltaSwingTableIdx_TUP_D = NULL;
|
||||
pu1Byte deltaSwingTableIdx_TDOWN_D = NULL;
|
||||
/*for Xtal Offset by James.Tung*/
|
||||
ps1Byte deltaSwingTableXtal_UP = NULL;
|
||||
ps1Byte deltaSwingTableXtal_DOWN = NULL;
|
||||
|
||||
//4 2. Initilization ( 7 steps in total )
|
||||
|
||||
ConfigureTxpowerTrack(pDM_Odm, &c);
|
||||
|
||||
(*c.GetDeltaSwingTable)(pDM_Odm, (pu1Byte *)&deltaSwingTableIdx_TUP_A, (pu1Byte *)&deltaSwingTableIdx_TDOWN_A,
|
||||
(pu1Byte *)&deltaSwingTableIdx_TUP_B, (pu1Byte *)&deltaSwingTableIdx_TDOWN_B);
|
||||
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8814A) /*for 8814 path C & D*/
|
||||
(*c.GetDeltaSwingTable8814only)(pDM_Odm, (pu1Byte *)&deltaSwingTableIdx_TUP_C, (pu1Byte *)&deltaSwingTableIdx_TDOWN_C,
|
||||
(pu1Byte *)&deltaSwingTableIdx_TUP_D, (pu1Byte *)&deltaSwingTableIdx_TDOWN_D);
|
||||
|
||||
if (pDM_Odm->SupportICType & (ODM_RTL8703B | ODM_RTL8723D)) /*for Xtal Offset*/
|
||||
(*c.GetDeltaSwingXtalTable)(pDM_Odm, (ps1Byte *)&deltaSwingTableXtal_UP, (ps1Byte *)&deltaSwingTableXtal_DOWN);
|
||||
|
||||
|
||||
pRFCalibrateInfo->TXPowerTrackingCallbackCnt++; /*cosa add for debug*/
|
||||
pRFCalibrateInfo->bTXPowerTrackingInit = TRUE;
|
||||
|
||||
/*pRFCalibrateInfo->TxPowerTrackControl = pHalData->TxPowerTrackControl;
|
||||
<Kordan> We should keep updating the control variable according to HalData.
|
||||
<Kordan> RFCalibrateInfo.RegA24 will be initialized when ODM HW configuring, but MP configures with para files. */
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
||||
#if (MP_DRIVER == 1)
|
||||
pRFCalibrateInfo->RegA24 = 0x090e1317;
|
||||
#endif
|
||||
#elif (DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
if (pDM_Odm->mp_mode == TRUE)
|
||||
pRFCalibrateInfo->RegA24 = 0x090e1317;
|
||||
#endif
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("===>ODM_TXPowerTrackingCallback_ThermalMeter\n pRFCalibrateInfo->BbSwingIdxCckBase: %d, pRFCalibrateInfo->BbSwingIdxOfdmBase[A]: %d, pRFCalibrateInfo->DefaultOfdmIndex: %d\n",
|
||||
pRFCalibrateInfo->BbSwingIdxCckBase, pRFCalibrateInfo->BbSwingIdxOfdmBase[ODM_RF_PATH_A], pRFCalibrateInfo->DefaultOfdmIndex));
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("pRFCalibrateInfo->TxPowerTrackControl=%d, pHalData->EEPROMThermalMeter %d\n", pRFCalibrateInfo->TxPowerTrackControl, pHalData->EEPROMThermalMeter));
|
||||
ThermalValue = (u1Byte)ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, c.ThermalRegAddr, 0xfc00); //0x42: RF Reg[15:10] 88E
|
||||
|
||||
/*add log by zhao he, check c80/c94/c14/ca0 value*/
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8723D) {
|
||||
RegC80 = ODM_GetBBReg(pDM_Odm, 0xc80, bMaskDWord);
|
||||
RegCd0 = ODM_GetBBReg(pDM_Odm, 0xcd0, bMaskDWord);
|
||||
RegCd4 = ODM_GetBBReg(pDM_Odm, 0xcd4, bMaskDWord);
|
||||
Regab4 = ODM_GetBBReg(pDM_Odm, 0xab4, 0x000007FF);
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xc80 = 0x%x 0xcd0 = 0x%x 0xcd4 = 0x%x 0xab4 = 0x%x\n", RegC80, RegCd0, RegCd4, Regab4));
|
||||
}
|
||||
|
||||
if (!pRFCalibrateInfo->TxPowerTrackControl)
|
||||
return;
|
||||
|
||||
|
||||
/*4 3. Initialize ThermalValues of RFCalibrateInfo*/
|
||||
|
||||
if (pRFCalibrateInfo->bReloadtxpowerindex)
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,("reload ofdm index for band switch\n"));
|
||||
|
||||
/*4 4. Calculate average thermal meter*/
|
||||
|
||||
pRFCalibrateInfo->ThermalValue_AVG[pRFCalibrateInfo->ThermalValue_AVG_index] = ThermalValue;
|
||||
pRFCalibrateInfo->ThermalValue_AVG_index++;
|
||||
if (pRFCalibrateInfo->ThermalValue_AVG_index == c.AverageThermalNum) /*Average times = c.AverageThermalNum*/
|
||||
pRFCalibrateInfo->ThermalValue_AVG_index = 0;
|
||||
|
||||
for(i = 0; i < c.AverageThermalNum; i++)
|
||||
{
|
||||
if (pRFCalibrateInfo->ThermalValue_AVG[i]) {
|
||||
ThermalValue_AVG += pRFCalibrateInfo->ThermalValue_AVG[i];
|
||||
ThermalValue_AVG_count++;
|
||||
}
|
||||
}
|
||||
|
||||
if(ThermalValue_AVG_count) //Calculate Average ThermalValue after average enough times
|
||||
{
|
||||
ThermalValue = (u1Byte)(ThermalValue_AVG / ThermalValue_AVG_count);
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("AVG Thermal Meter = 0x%X, EFUSE Thermal Base = 0x%X\n", ThermalValue, pHalData->EEPROMThermalMeter));
|
||||
}
|
||||
|
||||
//4 5. Calculate delta, delta_LCK, delta_IQK.
|
||||
|
||||
//"delta" here is used to determine whether thermal value changes or not.
|
||||
delta = (ThermalValue > pRFCalibrateInfo->ThermalValue)?(ThermalValue - pRFCalibrateInfo->ThermalValue):(pRFCalibrateInfo->ThermalValue - ThermalValue);
|
||||
delta_LCK = (ThermalValue > pRFCalibrateInfo->ThermalValue_LCK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_LCK):(pRFCalibrateInfo->ThermalValue_LCK - ThermalValue);
|
||||
delta_IQK = (ThermalValue > pRFCalibrateInfo->ThermalValue_IQK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_IQK):(pRFCalibrateInfo->ThermalValue_IQK - ThermalValue);
|
||||
|
||||
if (pRFCalibrateInfo->ThermalValue_IQK == 0xff) { /*no PG, use thermal value for IQK*/
|
||||
pRFCalibrateInfo->ThermalValue_IQK = ThermalValue;
|
||||
delta_IQK = (ThermalValue > pRFCalibrateInfo->ThermalValue_IQK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_IQK):(pRFCalibrateInfo->ThermalValue_IQK - ThermalValue);
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, use ThermalValue for IQK\n"));
|
||||
}
|
||||
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
diff_DPK[p] = (s1Byte)ThermalValue - (s1Byte)pRFCalibrateInfo->DpkThermal[p];
|
||||
|
||||
/*4 6. If necessary, do LCK.*/
|
||||
|
||||
if (!(pDM_Odm->SupportICType & ODM_RTL8821)) { /*no PG , do LCK at initial status*/
|
||||
if (pRFCalibrateInfo->ThermalValue_LCK == 0xff) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("no PG, do LCK\n"));
|
||||
pRFCalibrateInfo->ThermalValue_LCK = ThermalValue;
|
||||
|
||||
/*Use RTLCK, so close power tracking driver LCK*/
|
||||
if (!(pDM_Odm->SupportICType & ODM_RTL8814A)) {
|
||||
if (c.PHY_LCCalibrate)
|
||||
(*c.PHY_LCCalibrate)(pDM_Odm);
|
||||
}
|
||||
|
||||
delta_LCK = (ThermalValue > pRFCalibrateInfo->ThermalValue_LCK)?(ThermalValue - pRFCalibrateInfo->ThermalValue_LCK):(pRFCalibrateInfo->ThermalValue_LCK - ThermalValue);
|
||||
}
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", delta, delta_LCK, delta_IQK));
|
||||
|
||||
/* Delta temperature is equal to or larger than 20 centigrade.*/
|
||||
if (delta_LCK >= c.Threshold_IQK) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_LCK(%d) >= Threshold_IQK(%d)\n", delta_LCK, c.Threshold_IQK));
|
||||
pRFCalibrateInfo->ThermalValue_LCK = ThermalValue;
|
||||
|
||||
/*Use RTLCK, so close power tracking driver LCK*/
|
||||
if (!(pDM_Odm->SupportICType & ODM_RTL8814A)) {
|
||||
if (c.PHY_LCCalibrate)
|
||||
(*c.PHY_LCCalibrate)(pDM_Odm);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*3 7. If necessary, move the index of swing table to adjust Tx power.*/
|
||||
|
||||
if (delta > 0 && pRFCalibrateInfo->TxPowerTrackControl)
|
||||
{
|
||||
//"delta" here is used to record the absolute value of differrence.
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
delta = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue);
|
||||
#else
|
||||
delta = (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)?(ThermalValue - pDM_Odm->priv->pmib->dot11RFEntry.ther):(pDM_Odm->priv->pmib->dot11RFEntry.ther - ThermalValue);
|
||||
#endif
|
||||
if (delta >= TXPWR_TRACK_TABLE_SIZE)
|
||||
delta = TXPWR_TRACK_TABLE_SIZE - 1;
|
||||
|
||||
/*4 7.1 The Final Power Index = BaseIndex + PowerIndexOffset*/
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
if(ThermalValue > pHalData->EEPROMThermalMeter) {
|
||||
#else
|
||||
if(ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) {
|
||||
#endif
|
||||
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) {
|
||||
pRFCalibrateInfo->DeltaPowerIndexLast[p] = pRFCalibrateInfo->DeltaPowerIndex[p]; /*recording poer index offset*/
|
||||
switch (p) {
|
||||
case ODM_RF_PATH_B:
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("deltaSwingTableIdx_TUP_B[%d] = %d\n", delta, deltaSwingTableIdx_TUP_B[delta]));
|
||||
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_B[delta];
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_B[delta]; /*Record delta swing for mix mode power tracking*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p]));
|
||||
break;
|
||||
|
||||
case ODM_RF_PATH_C:
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("deltaSwingTableIdx_TUP_C[%d] = %d\n", delta, deltaSwingTableIdx_TUP_C[delta]));
|
||||
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_C[delta];
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_C[delta]; /*Record delta swing for mix mode power tracking*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p]));
|
||||
break;
|
||||
|
||||
case ODM_RF_PATH_D:
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("deltaSwingTableIdx_TUP_D[%d] = %d\n", delta, deltaSwingTableIdx_TUP_D[delta]));
|
||||
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_D[delta];
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_D[delta]; /*Record delta swing for mix mode power tracking*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p]));
|
||||
break;
|
||||
|
||||
default:
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("deltaSwingTableIdx_TUP_A[%d] = %d\n", delta, deltaSwingTableIdx_TUP_A[delta]));
|
||||
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = deltaSwingTableIdx_TUP_A[delta];
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = deltaSwingTableIdx_TUP_A[delta]; /*Record delta swing for mix mode power tracking*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("******Temp is higher and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p]));
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (pDM_Odm->SupportICType & (ODM_RTL8703B | ODM_RTL8723D)) {
|
||||
/*Save XtalOffset from Xtal table*/
|
||||
pRFCalibrateInfo->XtalOffsetLast = pRFCalibrateInfo->XtalOffset; /*recording last Xtal offset*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("[Xtal] deltaSwingTableXtal_UP[%d] = %d\n", delta, deltaSwingTableXtal_UP[delta]));
|
||||
pRFCalibrateInfo->XtalOffset = deltaSwingTableXtal_UP[delta];
|
||||
|
||||
if (pRFCalibrateInfo->XtalOffsetLast == pRFCalibrateInfo->XtalOffset)
|
||||
XtalOffsetEanble = 0;
|
||||
else
|
||||
XtalOffsetEanble = 1;
|
||||
}
|
||||
|
||||
} else {
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) {
|
||||
pRFCalibrateInfo->DeltaPowerIndexLast[p] = pRFCalibrateInfo->DeltaPowerIndex[p]; /*recording poer index offset*/
|
||||
|
||||
switch (p) {
|
||||
case ODM_RF_PATH_B:
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("deltaSwingTableIdx_TDOWN_B[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_B[delta]));
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta];
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_B[delta]; /*Record delta swing for mix mode power tracking*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p]));
|
||||
break;
|
||||
|
||||
case ODM_RF_PATH_C:
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("deltaSwingTableIdx_TDOWN_C[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_C[delta]));
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta];
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_C[delta]; /*Record delta swing for mix mode power tracking*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_C] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p]));
|
||||
break;
|
||||
|
||||
case ODM_RF_PATH_D:
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("deltaSwingTableIdx_TDOWN_D[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_D[delta]));
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta];
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_D[delta]; /*Record delta swing for mix mode power tracking*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_D] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p]));
|
||||
break;
|
||||
|
||||
default:
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("deltaSwingTableIdx_TDOWN_A[%d] = %d\n", delta, deltaSwingTableIdx_TDOWN_A[delta]));
|
||||
pRFCalibrateInfo->DeltaPowerIndex[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta];
|
||||
pRFCalibrateInfo->Absolute_OFDMSwingIdx[p] = -1 * deltaSwingTableIdx_TDOWN_A[delta]; /*Record delta swing for mix mode power tracking*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("******Temp is lower and pRFCalibrateInfo->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", pRFCalibrateInfo->Absolute_OFDMSwingIdx[p]));
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (pDM_Odm->SupportICType & (ODM_RTL8703B | ODM_RTL8723D)) {
|
||||
/*Save XtalOffset from Xtal table*/
|
||||
pRFCalibrateInfo->XtalOffsetLast = pRFCalibrateInfo->XtalOffset; /*recording last Xtal offset*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("[Xtal] deltaSwingTableXtal_DOWN[%d] = %d\n", delta, deltaSwingTableXtal_DOWN[delta]));
|
||||
pRFCalibrateInfo->XtalOffset = deltaSwingTableXtal_DOWN[delta];
|
||||
|
||||
if (pRFCalibrateInfo->XtalOffsetLast == pRFCalibrateInfo->XtalOffset)
|
||||
XtalOffsetEanble = 0;
|
||||
else
|
||||
XtalOffsetEanble = 1;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("\n\n=========================== [Path-%d] Calculating PowerIndexOffset===========================\n", p));
|
||||
|
||||
if (pRFCalibrateInfo->DeltaPowerIndex[p] == pRFCalibrateInfo->DeltaPowerIndexLast[p]) /*If Thermal value changes but lookup table value still the same*/
|
||||
pRFCalibrateInfo->PowerIndexOffset[p] = 0;
|
||||
else
|
||||
pRFCalibrateInfo->PowerIndexOffset[p] = pRFCalibrateInfo->DeltaPowerIndex[p] - pRFCalibrateInfo->DeltaPowerIndexLast[p]; /*Power Index Diff between 2 times Power Tracking*/
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("[Path-%d] PowerIndexOffset(%d) = DeltaPowerIndex(%d) - DeltaPowerIndexLast(%d)\n", p, pRFCalibrateInfo->PowerIndexOffset[p], pRFCalibrateInfo->DeltaPowerIndex[p], pRFCalibrateInfo->DeltaPowerIndexLast[p]));
|
||||
|
||||
pRFCalibrateInfo->OFDM_index[p] = pRFCalibrateInfo->BbSwingIdxOfdmBase[p] + pRFCalibrateInfo->PowerIndexOffset[p];
|
||||
pRFCalibrateInfo->CCK_index = pRFCalibrateInfo->BbSwingIdxCckBase + pRFCalibrateInfo->PowerIndexOffset[p];
|
||||
|
||||
pRFCalibrateInfo->BbSwingIdxCck = pRFCalibrateInfo->CCK_index;
|
||||
pRFCalibrateInfo->BbSwingIdxOfdm[p] = pRFCalibrateInfo->OFDM_index[p];
|
||||
|
||||
/*************Print BB Swing Base and Index Offset*************/
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("The 'CCK' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxCck, pRFCalibrateInfo->BbSwingIdxCckBase, pRFCalibrateInfo->PowerIndexOffset[p]));
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("The 'OFDM' final index(%d) = BaseIndex[%d](%d) + PowerIndexOffset(%d)\n", pRFCalibrateInfo->BbSwingIdxOfdm[p], p, pRFCalibrateInfo->BbSwingIdxOfdmBase[p], pRFCalibrateInfo->PowerIndexOffset[p]));
|
||||
|
||||
/*4 7.1 Handle boundary conditions of index.*/
|
||||
|
||||
if (pRFCalibrateInfo->OFDM_index[p] > c.SwingTableSize_OFDM-1)
|
||||
pRFCalibrateInfo->OFDM_index[p] = c.SwingTableSize_OFDM-1;
|
||||
else if (pRFCalibrateInfo->OFDM_index[p] <= OFDM_min_index)
|
||||
pRFCalibrateInfo->OFDM_index[p] = OFDM_min_index;
|
||||
}
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("\n\n========================================================================================================\n"));
|
||||
|
||||
if (pRFCalibrateInfo->CCK_index > c.SwingTableSize_CCK-1)
|
||||
pRFCalibrateInfo->CCK_index = c.SwingTableSize_CCK-1;
|
||||
else if (pRFCalibrateInfo->CCK_index <= 0)
|
||||
pRFCalibrateInfo->CCK_index = 0;
|
||||
} else {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("The thermal meter is unchanged or TxPowerTracking OFF(%d): ThermalValue: %d , pRFCalibrateInfo->ThermalValue: %d\n",
|
||||
pRFCalibrateInfo->TxPowerTrackControl, ThermalValue, pRFCalibrateInfo->ThermalValue));
|
||||
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
pRFCalibrateInfo->PowerIndexOffset[p] = 0;
|
||||
}
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("TxPowerTracking: [CCK] Swing Current Index: %d, Swing Base Index: %d\n",
|
||||
pRFCalibrateInfo->CCK_index, pRFCalibrateInfo->BbSwingIdxCckBase)); /*Print Swing base & current*/
|
||||
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("TxPowerTracking: [OFDM] Swing Current Index: %d, Swing Base Index[%d]: %d\n",
|
||||
pRFCalibrateInfo->OFDM_index[p], p, pRFCalibrateInfo->BbSwingIdxOfdmBase[p]));
|
||||
}
|
||||
|
||||
if ((pDM_Odm->SupportICType & ODM_RTL8814A)) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("PowerTrackingType=%d\n", PowerTrackingType));
|
||||
|
||||
if (PowerTrackingType == 0) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n"));
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0);
|
||||
} else if (PowerTrackingType == 1) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX(2G) TSSI(5G) MODE**********\n"));
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_2G_TSSI_5G_MODE, p, 0);
|
||||
} else if (PowerTrackingType == 2) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX(5G) TSSI(2G)MODE**********\n"));
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_5G_TSSI_2G_MODE, p, 0);
|
||||
} else if (PowerTrackingType == 3) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking TSSI MODE**********\n"));
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, TSSI_MODE, p, 0);
|
||||
}
|
||||
pRFCalibrateInfo->ThermalValue = ThermalValue; /*Record last Power Tracking Thermal Value*/
|
||||
|
||||
} else if ((pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_A] != 0 ||
|
||||
pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_B] != 0 ||
|
||||
pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_C] != 0 ||
|
||||
pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_D] != 0) &&
|
||||
pRFCalibrateInfo->TxPowerTrackControl && (pHalData->EEPROMThermalMeter != 0xff)) {
|
||||
//4 7.2 Configure the Swing Table to adjust Tx Power.
|
||||
|
||||
pRFCalibrateInfo->bTxPowerChanged = TRUE; /*Always TRUE after Tx Power is adjusted by power tracking.*/
|
||||
//
|
||||
// 2012/04/23 MH According to Luke's suggestion, we can not write BB digital
|
||||
// to increase TX power. Otherwise, EVM will be bad.
|
||||
//
|
||||
// 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E.
|
||||
if (ThermalValue > pRFCalibrateInfo->ThermalValue) {
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("Temperature Increasing(%d): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
|
||||
p, pRFCalibrateInfo->PowerIndexOffset[p], delta, ThermalValue, pHalData->EEPROMThermalMeter, pRFCalibrateInfo->ThermalValue));
|
||||
}
|
||||
} else if (ThermalValue < pRFCalibrateInfo->ThermalValue) { /*Low temperature*/
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("Temperature Decreasing(%d): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n",
|
||||
p, pRFCalibrateInfo->PowerIndexOffset[p], delta, ThermalValue, pHalData->EEPROMThermalMeter, pRFCalibrateInfo->ThermalValue));
|
||||
}
|
||||
}
|
||||
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
if (ThermalValue > pHalData->EEPROMThermalMeter)
|
||||
#else
|
||||
if (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther)
|
||||
#endif
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("Temperature(%d) higher than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter));
|
||||
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8821 ||
|
||||
pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8814A ||
|
||||
pDM_Odm->SupportICType == ODM_RTL8703B || pDM_Odm->SupportICType == ODM_RTL8188F || pDM_Odm->SupportICType == ODM_RTL8822B ||
|
||||
pDM_Odm->SupportICType == ODM_RTL8723D || pDM_Odm->SupportICType == ODM_RTL8821C) {
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n"));
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0);
|
||||
} else {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking BBSWING_MODE**********\n"));
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("Temperature(%d) lower than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter));
|
||||
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8188E || pDM_Odm->SupportICType == ODM_RTL8192E || pDM_Odm->SupportICType == ODM_RTL8821 ||
|
||||
pDM_Odm->SupportICType == ODM_RTL8812 || pDM_Odm->SupportICType == ODM_RTL8723B || pDM_Odm->SupportICType == ODM_RTL8814A ||
|
||||
pDM_Odm->SupportICType == ODM_RTL8703B || pDM_Odm->SupportICType == ODM_RTL8188F || pDM_Odm->SupportICType == ODM_RTL8822B ||
|
||||
pDM_Odm->SupportICType == ODM_RTL8723D || pDM_Odm->SupportICType == ODM_RTL8821C) {
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking MIX_MODE**********\n"));
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, Indexforchannel);
|
||||
} else {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter POWER Tracking BBSWING_MODE**********\n"));
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
(*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, BBSWING, p, Indexforchannel);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
pRFCalibrateInfo->BbSwingIdxCckBase = pRFCalibrateInfo->BbSwingIdxCck; /*Record last time Power Tracking result as base.*/
|
||||
for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++)
|
||||
pRFCalibrateInfo->BbSwingIdxOfdmBase[p] = pRFCalibrateInfo->BbSwingIdxOfdm[p];
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("pRFCalibrateInfo->ThermalValue = %d ThermalValue= %d\n", pRFCalibrateInfo->ThermalValue, ThermalValue));
|
||||
|
||||
pRFCalibrateInfo->ThermalValue = ThermalValue; /*Record last Power Tracking Thermal Value*/
|
||||
|
||||
}
|
||||
|
||||
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8703B || pDM_Odm->SupportICType == ODM_RTL8723D) {
|
||||
|
||||
if (XtalOffsetEanble != 0 && pRFCalibrateInfo->TxPowerTrackControl && (pHalData->EEPROMThermalMeter != 0xff)) {
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********Enter Xtal Tracking**********\n"));
|
||||
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
if (ThermalValue > pHalData->EEPROMThermalMeter) {
|
||||
#else
|
||||
if (ThermalValue > pDM_Odm->priv->pmib->dot11RFEntry.ther) {
|
||||
#endif
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("Temperature(%d) higher than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter));
|
||||
(*c.ODM_TxXtalTrackSetXtal)(pDM_Odm);
|
||||
} else {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
|
||||
("Temperature(%d) lower than PG value(%d)\n", ThermalValue, pHalData->EEPROMThermalMeter));
|
||||
(*c.ODM_TxXtalTrackSetXtal)(pDM_Odm);
|
||||
}
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("**********End Xtal Tracking**********\n"));
|
||||
}
|
||||
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
|
||||
if (!IS_HARDWARE_TYPE_8723B(Adapter)) {
|
||||
/*Delta temperature is equal to or larger than 20 centigrade (When threshold is 8).*/
|
||||
if (delta_IQK >= c.Threshold_IQK) {
|
||||
pRFCalibrateInfo->ThermalValue_IQK = ThermalValue;
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("delta_IQK(%d) >= Threshold_IQK(%d)\n", delta_IQK, c.Threshold_IQK));
|
||||
if (!pRFCalibrateInfo->bIQKInProgress)
|
||||
(*c.DoIQK)(pDM_Odm, delta_IQK, ThermalValue, 8);
|
||||
}
|
||||
}
|
||||
if (pRFCalibrateInfo->DpkThermal[ODM_RF_PATH_A] != 0) {
|
||||
if (diff_DPK[ODM_RF_PATH_A] >= c.Threshold_DPK) {
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1);
|
||||
ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, (diff_DPK[ODM_RF_PATH_A] / c.Threshold_DPK));
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0);
|
||||
} else if ((diff_DPK[ODM_RF_PATH_A] <= -1 * c.Threshold_DPK)) {
|
||||
s4Byte value = 0x20 + (diff_DPK[ODM_RF_PATH_A] / c.Threshold_DPK);
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1);
|
||||
ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, value);
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0);
|
||||
} else {
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1);
|
||||
ODM_SetBBReg(pDM_Odm, 0xcc4, BIT14|BIT13|BIT12|BIT11|BIT10, 0);
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0);
|
||||
}
|
||||
}
|
||||
if (pRFCalibrateInfo->DpkThermal[ODM_RF_PATH_B] != 0) {
|
||||
if (diff_DPK[ODM_RF_PATH_B] >= c.Threshold_DPK) {
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1);
|
||||
ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, (diff_DPK[ODM_RF_PATH_B] / c.Threshold_DPK));
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0);
|
||||
} else if ((diff_DPK[ODM_RF_PATH_B] <= -1 * c.Threshold_DPK)) {
|
||||
s4Byte value = 0x20 + (diff_DPK[ODM_RF_PATH_B] / c.Threshold_DPK);
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1);
|
||||
ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, value);
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0);
|
||||
} else {
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x1);
|
||||
ODM_SetBBReg(pDM_Odm, 0xec4, BIT14|BIT13|BIT12|BIT11|BIT10, 0);
|
||||
ODM_SetBBReg(pDM_Odm, 0x82c, BIT(31), 0x0);
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("<===ODM_TXPowerTrackingCallback_ThermalMeter\n"));
|
||||
|
||||
pRFCalibrateInfo->TXPowercount = 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
//3============================================================
|
||||
//3 IQ Calibration
|
||||
//3============================================================
|
||||
|
||||
VOID
|
||||
ODM_ResetIQKResult(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
return;
|
||||
}
|
||||
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
u1Byte ODM_GetRightChnlPlaceforIQK(u1Byte chnl)
|
||||
{
|
||||
u1Byte channel_all[ODM_TARGET_CHNL_NUM_2G_5G] =
|
||||
{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,38,40,42,44,46,48,50,52,54,56,58,60,62,64,100,102,104,106,108,110,112,114,116,118,120,122,124,126,128,130,132,134,136,138,140,149,151,153,155,157,159,161,163,165};
|
||||
u1Byte place = chnl;
|
||||
|
||||
|
||||
if(chnl > 14)
|
||||
{
|
||||
for(place = 14; place<sizeof(channel_all); place++)
|
||||
{
|
||||
if(channel_all[place] == chnl)
|
||||
{
|
||||
return place-13;
|
||||
}
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
|
||||
}
|
||||
#endif
|
||||
|
||||
VOID
|
||||
odm_IQCalibrate(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
)
|
||||
{
|
||||
PADAPTER Adapter = pDM_Odm->Adapter;
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
if (*pDM_Odm->pIsFcsModeEnable)
|
||||
return;
|
||||
#endif
|
||||
|
||||
if (pDM_Odm->bLinked) {
|
||||
|
||||
if ((*pDM_Odm->pChannel != pDM_Odm->preChannel) && (!*pDM_Odm->pbScanInProcess)) {
|
||||
pDM_Odm->preChannel = *pDM_Odm->pChannel;
|
||||
pDM_Odm->LinkedInterval = 0;
|
||||
}
|
||||
|
||||
if (pDM_Odm->LinkedInterval < 3)
|
||||
pDM_Odm->LinkedInterval++;
|
||||
|
||||
if (pDM_Odm->LinkedInterval == 2) {
|
||||
PHY_IQCalibrate(Adapter, FALSE);
|
||||
}
|
||||
} else
|
||||
pDM_Odm->LinkedInterval = 0;
|
||||
|
||||
}
|
||||
|
||||
void phydm_rf_init(IN PDM_ODM_T pDM_Odm)
|
||||
{
|
||||
|
||||
odm_TXPowerTrackingInit(pDM_Odm);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
ODM_ClearTxPowerTrackingState(pDM_Odm);
|
||||
#endif
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
|
||||
#if (RTL8814A_SUPPORT == 1)
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8814A)
|
||||
PHY_IQCalibrate_8814A_Init(pDM_Odm);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
void phydm_rf_watchdog(IN PDM_ODM_T pDM_Odm)
|
||||
{
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
PADAPTER Adapter = pDM_Odm->Adapter;
|
||||
PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
|
||||
|
||||
if(!pMgntInfo->IQKBeforeConnection)
|
||||
{
|
||||
ODM_TXPowerTrackingCheck(pDM_Odm);
|
||||
if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
|
||||
odm_IQCalibrate(pDM_Odm);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
@@ -0,0 +1,120 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __HAL_PHY_RF_H__
|
||||
#define __HAL_PHY_RF_H__
|
||||
|
||||
#include "phydm_kfree.h"
|
||||
#if (RTL8814A_SUPPORT == 1)
|
||||
#include "rtl8814a/phydm_iqk_8814a.h"
|
||||
#endif
|
||||
|
||||
#if (RTL8822B_SUPPORT == 1)
|
||||
#include "rtl8822b/phydm_iqk_8822b.h"
|
||||
#include "../mac/Halmac_type.h"
|
||||
#endif
|
||||
#include "phydm_powertracking_win.h"
|
||||
|
||||
#if (RTL8821C_SUPPORT == 1)
|
||||
#include "rtl8821c/phydm_iqk_8821c.h"
|
||||
#endif
|
||||
|
||||
typedef enum _SPUR_CAL_METHOD {
|
||||
PLL_RESET,
|
||||
AFE_PHASE_SEL
|
||||
} SPUR_CAL_METHOD;
|
||||
|
||||
typedef enum _PWRTRACK_CONTROL_METHOD {
|
||||
BBSWING,
|
||||
TXAGC,
|
||||
MIX_MODE,
|
||||
TSSI_MODE,
|
||||
MIX_2G_TSSI_5G_MODE,
|
||||
MIX_5G_TSSI_2G_MODE
|
||||
} PWRTRACK_METHOD;
|
||||
|
||||
typedef VOID(*FuncSetPwr)(PVOID, PWRTRACK_METHOD, u1Byte, u1Byte);
|
||||
typedef VOID(*FuncIQK)(PVOID, u1Byte, u1Byte, u1Byte);
|
||||
typedef VOID(*FuncLCK)(PVOID);
|
||||
typedef VOID(*FuncSwing)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*);
|
||||
typedef VOID(*FuncSwing8814only)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*);
|
||||
typedef VOID (*FuncSwingXtal)(PVOID, ps1Byte*, ps1Byte*);
|
||||
typedef VOID (*FuncSetXtal)(PVOID);
|
||||
typedef VOID(*FuncAllSwing)(PVOID, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*, pu1Byte*);
|
||||
|
||||
typedef struct _TXPWRTRACK_CFG {
|
||||
u1Byte SwingTableSize_CCK;
|
||||
u1Byte SwingTableSize_OFDM;
|
||||
u1Byte Threshold_IQK;
|
||||
u1Byte Threshold_DPK;
|
||||
u1Byte AverageThermalNum;
|
||||
u1Byte RfPathCount;
|
||||
u4Byte ThermalRegAddr;
|
||||
FuncSetPwr ODM_TxPwrTrackSetPwr;
|
||||
FuncIQK DoIQK;
|
||||
FuncLCK PHY_LCCalibrate;
|
||||
FuncSwing GetDeltaSwingTable;
|
||||
FuncSwing8814only GetDeltaSwingTable8814only;
|
||||
FuncSwingXtal GetDeltaSwingXtalTable;
|
||||
FuncSetXtal ODM_TxXtalTrackSetXtal;
|
||||
FuncAllSwing GetDeltaAllSwingTable;
|
||||
} TXPWRTRACK_CFG, *PTXPWRTRACK_CFG;
|
||||
|
||||
VOID
|
||||
ConfigureTxpowerTrack(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
OUT PTXPWRTRACK_CFG pConfig
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
ODM_ClearTxPowerTrackingState(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
VOID
|
||||
ODM_TXPowerTrackingCallback_ThermalMeter(
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
#else
|
||||
IN PADAPTER Adapter
|
||||
#endif
|
||||
);
|
||||
|
||||
|
||||
|
||||
#define ODM_TARGET_CHNL_NUM_2G_5G 59
|
||||
|
||||
|
||||
VOID
|
||||
ODM_ResetIQKResult(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
);
|
||||
u1Byte
|
||||
ODM_GetRightChnlPlaceforIQK(
|
||||
IN u1Byte chnl
|
||||
);
|
||||
|
||||
VOID odm_IQCalibrate(IN PDM_ODM_T pDM_Odm);
|
||||
VOID phydm_rf_init( IN PDM_ODM_T pDM_Odm);
|
||||
VOID phydm_rf_watchdog( IN PDM_ODM_T pDM_Odm);
|
||||
|
||||
#endif // #ifndef __HAL_PHY_RF_H__
|
||||
|
||||
@@ -0,0 +1,20 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
+3340
File diff suppressed because it is too large
Load Diff
+1299
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,106 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __PHYDMACS_H__
|
||||
#define __PHYDMACS_H__
|
||||
|
||||
#define ACS_VERSION "1.1" /*20150729 by YuChen*/
|
||||
#define CLM_VERSION "1.0"
|
||||
|
||||
#define ODM_MAX_CHANNEL_2G 14
|
||||
#define ODM_MAX_CHANNEL_5G 24
|
||||
|
||||
// For phydm_AutoChannelSelectSettingAP()
|
||||
#define STORE_DEFAULT_NHM_SETTING 0
|
||||
#define RESTORE_DEFAULT_NHM_SETTING 1
|
||||
#define ACS_NHM_SETTING 2
|
||||
|
||||
typedef struct _ACS_
|
||||
{
|
||||
BOOLEAN bForceACSResult;
|
||||
u1Byte CleanChannel_2G;
|
||||
u1Byte CleanChannel_5G;
|
||||
u2Byte Channel_Info_2G[2][ODM_MAX_CHANNEL_2G]; //Channel_Info[1]: Channel Score, Channel_Info[2]:Channel_Scan_Times
|
||||
u2Byte Channel_Info_5G[2][ODM_MAX_CHANNEL_5G];
|
||||
|
||||
#if ( DM_ODM_SUPPORT_TYPE & ODM_AP )
|
||||
u1Byte ACS_Step;
|
||||
// NHM Count 0-11
|
||||
u1Byte NHM_Cnt[14][11];
|
||||
|
||||
// AC-Series, for storing previous setting
|
||||
u4Byte Reg0x990;
|
||||
u4Byte Reg0x994;
|
||||
u4Byte Reg0x998;
|
||||
u4Byte Reg0x99C;
|
||||
u1Byte Reg0x9A0; // u1Byte
|
||||
|
||||
// N-Series, for storing previous setting
|
||||
u4Byte Reg0x890;
|
||||
u4Byte Reg0x894;
|
||||
u4Byte Reg0x898;
|
||||
u4Byte Reg0x89C;
|
||||
u1Byte Reg0xE28; // u1Byte
|
||||
#endif
|
||||
|
||||
}ACS, *PACS;
|
||||
|
||||
|
||||
VOID
|
||||
odm_AutoChannelSelectInit(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_AutoChannelSelectReset(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_AutoChannelSelect(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Channel
|
||||
);
|
||||
|
||||
u1Byte
|
||||
ODM_GetAutoChannelSelectResult(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Band
|
||||
);
|
||||
|
||||
#if ( DM_ODM_SUPPORT_TYPE & ODM_AP )
|
||||
|
||||
VOID
|
||||
phydm_AutoChannelSelectSettingAP(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u4Byte Setting, // 0: STORE_DEFAULT_NHM_SETTING; 1: RESTORE_DEFAULT_NHM_SETTING, 2: ACS_NHM_SETTING
|
||||
IN u4Byte acs_step
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_GetNHMStatisticsAP(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u4Byte idx, // @ 2G, Real channel number = idx+1
|
||||
IN u4Byte acs_step
|
||||
);
|
||||
|
||||
#endif //#if ( DM_ODM_SUPPORT_TYPE & ODM_AP )
|
||||
|
||||
#endif //#ifndef __PHYDMACS_H__
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,222 @@
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __PHYDMADAPTIVITY_H__
|
||||
#define __PHYDMADAPTIVITY_H__
|
||||
|
||||
#define ADAPTIVITY_VERSION "9.3.4" /*20160512 changed by Kevin, modify 0xce8[13]=1 for 8197F when adaptivity is enabled*/
|
||||
|
||||
#define PwdBUpperBound 7
|
||||
#define DFIRloss 5
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN))
|
||||
typedef enum _tag_PhyDM_REGULATION_Type {
|
||||
REGULATION_FCC = 0,
|
||||
REGULATION_MKK = 1,
|
||||
REGULATION_ETSI = 2,
|
||||
REGULATION_WW = 3,
|
||||
|
||||
MAX_REGULATION_NUM = 4
|
||||
} PhyDM_REGULATION_TYPE;
|
||||
#endif
|
||||
|
||||
typedef enum _PHYDM_ADAPTIVITY_Info_Definition {
|
||||
PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE = 0,
|
||||
PHYDM_ADAPINFO_DCBACKOFF,
|
||||
PHYDM_ADAPINFO_DYNAMICLINKADAPTIVITY,
|
||||
PHYDM_ADAPINFO_TH_L2H_INI,
|
||||
PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF,
|
||||
PHYDM_ADAPINFO_AP_NUM_TH
|
||||
|
||||
} PHYDM_ADAPINFO_E;
|
||||
|
||||
|
||||
|
||||
typedef enum tag_PhyDM_set_LNA {
|
||||
PhyDM_disable_LNA = 0,
|
||||
PhyDM_enable_LNA = 1,
|
||||
} PhyDM_set_LNA;
|
||||
|
||||
|
||||
typedef enum tag_PhyDM_TRx_MUX_Type
|
||||
{
|
||||
PhyDM_SHUTDOWN = 0,
|
||||
PhyDM_STANDBY_MODE = 1,
|
||||
PhyDM_TX_MODE = 2,
|
||||
PhyDM_RX_MODE = 3
|
||||
}PhyDM_Trx_MUX_Type;
|
||||
|
||||
typedef enum tag_PhyDM_MACEDCCA_Type
|
||||
{
|
||||
PhyDM_IGNORE_EDCCA = 0,
|
||||
PhyDM_DONT_IGNORE_EDCCA = 1
|
||||
}PhyDM_MACEDCCA_Type;
|
||||
|
||||
typedef struct _ADAPTIVITY_STATISTICS {
|
||||
s1Byte TH_L2H_ini_backup;
|
||||
s1Byte TH_EDCCA_HL_diff_backup;
|
||||
s1Byte IGI_Base;
|
||||
u1Byte IGI_target;
|
||||
u1Byte NHMWait;
|
||||
s1Byte H2L_lb;
|
||||
s1Byte L2H_lb;
|
||||
BOOLEAN bFirstLink;
|
||||
BOOLEAN bCheck;
|
||||
BOOLEAN DynamicLinkAdaptivity;
|
||||
u1Byte APNumTH;
|
||||
u1Byte AdajustIGILevel;
|
||||
BOOLEAN AcsForAdaptivity;
|
||||
s1Byte backupL2H;
|
||||
s1Byte backupH2L;
|
||||
BOOLEAN bStopEDCCA;
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
||||
RT_WORK_ITEM phydm_pauseEDCCAWorkItem;
|
||||
RT_WORK_ITEM phydm_resumeEDCCAWorkItem;
|
||||
#endif
|
||||
} ADAPTIVITY_STATISTICS, *PADAPTIVITY_STATISTICS;
|
||||
|
||||
VOID
|
||||
phydm_pauseEDCCA(
|
||||
IN PVOID pDM_VOID,
|
||||
IN BOOLEAN bPasueEDCCA
|
||||
);
|
||||
|
||||
VOID
|
||||
Phydm_CheckAdaptivity(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
Phydm_CheckEnvironment(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
Phydm_NHMCounterStatisticsInit(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
Phydm_NHMCounterStatistics(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
Phydm_NHMCounterStatisticsReset(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
Phydm_GetNHMCounterStatistics(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
Phydm_MACEDCCAState(
|
||||
IN PVOID pDM_VOID,
|
||||
IN PhyDM_MACEDCCA_Type State
|
||||
);
|
||||
|
||||
VOID
|
||||
Phydm_SetEDCCAThreshold(
|
||||
IN PVOID pDM_VOID,
|
||||
IN s1Byte H2L,
|
||||
IN s1Byte L2H
|
||||
);
|
||||
|
||||
VOID
|
||||
Phydm_SetTRxMux(
|
||||
IN PVOID pDM_VOID,
|
||||
IN PhyDM_Trx_MUX_Type txMode,
|
||||
IN PhyDM_Trx_MUX_Type rxMode
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
Phydm_CalNHMcnt(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
Phydm_SearchPwdBLowerBound(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_adaptivityInfoInit(
|
||||
IN PVOID pDM_VOID,
|
||||
IN PHYDM_ADAPINFO_E CmnInfo,
|
||||
IN u4Byte Value
|
||||
);
|
||||
|
||||
VOID
|
||||
Phydm_AdaptivityInit(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
Phydm_Adaptivity(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte IGI
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_setEDCCAThresholdAPI(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte IGI
|
||||
);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
VOID
|
||||
Phydm_DisableEDCCA(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
Phydm_DynamicEDCCA(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
Phydm_AdaptivityBSOD(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
#endif
|
||||
|
||||
VOID
|
||||
phydm_pauseEDCCA_WorkItemCallback(
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
IN PADAPTER Adapter
|
||||
#else
|
||||
IN PVOID pDM_VOID
|
||||
#endif
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_resumeEDCCA_WorkItemCallback(
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
IN PADAPTER Adapter
|
||||
#else
|
||||
IN PVOID pDM_VOID
|
||||
#endif
|
||||
);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,374 @@
|
||||
#include "mp_precomp.h"
|
||||
#include "phydm_precomp.h"
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
#if ((RTL8197F_SUPPORT == 1)||(RTL8822B_SUPPORT == 1))
|
||||
#include "rtl8197f/Hal8197FPhyReg.h"
|
||||
#include "WlanHAL/HalMac88XX/halmac_reg2.h"
|
||||
#else
|
||||
#include "WlanHAL/HalHeader/HalComReg.h"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if (PHYDM_LA_MODE_SUPPORT == 1)
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
||||
BOOLEAN
|
||||
ADCSmp_BufferAllocate(
|
||||
IN PADAPTER Adapter,
|
||||
IN PRT_ADCSMP AdcSmp
|
||||
)
|
||||
{
|
||||
PRT_ADCSMP_STRING ADCSmpBuf = &(AdcSmp->ADCSmpBuf);
|
||||
|
||||
if (ADCSmpBuf->Length == 0) {
|
||||
if (PlatformAllocateMemoryWithZero(Adapter, (void **)&(ADCSmpBuf->Octet), ADCSmpBuf->buffer_size) == RT_STATUS_SUCCESS)
|
||||
ADCSmpBuf->Length = ADCSmpBuf->buffer_size;
|
||||
else
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
#endif
|
||||
|
||||
VOID
|
||||
ADCSmp_GetTxPktBuf(
|
||||
IN PVOID pDM_VOID,
|
||||
IN PRT_ADCSMP_STRING ADCSmpBuf
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u4Byte i = 0, value32, DataL = 0, DataH = 0;
|
||||
u4Byte Addr, Finish_Addr;
|
||||
u4Byte End_Addr = (ADCSmpBuf->start_pos + ADCSmpBuf->buffer_size)-1; /*End_Addr = 0x3ffff;*/
|
||||
BOOLEAN bRoundUp;
|
||||
static u4Byte page = 0xFF;
|
||||
u4Byte while_cnt = 0;
|
||||
|
||||
ODM_Memory_Set(pDM_Odm, ADCSmpBuf->Octet, 0, ADCSmpBuf->Length);
|
||||
ODM_Write1Byte(pDM_Odm, 0x0106, 0x69);
|
||||
|
||||
DbgPrint("%s\n", __func__);
|
||||
|
||||
value32 = ODM_Read4Byte(pDM_Odm, 0x7c0);
|
||||
bRoundUp = (BOOLEAN)((value32 & BIT31) >> 31);
|
||||
Finish_Addr = (value32 & 0x7FFF0000) >> 16; /*Reg7C0[30:16]: finish addr (unit: 8byte)*/
|
||||
|
||||
if (bRoundUp)
|
||||
Addr = (Finish_Addr+1)<<3;
|
||||
else
|
||||
Addr = ADCSmpBuf->start_pos;
|
||||
|
||||
DbgPrint("bRoundUp = %d, Finish_Addr=0x%x, value32=0x%x\n", bRoundUp, Finish_Addr, value32);
|
||||
DbgPrint("End_Addr = %x, ADCSmpBuf->start_pos = 0x%x, ADCSmpBuf->buffer_size = 0x%x\n", End_Addr, ADCSmpBuf->start_pos, ADCSmpBuf->buffer_size);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
watchdog_stop(pDM_Odm->priv);
|
||||
#endif
|
||||
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8197F) {
|
||||
for (Addr = 0x0, i = 0; Addr < End_Addr; Addr += 8, i += 2) { /*64K byte*/
|
||||
if ((Addr&0xfff) == 0)
|
||||
ODM_SetBBReg(pDM_Odm, 0x0140, bMaskLWord, 0x780+(Addr >> 12));
|
||||
DataL = ODM_GetBBReg(pDM_Odm, 0x8000+(Addr&0xfff), bMaskDWord);
|
||||
DataH = ODM_GetBBReg(pDM_Odm, 0x8000+(Addr&0xfff)+4, bMaskDWord);
|
||||
|
||||
DbgPrint("%08x%08x\n", DataH, DataL);
|
||||
}
|
||||
} else {
|
||||
while (Addr != (Finish_Addr<<3)) {
|
||||
if (page != (Addr >> 12)) {
|
||||
/*Reg140=0x780+(Addr>>12), Addr=0x30~0x3F, total 16 pages*/
|
||||
page = (Addr >> 12);
|
||||
}
|
||||
ODM_SetBBReg(pDM_Odm, 0x0140, bMaskLWord, 0x780+page);
|
||||
|
||||
/*pDataL = 0x8000+(Addr&0xfff);*/
|
||||
DataL = ODM_GetBBReg(pDM_Odm, 0x8000+(Addr&0xfff), bMaskDWord);
|
||||
DataH = ODM_GetBBReg(pDM_Odm, 0x8000+(Addr&0xfff)+4, bMaskDWord);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
||||
ADCSmpBuf->Octet[i] = DataH;
|
||||
ADCSmpBuf->Octet[i+1] = DataL;
|
||||
#endif
|
||||
DbgPrint("%08x%08x\n", DataH, DataL);
|
||||
i = i + 2;
|
||||
|
||||
if ((Addr+8) >= End_Addr)
|
||||
Addr = ADCSmpBuf->start_pos;
|
||||
else
|
||||
Addr = Addr + 8;
|
||||
|
||||
while_cnt = while_cnt + 1;
|
||||
if (while_cnt > ((ADCSmpBuf->buffer_size)>>3))
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
watchdog_resume(pDM_Odm->priv);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
VOID
|
||||
ADCSmp_Start(
|
||||
IN PVOID pDM_VOID,
|
||||
IN PRT_ADCSMP AdcSmp
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u1Byte tmpU1b;
|
||||
PRT_ADCSMP_STRING Buffer = &(AdcSmp->ADCSmpBuf);
|
||||
RT_ADCSMP_TRIG_SIG_SEL TrigSigSel = AdcSmp->ADCSmpTrigSigSel;
|
||||
u1Byte backup_DMA, while_cnt = 0;
|
||||
|
||||
DbgPrint("%s\n", __func__);
|
||||
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8197F)
|
||||
ODM_SetBBReg(pDM_Odm, 0x9a0, 0xf00, AdcSmp->ADCSmpDmaDataSigSel); /*0x9A0[11:8]*/
|
||||
else
|
||||
ODM_SetBBReg(pDM_Odm , ODM_ADC_TRIGGER_Jaguar2, 0xf00, AdcSmp->ADCSmpDmaDataSigSel); /*0x95C[11:8]*/
|
||||
|
||||
ODM_Write1Byte(pDM_Odm, 0x7c0+1, AdcSmp->ADCSmpTriggerTime);
|
||||
|
||||
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8197F)
|
||||
ODM_SetBBReg(pDM_Odm, 0xd00, BIT26, 0x1);
|
||||
else { /*for 8814A and 8822B?*/
|
||||
ODM_Write1Byte(pDM_Odm, 0x198c, 0x7);
|
||||
ODM_Write1Byte(pDM_Odm, 0x8b4, 0x80);
|
||||
}
|
||||
|
||||
if (AdcSmp->ADCSmpTrigSel == ADCSMP_MAC_TRIG) { /* trigger by MAC*/
|
||||
if (TrigSigSel == ADCSMP_TRIG_REG) { /* manual trigger 0x7C0[5] = 0 -> 1*/
|
||||
ODM_Write1Byte(pDM_Odm, 0x7c0, 0xCB); /*0x7C0[7:0]=8'b1100_1011*/
|
||||
ODM_Write1Byte(pDM_Odm, 0x7c0, 0xEB); /*0x7C0[7:0]=8'b1110_1011*/
|
||||
} else if (TrigSigSel == ADCSMP_TRIG_CCA)
|
||||
ODM_Write1Byte(pDM_Odm, 0x7c0, 0x8B); /*0x7C0[7:0]=8'b1000_1011*/
|
||||
else if (TrigSigSel == ADCSMP_TRIG_CRCFAIL)
|
||||
ODM_Write1Byte(pDM_Odm, 0x7c0, 0x4B); /*0x7C0[7:0]=8'b0100_1011*/
|
||||
else if (TrigSigSel == ADCSMP_TRIG_CRCOK)
|
||||
ODM_Write1Byte(pDM_Odm, 0x7c0, 0x0B); /*0x7C0[7:0]=8'b0000_1011*/
|
||||
} else { /*trigger by BB*/
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8197F)
|
||||
ODM_SetBBReg(pDM_Odm, 0x9a0, 0x1f, TrigSigSel); /*0x9A0[4:0]*/
|
||||
else
|
||||
ODM_SetBBReg(pDM_Odm , ODM_ADC_TRIGGER_Jaguar2, 0x1f, TrigSigSel); /*0x95C[4:0], 0x1F: trigger by CCA*/
|
||||
ODM_Write1Byte(pDM_Odm, 0x7c0, 0x03); /*0x7C0[7:0]=8'b0000_0011*/
|
||||
}
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
watchdog_stop(pDM_Odm->priv);
|
||||
#endif
|
||||
|
||||
/*Polling time always use 100ms, when it exceed 2s, break while loop*/
|
||||
do {
|
||||
tmpU1b = ODM_Read1Byte(pDM_Odm, 0x7c0);
|
||||
|
||||
if (AdcSmp->ADCSmpState != ADCSMP_STATE_SET) {
|
||||
DbgPrint("ADCSmpState != ADCSMP_STATE_SET\n");
|
||||
break;
|
||||
|
||||
} else if (tmpU1b & BIT1) {
|
||||
ODM_delay_ms(100);
|
||||
while_cnt = while_cnt + 1;
|
||||
continue;
|
||||
} else {
|
||||
DbgPrint("%s Query OK\n", __func__);
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8197F)
|
||||
ODM_SetBBReg(pDM_Odm, 0x7c0, BIT0, 0x0);
|
||||
break;
|
||||
}
|
||||
} while (while_cnt < 20);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
watchdog_resume(pDM_Odm->priv);
|
||||
#if (RTL8197F_SUPPORT == 1)
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8197F) {
|
||||
/*Stop DMA*/
|
||||
backup_DMA = ODM_GetMACReg(pDM_Odm, 0x300, bMaskLWord);
|
||||
ODM_SetMACReg(pDM_Odm, 0x300, 0x7fff, backup_DMA|0x7fff);
|
||||
|
||||
/*move LA mode content from IMEM to TxPktBuffer
|
||||
Src : OCPBASE_IMEM 0x00000000
|
||||
Dest : OCPBASE_TXBUF 0x18780000
|
||||
Len : 64K*/
|
||||
GET_HAL_INTERFACE(pDM_Odm->priv)->InitDDMAHandler(pDM_Odm->priv, OCPBASE_IMEM, OCPBASE_TXBUF, 0x10000);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
if (AdcSmp->ADCSmpState == ADCSMP_STATE_SET)
|
||||
ADCSmp_GetTxPktBuf(pDM_Odm, Buffer);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_AP)
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8197F)
|
||||
ODM_SetMACReg(pDM_Odm, 0x300, 0x7fff, backup_DMA); /*Resume DMA*/
|
||||
#endif
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
||||
if (AdcSmp->ADCSmpState == ADCSMP_STATE_SET)
|
||||
AdcSmp->ADCSmpState = ADCSMP_STATE_QUERY;
|
||||
#endif
|
||||
|
||||
DbgPrint("%s Status %d\n", __func__, AdcSmp->ADCSmpState);
|
||||
}
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
||||
VOID
|
||||
ADCSmpWorkItemCallback(
|
||||
IN PVOID pContext
|
||||
)
|
||||
{
|
||||
PADAPTER Adapter = (PADAPTER)pContext;
|
||||
PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter);
|
||||
PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
|
||||
PRT_ADCSMP AdcSmp = &(pDM_Odm->adcsmp);
|
||||
|
||||
ADCSmp_Start(pDM_Odm, AdcSmp);
|
||||
ADCSmp_Stop(pDM_Odm);
|
||||
}
|
||||
#endif
|
||||
|
||||
VOID
|
||||
ADCSmp_Set(
|
||||
IN PVOID pDM_VOID,
|
||||
IN RT_ADCSMP_TRIG_SEL TrigSel,
|
||||
IN RT_ADCSMP_TRIG_SIG_SEL TrigSigSel,
|
||||
IN u1Byte DmaDataSigSel,
|
||||
IN u1Byte TriggerTime,
|
||||
IN u2Byte PollingTime
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
BOOLEAN retValue = TRUE;
|
||||
PRT_ADCSMP AdcSmp = &(pDM_Odm->adcsmp);
|
||||
|
||||
AdcSmp->ADCSmpTrigSel = TrigSel;
|
||||
AdcSmp->ADCSmpTrigSigSel = TrigSigSel;
|
||||
AdcSmp->ADCSmpDmaDataSigSel = DmaDataSigSel;
|
||||
AdcSmp->ADCSmpTriggerTime = TriggerTime;
|
||||
AdcSmp->ADCSmpPollingTime = PollingTime;
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
||||
if (AdcSmp->ADCSmpState != ADCSMP_STATE_IDLE)
|
||||
retValue = FALSE;
|
||||
else if (AdcSmp->ADCSmpBuf.Length == 0)
|
||||
retValue = ADCSmp_BufferAllocate(pDM_Odm->Adapter, AdcSmp);
|
||||
#endif
|
||||
|
||||
if (retValue) {
|
||||
AdcSmp->ADCSmpState = ADCSMP_STATE_SET;
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
||||
ODM_ScheduleWorkItem(&(AdcSmp->ADCSmpWorkItem));
|
||||
#else
|
||||
ADCSmp_Start(pDM_Odm, AdcSmp);
|
||||
#endif
|
||||
}
|
||||
|
||||
DbgPrint("ADCSmpState %d Return Status %d\n", AdcSmp->ADCSmpState, retValue);
|
||||
}
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
||||
RT_STATUS
|
||||
ADCSmp_Query(
|
||||
IN PVOID pDM_VOID,
|
||||
IN ULONG InformationBufferLength,
|
||||
OUT PVOID InformationBuffer,
|
||||
OUT PULONG BytesWritten
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PRT_ADCSMP AdcSmp = &(pDM_Odm->adcsmp);
|
||||
RT_STATUS retStatus = RT_STATUS_SUCCESS;
|
||||
PRT_ADCSMP_STRING ADCSmpBuf = &(AdcSmp->ADCSmpBuf);
|
||||
|
||||
DbgPrint("%s ADCSmpState %d", __func__, AdcSmp->ADCSmpState);
|
||||
|
||||
if (InformationBufferLength != ADCSmpBuf->buffer_size) {
|
||||
*BytesWritten = 0;
|
||||
retStatus = RT_STATUS_RESOURCE;
|
||||
} else if (ADCSmpBuf->Length != ADCSmpBuf->buffer_size) {
|
||||
*BytesWritten = 0;
|
||||
retStatus = RT_STATUS_RESOURCE;
|
||||
} else if (AdcSmp->ADCSmpState != ADCSMP_STATE_QUERY) {
|
||||
*BytesWritten = 0;
|
||||
retStatus = RT_STATUS_PENDING;
|
||||
} else {
|
||||
ODM_MoveMemory(pDM_Odm, InformationBuffer, ADCSmpBuf->Octet, ADCSmpBuf->buffer_size);
|
||||
*BytesWritten = ADCSmpBuf->buffer_size;
|
||||
|
||||
AdcSmp->ADCSmpState = ADCSMP_STATE_IDLE;
|
||||
}
|
||||
|
||||
DbgPrint("Return Status %d\n", retStatus);
|
||||
|
||||
return retStatus;
|
||||
}
|
||||
#endif
|
||||
|
||||
VOID
|
||||
ADCSmp_Stop(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PRT_ADCSMP AdcSmp = &(pDM_Odm->adcsmp);
|
||||
|
||||
AdcSmp->ADCSmpState = ADCSMP_STATE_IDLE;
|
||||
|
||||
DbgPrint("%s status %d\n", __func__, AdcSmp->ADCSmpState);
|
||||
}
|
||||
|
||||
VOID
|
||||
ADCSmp_Init(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PRT_ADCSMP AdcSmp = &(pDM_Odm->adcsmp);
|
||||
PRT_ADCSMP_STRING ADCSmpBuf = &(AdcSmp->ADCSmpBuf);
|
||||
|
||||
AdcSmp->ADCSmpState = ADCSMP_STATE_IDLE;
|
||||
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8814A) {
|
||||
ADCSmpBuf->start_pos = 0x30000;
|
||||
ADCSmpBuf->buffer_size = 0x10000;
|
||||
} else if (pDM_Odm->SupportICType & ODM_RTL8822B) {
|
||||
ADCSmpBuf->start_pos = 0x20000;
|
||||
ADCSmpBuf->buffer_size = 0x20000;
|
||||
} else if (pDM_Odm->SupportICType & ODM_RTL8197F) {
|
||||
ADCSmpBuf->start_pos = 0x00000;
|
||||
ADCSmpBuf->buffer_size = 0x10000;
|
||||
} else if (pDM_Odm->SupportICType & ODM_RTL8821C) {
|
||||
ADCSmpBuf->start_pos = 0x8000;
|
||||
ADCSmpBuf->buffer_size = 0x8000;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
||||
VOID
|
||||
ADCSmp_DeInit(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PRT_ADCSMP AdcSmp = &(pDM_Odm->adcsmp);
|
||||
PRT_ADCSMP_STRING ADCSmpBuf = &(AdcSmp->ADCSmpBuf);
|
||||
|
||||
ADCSmp_Stop(pDM_Odm);
|
||||
|
||||
if (ADCSmpBuf->Length != 0x0) {
|
||||
ODM_FreeMemory(pDM_Odm, ADCSmpBuf->Octet, ADCSmpBuf->Length);
|
||||
ADCSmpBuf->Length = 0x0;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,91 @@
|
||||
#ifndef __INC_ADCSMP_H
|
||||
#define __INC_ADCSMP_H
|
||||
|
||||
typedef struct _RT_ADCSMP_STRING {
|
||||
pu4Byte Octet;
|
||||
u4Byte Length;
|
||||
u4Byte buffer_size;
|
||||
u4Byte start_pos;
|
||||
} RT_ADCSMP_STRING, *PRT_ADCSMP_STRING;
|
||||
|
||||
|
||||
typedef enum _RT_ADCSMP_TRIG_SEL {
|
||||
ADCSMP_BB_TRIG,
|
||||
ADCSMP_MAC_TRIG,
|
||||
} RT_ADCSMP_TRIG_SEL, *PRT_ADCSMP_TRIG_SEL;
|
||||
|
||||
|
||||
typedef enum _RT_ADCSMP_TRIG_SIG_SEL {
|
||||
ADCSMP_TRIG_CRCOK,
|
||||
ADCSMP_TRIG_CRCFAIL,
|
||||
ADCSMP_TRIG_CCA,
|
||||
ADCSMP_TRIG_REG,
|
||||
} RT_ADCSMP_TRIG_SIG_SEL, *PRT_ADCSMP_TRIG_SIG_SEL;
|
||||
|
||||
|
||||
typedef enum _RT_ADCSMP_STATE {
|
||||
ADCSMP_STATE_IDLE,
|
||||
ADCSMP_STATE_SET,
|
||||
ADCSMP_STATE_QUERY,
|
||||
} RT_ADCSMP_STATE, *PRT_ADCSMP_STATE;
|
||||
|
||||
|
||||
typedef struct _RT_ADCSMP {
|
||||
RT_ADCSMP_STRING ADCSmpBuf;
|
||||
RT_ADCSMP_STATE ADCSmpState;
|
||||
RT_ADCSMP_TRIG_SEL ADCSmpTrigSel;
|
||||
RT_ADCSMP_TRIG_SIG_SEL ADCSmpTrigSigSel;
|
||||
u1Byte ADCSmpDmaDataSigSel;
|
||||
u1Byte ADCSmpTriggerTime;
|
||||
u2Byte ADCSmpPollingTime;
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
RT_WORK_ITEM ADCSmpWorkItem;
|
||||
#endif
|
||||
} RT_ADCSMP, *PRT_ADCSMP;
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
||||
VOID
|
||||
ADCSmpWorkItemCallback(
|
||||
IN PVOID pContext
|
||||
);
|
||||
#endif
|
||||
|
||||
VOID
|
||||
ADCSmp_Set(
|
||||
IN PVOID pDM_VOID,
|
||||
IN RT_ADCSMP_TRIG_SEL TrigSel,
|
||||
IN RT_ADCSMP_TRIG_SIG_SEL TrigSigSel,
|
||||
IN u1Byte DmaDataSigSel,
|
||||
IN u1Byte TriggerTime,
|
||||
IN u2Byte PollingTime
|
||||
);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
||||
RT_STATUS
|
||||
ADCSmp_Query(
|
||||
IN PVOID pDM_VOID,
|
||||
IN ULONG InformationBufferLength,
|
||||
OUT PVOID InformationBuffer,
|
||||
OUT PULONG BytesWritten
|
||||
);
|
||||
#endif
|
||||
VOID
|
||||
ADCSmp_Stop(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
ADCSmp_Init(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
||||
VOID
|
||||
ADCSmp_DeInit(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,964 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
//============================================================
|
||||
// include files
|
||||
//============================================================
|
||||
|
||||
#include "mp_precomp.h"
|
||||
#include "phydm_precomp.h"
|
||||
|
||||
//#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE))
|
||||
#if(defined(CONFIG_ANT_DETECTION))
|
||||
|
||||
//IS_ANT_DETECT_SUPPORT_SINGLE_TONE(Adapter)
|
||||
//IS_ANT_DETECT_SUPPORT_RSSI(Adapter)
|
||||
//IS_ANT_DETECT_SUPPORT_PSD(Adapter)
|
||||
|
||||
//1 [1. Single Tone Method] ===================================================
|
||||
|
||||
//
|
||||
// Description:
|
||||
// Set Single/Dual Antenna default setting for products that do not do detection in advance.
|
||||
//
|
||||
// Added by Joseph, 2012.03.22
|
||||
//
|
||||
VOID
|
||||
ODM_SingleDualAntennaDefaultSetting(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
|
||||
PADAPTER pAdapter = pDM_Odm->Adapter;
|
||||
|
||||
u1Byte btAntNum=BT_GetPgAntNum(pAdapter);
|
||||
// Set default antenna A and B status
|
||||
if(btAntNum == 2)
|
||||
{
|
||||
pDM_SWAT_Table->ANTA_ON=TRUE;
|
||||
pDM_SWAT_Table->ANTB_ON=TRUE;
|
||||
|
||||
}
|
||||
else if(btAntNum == 1)
|
||||
{// Set antenna A as default
|
||||
pDM_SWAT_Table->ANTA_ON=TRUE;
|
||||
pDM_SWAT_Table->ANTB_ON=FALSE;
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
RT_ASSERT(FALSE, ("Incorrect antenna number!!\n"));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
//2 8723A ANT DETECT
|
||||
//
|
||||
// Description:
|
||||
// Implement IQK single tone for RF DPK loopback and BB PSD scanning.
|
||||
// This function is cooperated with BB team Neil.
|
||||
//
|
||||
// Added by Roger, 2011.12.15
|
||||
//
|
||||
BOOLEAN
|
||||
ODM_SingleDualAntennaDetection(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte mode
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PADAPTER pAdapter = pDM_Odm->Adapter;
|
||||
pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
|
||||
u4Byte CurrentChannel,RfLoopReg;
|
||||
u1Byte n;
|
||||
u4Byte Reg88c, Regc08, Reg874, Regc50, Reg948, Regb2c, Reg92c, Reg930, Reg064, AFE_rRx_Wait_CCA;
|
||||
u1Byte initial_gain = 0x5a;
|
||||
u4Byte PSD_report_tmp;
|
||||
u4Byte AntA_report = 0x0, AntB_report = 0x0, AntO_report = 0x0;
|
||||
BOOLEAN bResult = TRUE;
|
||||
u4Byte AFE_Backup[16];
|
||||
u4Byte AFE_REG_8723A[16] = {
|
||||
rRx_Wait_CCA, rTx_CCK_RFON,
|
||||
rTx_CCK_BBON, rTx_OFDM_RFON,
|
||||
rTx_OFDM_BBON, rTx_To_Rx,
|
||||
rTx_To_Tx, rRx_CCK,
|
||||
rRx_OFDM, rRx_Wait_RIFS,
|
||||
rRx_TO_Rx, rStandby,
|
||||
rSleep, rPMPD_ANAEN,
|
||||
rFPGA0_XCD_SwitchControl, rBlue_Tooth};
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection()============>\n"));
|
||||
|
||||
|
||||
if (!(pDM_Odm->SupportICType & ODM_RTL8723B))
|
||||
return bResult;
|
||||
|
||||
// Retrieve antenna detection registry info, added by Roger, 2012.11.27.
|
||||
if(!IS_ANT_DETECT_SUPPORT_SINGLE_TONE(pAdapter))
|
||||
return bResult;
|
||||
|
||||
//1 Backup Current RF/BB Settings
|
||||
|
||||
CurrentChannel = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask);
|
||||
RfLoopReg = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask);
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8723B) {
|
||||
Reg92c = ODM_GetBBReg(pDM_Odm, rDPDT_control, bMaskDWord);
|
||||
Reg930 = ODM_GetBBReg(pDM_Odm, rfe_ctrl_anta_src, bMaskDWord);
|
||||
Reg948 = ODM_GetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord);
|
||||
Regb2c = ODM_GetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord);
|
||||
Reg064 = ODM_GetMACReg(pDM_Odm, rSYM_WLBT_PAPE_SEL, BIT29);
|
||||
ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x1);
|
||||
ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, 0xff, 0x77);
|
||||
ODM_SetMACReg(pDM_Odm, rSYM_WLBT_PAPE_SEL, BIT29, 0x1); //dbg 7
|
||||
ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0x3c0, 0x0);//dbg 8
|
||||
ODM_SetBBReg(pDM_Odm, rAGC_table_select, BIT31, 0x0);
|
||||
}
|
||||
|
||||
ODM_StallExecution(10);
|
||||
|
||||
//Store A Path Register 88c, c08, 874, c50
|
||||
Reg88c = ODM_GetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord);
|
||||
Regc08 = ODM_GetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord);
|
||||
Reg874 = ODM_GetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord);
|
||||
Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord);
|
||||
|
||||
// Store AFE Registers
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8723B)
|
||||
AFE_rRx_Wait_CCA = ODM_GetBBReg(pDM_Odm, rRx_Wait_CCA,bMaskDWord);
|
||||
|
||||
//Set PSD 128 pts
|
||||
ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0); //128 pts
|
||||
|
||||
// To SET CH1 to do
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask, 0x7401); //Channel 1
|
||||
|
||||
// AFE all on step
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8723B)
|
||||
ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, 0x01c00016);
|
||||
|
||||
// 3 wire Disable
|
||||
ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, 0xCCF000C0);
|
||||
|
||||
//BB IQK Setting
|
||||
ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, 0x000800E4);
|
||||
ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, 0x22208000);
|
||||
|
||||
//IQK setting tone@ 4.34Mhz
|
||||
ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x10008C1C);
|
||||
ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00);
|
||||
|
||||
//Page B init
|
||||
ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x00080000);
|
||||
ODM_SetBBReg(pDM_Odm, rConfig_AntA, bMaskDWord, 0x0f600000);
|
||||
ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800);
|
||||
ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x10008c1f);
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8723B) {
|
||||
ODM_SetBBReg(pDM_Odm, rTx_IQK_PI_A, bMaskDWord, 0x82150016);
|
||||
ODM_SetBBReg(pDM_Odm, rRx_IQK_PI_A, bMaskDWord, 0x28150016);
|
||||
}
|
||||
ODM_SetBBReg(pDM_Odm, rIQK_AGC_Rsp, bMaskDWord, 0x001028d0);
|
||||
ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7f, initial_gain);
|
||||
|
||||
//IQK Single tone start
|
||||
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x808000);
|
||||
ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf9000000);
|
||||
ODM_SetBBReg(pDM_Odm, rIQK_AGC_Pts, bMaskDWord, 0xf8000000);
|
||||
|
||||
ODM_StallExecution(10000);
|
||||
|
||||
// PSD report of antenna A
|
||||
PSD_report_tmp=0x0;
|
||||
for (n=0;n<2;n++)
|
||||
{
|
||||
PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain);
|
||||
if(PSD_report_tmp >AntA_report)
|
||||
AntA_report=PSD_report_tmp;
|
||||
}
|
||||
|
||||
// change to Antenna B
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8723B) {
|
||||
//ODM_SetBBReg(pDM_Odm, rDPDT_control, 0x3, 0x2);
|
||||
ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0xfff, 0x280);
|
||||
ODM_SetBBReg(pDM_Odm, rAGC_table_select, BIT31, 0x1);
|
||||
}
|
||||
|
||||
ODM_StallExecution(10);
|
||||
|
||||
// PSD report of antenna B
|
||||
PSD_report_tmp=0x0;
|
||||
for (n=0;n<2;n++)
|
||||
{
|
||||
PSD_report_tmp = GetPSDData(pDM_Odm, 14, initial_gain);
|
||||
if(PSD_report_tmp > AntB_report)
|
||||
AntB_report=PSD_report_tmp;
|
||||
}
|
||||
|
||||
//Close IQK Single Tone function
|
||||
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000);
|
||||
|
||||
//1 Return to antanna A
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8723B) {
|
||||
// external DPDT
|
||||
ODM_SetBBReg(pDM_Odm, rDPDT_control, bMaskDWord, Reg92c);
|
||||
|
||||
//internal S0/S1
|
||||
ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord, Reg948);
|
||||
ODM_SetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord, Regb2c);
|
||||
ODM_SetBBReg(pDM_Odm, rfe_ctrl_anta_src, bMaskDWord, Reg930);
|
||||
ODM_SetMACReg(pDM_Odm, rSYM_WLBT_PAPE_SEL, BIT29, Reg064);
|
||||
}
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, bMaskDWord, Reg88c);
|
||||
ODM_SetBBReg(pDM_Odm, rOFDM0_TRMuxPar, bMaskDWord, Regc08);
|
||||
ODM_SetBBReg(pDM_Odm, rFPGA0_XCD_RFInterfaceSW, bMaskDWord, Reg874);
|
||||
ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, 0x7F, 0x40);
|
||||
ODM_SetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord, Regc50);
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,CurrentChannel);
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask,RfLoopReg);
|
||||
|
||||
//Reload AFE Registers
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8723B)
|
||||
ODM_SetBBReg(pDM_Odm, rRx_Wait_CCA, bMaskDWord, AFE_rRx_Wait_CCA);
|
||||
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8723B) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_A[%d]= %d\n", 2416, AntA_report));
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("psd_report_B[%d]= %d\n", 2416, AntB_report));
|
||||
|
||||
//2 Test Ant B based on Ant A is ON
|
||||
if((AntA_report >= 100) && (AntB_report >= 100) && (AntA_report <= 135) && (AntB_report <= 135))
|
||||
{
|
||||
u1Byte TH1=2, TH2=6;
|
||||
|
||||
if((AntA_report - AntB_report < TH1) || (AntB_report - AntA_report < TH1))
|
||||
{
|
||||
pDM_SWAT_Table->ANTA_ON=TRUE;
|
||||
pDM_SWAT_Table->ANTB_ON=TRUE;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Dual Antenna\n"));
|
||||
}
|
||||
else if(((AntA_report - AntB_report >= TH1) && (AntA_report - AntB_report <= TH2)) ||
|
||||
((AntB_report - AntA_report >= TH1) && (AntB_report - AntA_report <= TH2)))
|
||||
{
|
||||
pDM_SWAT_Table->ANTA_ON=FALSE;
|
||||
pDM_SWAT_Table->ANTB_ON=FALSE;
|
||||
bResult = FALSE;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection(): Need to check again\n"));
|
||||
}
|
||||
else
|
||||
{
|
||||
pDM_SWAT_Table->ANTA_ON = TRUE;
|
||||
pDM_SWAT_Table->ANTB_ON=FALSE;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SingleDualAntennaDetection(): Single Antenna\n"));
|
||||
}
|
||||
pDM_Odm->AntDetectedInfo.bAntDetected= TRUE;
|
||||
pDM_Odm->AntDetectedInfo.dBForAntA = AntA_report;
|
||||
pDM_Odm->AntDetectedInfo.dBForAntB = AntB_report;
|
||||
pDM_Odm->AntDetectedInfo.dBForAntO = AntO_report;
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("return FALSE!!\n"));
|
||||
bResult = FALSE;
|
||||
}
|
||||
}
|
||||
return bResult;
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
//1 [2. Scan AP RSSI Method] ==================================================
|
||||
|
||||
|
||||
|
||||
|
||||
BOOLEAN
|
||||
ODM_SwAntDivCheckBeforeLink(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
|
||||
#if (RT_MEM_SIZE_LEVEL != RT_MEM_SIZE_MINIMUM)
|
||||
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PADAPTER Adapter = pDM_Odm->Adapter;
|
||||
HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter);
|
||||
PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
|
||||
pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
|
||||
pFAT_T pDM_FatTable = &pDM_Odm->DM_FatTable;
|
||||
s1Byte Score = 0;
|
||||
PRT_WLAN_BSS pTmpBssDesc, pTestBssDesc;
|
||||
u1Byte power_target_L = 9, power_target_H = 16;
|
||||
u1Byte tmp_power_diff = 0,power_diff = 0,avg_power_diff = 0,max_power_diff = 0,min_power_diff = 0xff;
|
||||
u2Byte index, counter = 0;
|
||||
static u1Byte ScanChannel;
|
||||
u4Byte tmp_SWAS_NoLink_BK_Reg948;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ANTA_ON = (( %d )) , ANTB_ON = (( %d ))\n", pDM_Odm->DM_SWAT_Table.ANTA_ON, pDM_Odm->DM_SWAT_Table.ANTB_ON));
|
||||
|
||||
//if(HP id)
|
||||
{
|
||||
if(pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult==TRUE && pDM_Odm->SupportICType == ODM_RTL8723B)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("8723B RSSI-based Antenna Detection is done\n"));
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
if(pDM_Odm->SupportICType == ODM_RTL8723B)
|
||||
{
|
||||
if(pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 == 0xff)
|
||||
pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 = ODM_Read4Byte(pDM_Odm, rS0S1_PathSwitch );
|
||||
}
|
||||
}
|
||||
|
||||
if (pDM_Odm->Adapter == NULL) //For BSOD when plug/unplug fast. //By YJ,120413
|
||||
{ // The ODM structure is not initialized.
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
// Retrieve antenna detection registry info, added by Roger, 2012.11.27.
|
||||
if(!IS_ANT_DETECT_SUPPORT_RSSI(Adapter))
|
||||
{
|
||||
return FALSE;
|
||||
}
|
||||
else
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Antenna Detection: RSSI Method\n"));
|
||||
}
|
||||
|
||||
// Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF.
|
||||
PlatformAcquireSpinLock(Adapter, RT_RF_STATE_SPINLOCK);
|
||||
if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect)
|
||||
{
|
||||
PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK);
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
|
||||
("ODM_SwAntDivCheckBeforeLink(): RFChangeInProgress(%x), eRFPowerState(%x)\n",
|
||||
pMgntInfo->RFChangeInProgress, pHalData->eRFPowerState));
|
||||
|
||||
pDM_SWAT_Table->SWAS_NoLink_State = 0;
|
||||
|
||||
return FALSE;
|
||||
}
|
||||
else
|
||||
{
|
||||
PlatformReleaseSpinLock(Adapter, RT_RF_STATE_SPINLOCK);
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("pDM_SWAT_Table->SWAS_NoLink_State = %d\n", pDM_SWAT_Table->SWAS_NoLink_State));
|
||||
//1 Run AntDiv mechanism "Before Link" part.
|
||||
if(pDM_SWAT_Table->SWAS_NoLink_State == 0)
|
||||
{
|
||||
//1 Prepare to do Scan again to check current antenna state.
|
||||
|
||||
// Set check state to next step.
|
||||
pDM_SWAT_Table->SWAS_NoLink_State = 1;
|
||||
|
||||
// Copy Current Scan list.
|
||||
pMgntInfo->tmpNumBssDesc = pMgntInfo->NumBssDesc;
|
||||
PlatformMoveMemory((PVOID)Adapter->MgntInfo.tmpbssDesc, (PVOID)pMgntInfo->bssDesc, sizeof(RT_WLAN_BSS)*MAX_BSS_DESC);
|
||||
|
||||
// Go back to scan function again.
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Scan one more time\n"));
|
||||
pMgntInfo->ScanStep=0;
|
||||
pMgntInfo->bScanAntDetect = TRUE;
|
||||
ScanChannel = odm_SwAntDivSelectScanChnl(Adapter);
|
||||
|
||||
|
||||
if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8821))
|
||||
{
|
||||
if(pDM_FatTable->RxIdleAnt == MAIN_ANT)
|
||||
ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT);
|
||||
else
|
||||
ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT);
|
||||
if(ScanChannel == 0)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
|
||||
("ODM_SwAntDivCheckBeforeLink(): No AP List Avaiable, Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT"));
|
||||
|
||||
if(IS_5G_WIRELESS_MODE(pMgntInfo->dot11CurrentWirelessMode))
|
||||
{
|
||||
pDM_SWAT_Table->Ant5G = pDM_FatTable->RxIdleAnt;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant5G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT"));
|
||||
}
|
||||
else
|
||||
{
|
||||
pDM_SWAT_Table->Ant2G = pDM_FatTable->RxIdleAnt;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant2G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT"));
|
||||
}
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
|
||||
("ODM_SwAntDivCheckBeforeLink: Change to %s for testing.\n", ((pDM_FatTable->RxIdleAnt == MAIN_ANT)?"MAIN_ANT":"AUX_ANT")));
|
||||
} else if (pDM_Odm->SupportICType & (ODM_RTL8723B)) {
|
||||
/*Switch Antenna to another one.*/
|
||||
|
||||
tmp_SWAS_NoLink_BK_Reg948 = ODM_Read4Byte(pDM_Odm, rS0S1_PathSwitch);
|
||||
|
||||
if ((pDM_SWAT_Table->CurAntenna == MAIN_ANT) && (tmp_SWAS_NoLink_BK_Reg948 == 0x200)) {
|
||||
ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0xfff, 0x280);
|
||||
ODM_SetBBReg(pDM_Odm, rAGC_table_select, BIT31, 0x1);
|
||||
pDM_SWAT_Table->CurAntenna = AUX_ANT;
|
||||
} else {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Reg[948]= (( %x )) was in wrong state\n", tmp_SWAS_NoLink_BK_Reg948));
|
||||
return FALSE;
|
||||
}
|
||||
ODM_StallExecution(10);
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Change to (( %s-ant)) for testing.\n", (pDM_SWAT_Table->CurAntenna == MAIN_ANT)?"MAIN":"AUX"));
|
||||
}
|
||||
|
||||
odm_SwAntDivConstructScanChnl(Adapter, ScanChannel);
|
||||
PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5);
|
||||
|
||||
return TRUE;
|
||||
}
|
||||
else //pDM_SWAT_Table->SWAS_NoLink_State == 1
|
||||
{
|
||||
//1 ScanComple() is called after antenna swiched.
|
||||
//1 Check scan result and determine which antenna is going
|
||||
//1 to be used.
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,(" tmpNumBssDesc= (( %d )) \n",pMgntInfo->tmpNumBssDesc));// debug for Dino
|
||||
|
||||
for(index = 0; index < pMgntInfo->tmpNumBssDesc; index++)
|
||||
{
|
||||
pTmpBssDesc = &(pMgntInfo->tmpbssDesc[index]); // Antenna 1
|
||||
pTestBssDesc = &(pMgntInfo->bssDesc[index]); // Antenna 2
|
||||
|
||||
if(PlatformCompareMemory(pTestBssDesc->bdBssIdBuf, pTmpBssDesc->bdBssIdBuf, 6)!=0)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): ERROR!! This shall not happen.\n"));
|
||||
continue;
|
||||
}
|
||||
|
||||
if(pDM_Odm->SupportICType != ODM_RTL8723B)
|
||||
{
|
||||
if(pTmpBssDesc->ChannelNumber == ScanChannel)
|
||||
{
|
||||
if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Compare scan entry: Score++\n"));
|
||||
RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen);
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower));
|
||||
|
||||
Score++;
|
||||
PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS));
|
||||
}
|
||||
else if(pTmpBssDesc->RecvSignalPower < pTestBssDesc->RecvSignalPower)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink: Compare scan entry: Score--\n"));
|
||||
RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen);
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower));
|
||||
Score--;
|
||||
}
|
||||
else
|
||||
{
|
||||
if(pTestBssDesc->bdTstamp - pTmpBssDesc->bdTstamp < 5000)
|
||||
{
|
||||
RT_PRINT_STR(COMP_SCAN, DBG_WARNING, "GetScanInfo(): new Bss SSID:", pTmpBssDesc->bdSsIdBuf, pTmpBssDesc->bdSsIdLen);
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("at ch %d, Original: %d, Test: %d\n", pTmpBssDesc->ChannelNumber, pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("The 2nd Antenna didn't get this AP\n\n"));
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
else // 8723B
|
||||
{
|
||||
if(pTmpBssDesc->ChannelNumber == ScanChannel)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ChannelNumber == ScanChannel -> (( %d )) \n", pTmpBssDesc->ChannelNumber ));
|
||||
|
||||
if(pTmpBssDesc->RecvSignalPower > pTestBssDesc->RecvSignalPower) // Pow(Ant1) > Pow(Ant2)
|
||||
{
|
||||
counter++;
|
||||
tmp_power_diff=(u1Byte)(pTmpBssDesc->RecvSignalPower - pTestBssDesc->RecvSignalPower);
|
||||
power_diff = power_diff + tmp_power_diff;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower));
|
||||
ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf);
|
||||
ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf);
|
||||
|
||||
//ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("tmp_power_diff: (( %d)),max_power_diff: (( %d)),min_power_diff: (( %d)) \n", tmp_power_diff,max_power_diff,min_power_diff));
|
||||
if(tmp_power_diff > max_power_diff)
|
||||
max_power_diff=tmp_power_diff;
|
||||
if(tmp_power_diff < min_power_diff)
|
||||
min_power_diff=tmp_power_diff;
|
||||
//ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("max_power_diff: (( %d)),min_power_diff: (( %d)) \n",max_power_diff,min_power_diff));
|
||||
|
||||
PlatformMoveMemory(pTestBssDesc, pTmpBssDesc, sizeof(RT_WLAN_BSS));
|
||||
}
|
||||
else if(pTestBssDesc->RecvSignalPower > pTmpBssDesc->RecvSignalPower) // Pow(Ant1) < Pow(Ant2)
|
||||
{
|
||||
counter++;
|
||||
tmp_power_diff=(u1Byte)(pTestBssDesc->RecvSignalPower - pTmpBssDesc->RecvSignalPower);
|
||||
power_diff = power_diff + tmp_power_diff;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower));
|
||||
ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf);
|
||||
ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf);
|
||||
if(tmp_power_diff > max_power_diff)
|
||||
max_power_diff=tmp_power_diff;
|
||||
if(tmp_power_diff < min_power_diff)
|
||||
min_power_diff=tmp_power_diff;
|
||||
}
|
||||
else // Pow(Ant1) = Pow(Ant2)
|
||||
{
|
||||
if(pTestBssDesc->bdTstamp > pTmpBssDesc->bdTstamp) // Stamp(Ant1) < Stamp(Ant2)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("time_diff: %lld\n", (pTestBssDesc->bdTstamp-pTmpBssDesc->bdTstamp)/1000));
|
||||
if(pTestBssDesc->bdTstamp - pTmpBssDesc->bdTstamp > 5000)
|
||||
{
|
||||
counter++;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Original: %d, Test: %d\n", pTmpBssDesc->RecvSignalPower, pTestBssDesc->RecvSignalPower));
|
||||
ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("SSID:"), pTmpBssDesc->bdSsIdBuf);
|
||||
ODM_PRINT_ADDR(pDM_Odm,ODM_COMP_ANT_DIV, DBG_LOUD, ("BSSID:"), pTmpBssDesc->bdBssIdBuf);
|
||||
min_power_diff = 0;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Error !!!]: Time_diff: %lld\n", (pTestBssDesc->bdTstamp-pTmpBssDesc->bdTstamp)/1000));
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if(pDM_Odm->SupportICType & (ODM_RTL8188E|ODM_RTL8821))
|
||||
{
|
||||
if(pMgntInfo->NumBssDesc!=0 && Score<0)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
|
||||
("ODM_SwAntDivCheckBeforeLink(): Using Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT"));
|
||||
}
|
||||
else
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,
|
||||
("ODM_SwAntDivCheckBeforeLink(): Remain Ant(%s)\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"AUX_ANT":"MAIN_ANT"));
|
||||
|
||||
if(pDM_FatTable->RxIdleAnt == MAIN_ANT)
|
||||
ODM_UpdateRxIdleAnt(pDM_Odm, AUX_ANT);
|
||||
else
|
||||
ODM_UpdateRxIdleAnt(pDM_Odm, MAIN_ANT);
|
||||
}
|
||||
|
||||
if(IS_5G_WIRELESS_MODE(pMgntInfo->dot11CurrentWirelessMode))
|
||||
{
|
||||
pDM_SWAT_Table->Ant5G = pDM_FatTable->RxIdleAnt;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant5G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT"));
|
||||
}
|
||||
else
|
||||
{
|
||||
pDM_SWAT_Table->Ant2G = pDM_FatTable->RxIdleAnt;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("pDM_SWAT_Table->Ant2G=%s\n", (pDM_FatTable->RxIdleAnt==MAIN_ANT)?"MAIN_ANT":"AUX_ANT"));
|
||||
}
|
||||
}
|
||||
else if(pDM_Odm->SupportICType == ODM_RTL8723B)
|
||||
{
|
||||
if(counter == 0)
|
||||
{
|
||||
if(pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec == FALSE)
|
||||
{
|
||||
pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec = TRUE;
|
||||
pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=FALSE;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Counter=(( 0 )) , [[ Cannot find any AP with Aux-ant ]] -> Scan Target-channel again \n"));
|
||||
|
||||
//3 [ Scan again ]
|
||||
odm_SwAntDivConstructScanChnl(Adapter, ScanChannel);
|
||||
PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5);
|
||||
return TRUE;
|
||||
}
|
||||
else// Pre_Aux_FailDetec == TRUE
|
||||
{
|
||||
//2 [ Single Antenna ]
|
||||
pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec = FALSE;
|
||||
pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Counter=(( 0 )) , [[ Still cannot find any AP ]] \n"));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n"));
|
||||
}
|
||||
pDM_Odm->DM_SWAT_Table.Aux_FailDetec_Counter++;
|
||||
}
|
||||
else
|
||||
{
|
||||
pDM_Odm->DM_SWAT_Table.Pre_Aux_FailDetec = FALSE;
|
||||
|
||||
if(counter==3)
|
||||
{
|
||||
avg_power_diff = ((power_diff-max_power_diff - min_power_diff)>>1)+ ((max_power_diff + min_power_diff)>>2);
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("counter: (( %d )) , power_diff: (( %d )) \n", counter, power_diff));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ counter==3 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) , min_power_diff: (( %d )) \n", avg_power_diff,max_power_diff, min_power_diff));
|
||||
}
|
||||
else if(counter>=4)
|
||||
{
|
||||
avg_power_diff=(power_diff-max_power_diff - min_power_diff) / (counter - 2);
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("counter: (( %d )) , power_diff: (( %d )) \n", counter, power_diff));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ counter>=4 ] Modified avg_power_diff: (( %d )) , max_power_diff: (( %d )) , min_power_diff: (( %d )) \n", avg_power_diff,max_power_diff, min_power_diff));
|
||||
|
||||
}
|
||||
else//counter==1,2
|
||||
{
|
||||
avg_power_diff=power_diff/counter;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("avg_power_diff: (( %d )) , counter: (( %d )) , power_diff: (( %d )) \n", avg_power_diff,counter, power_diff));
|
||||
}
|
||||
|
||||
//2 [ Retry ]
|
||||
if( (avg_power_diff >=power_target_L) && (avg_power_diff <=power_target_H) )
|
||||
{
|
||||
pDM_Odm->DM_SWAT_Table.Retry_Counter++;
|
||||
|
||||
if(pDM_Odm->DM_SWAT_Table.Retry_Counter<=3)
|
||||
{
|
||||
pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=FALSE;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[[ Low confidence result ]] avg_power_diff= (( %d )) -> Scan Target-channel again ]] \n", avg_power_diff));
|
||||
|
||||
//3 [ Scan again ]
|
||||
odm_SwAntDivConstructScanChnl(Adapter, ScanChannel);
|
||||
PlatformSetTimer(Adapter, &pMgntInfo->ScanTimer, 5);
|
||||
return TRUE;
|
||||
}
|
||||
else
|
||||
{
|
||||
pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[[ Still Low confidence result ]] (( Retry_Counter > 3 )) \n"));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n"));
|
||||
}
|
||||
|
||||
}
|
||||
//2 [ Dual Antenna ]
|
||||
else if( (pMgntInfo->NumBssDesc != 0) && (avg_power_diff < power_target_L) )
|
||||
{
|
||||
pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE;
|
||||
if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE)
|
||||
{
|
||||
pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE;
|
||||
pDM_Odm->DM_SWAT_Table.ANTB_ON = TRUE;
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SwAntDivCheckBeforeLink(): Dual antenna\n"));
|
||||
pDM_Odm->DM_SWAT_Table.Dual_Ant_Counter++;
|
||||
|
||||
// set bt coexDM from 1ant coexDM to 2ant coexDM
|
||||
BT_SetBtCoexAntNum(Adapter, BT_COEX_ANT_TYPE_DETECTED, 2);
|
||||
|
||||
//3 [ Init antenna diversity ]
|
||||
pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV;
|
||||
ODM_AntDivInit(pDM_Odm);
|
||||
}
|
||||
//2 [ Single Antenna ]
|
||||
else if(avg_power_diff > power_target_H)
|
||||
{
|
||||
pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult=TRUE;
|
||||
if(pDM_Odm->DM_SWAT_Table.ANTB_ON == TRUE)
|
||||
{
|
||||
pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE;
|
||||
pDM_Odm->DM_SWAT_Table.ANTB_ON = FALSE;
|
||||
//BT_SetBtCoexAntNum(Adapter, BT_COEX_ANT_TYPE_DETECTED, 1);
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n"));
|
||||
pDM_Odm->DM_SWAT_Table.Single_Ant_Counter++;
|
||||
}
|
||||
}
|
||||
//ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("bResult=(( %d ))\n",pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("Dual_Ant_Counter = (( %d )), Single_Ant_Counter = (( %d )) , Retry_Counter = (( %d )) , Aux_FailDetec_Counter = (( %d ))\n\n\n",
|
||||
pDM_Odm->DM_SWAT_Table.Dual_Ant_Counter,pDM_Odm->DM_SWAT_Table.Single_Ant_Counter,pDM_Odm->DM_SWAT_Table.Retry_Counter,pDM_Odm->DM_SWAT_Table.Aux_FailDetec_Counter));
|
||||
|
||||
//2 recover the antenna setting
|
||||
|
||||
if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE)
|
||||
ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, 0xfff, (pDM_SWAT_Table->SWAS_NoLink_BK_Reg948));
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("bResult=(( %d )), Recover Reg[948]= (( %x )) \n\n",pDM_Odm->DM_SWAT_Table.RSSI_AntDect_bResult, pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 ));
|
||||
|
||||
|
||||
}
|
||||
|
||||
// Check state reset to default and wait for next time.
|
||||
pDM_SWAT_Table->SWAS_NoLink_State = 0;
|
||||
pMgntInfo->bScanAntDetect = FALSE;
|
||||
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
#else
|
||||
return FALSE;
|
||||
#endif
|
||||
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
//1 [3. PSD Method] ==========================================================
|
||||
|
||||
|
||||
|
||||
|
||||
u4Byte
|
||||
odm_GetPSDData(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u2Byte point,
|
||||
IN u1Byte initial_gain)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u4Byte psd_report;
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point);
|
||||
ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1); //Start PSD calculation, Reg808[22]=0->1
|
||||
ODM_StallExecution(150);//Wait for HW PSD report
|
||||
ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0);//Stop PSD calculation, Reg808[22]=1->0
|
||||
psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF;//Read PSD report, Reg8B4[15:0]
|
||||
|
||||
psd_report = (u4Byte) (odm_ConvertTo_dB(psd_report));//+(u4Byte)(initial_gain);
|
||||
return psd_report;
|
||||
}
|
||||
|
||||
|
||||
|
||||
VOID
|
||||
ODM_SingleDualAntennaDetection_PSD(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u4Byte Channel_ori;
|
||||
u1Byte initial_gain = 0x36;
|
||||
u1Byte tone_idx;
|
||||
u1Byte Tone_lenth_1=7, Tone_lenth_2=4;
|
||||
u2Byte Tone_idx_1[7]={88, 104, 120, 8, 24, 40, 56};
|
||||
u2Byte Tone_idx_2[4]={8, 24, 40, 56};
|
||||
u4Byte PSD_report_Main[11]={0}, PSD_report_Aux[11]={0};
|
||||
//u1Byte Tone_lenth_1=4, Tone_lenth_2=2;
|
||||
//u2Byte Tone_idx_1[4]={88, 120, 24, 56};
|
||||
//u2Byte Tone_idx_2[2]={ 24, 56};
|
||||
//u4Byte PSD_report_Main[6]={0}, PSD_report_Aux[6]={0};
|
||||
|
||||
u4Byte PSD_report_temp,MAX_PSD_report_Main=0,MAX_PSD_report_Aux=0;
|
||||
u4Byte PSD_power_threshold;
|
||||
u4Byte Main_psd_result=0, Aux_psd_result=0;
|
||||
u4Byte Regc50, Reg948, Regb2c,Regc14,Reg908;
|
||||
u4Byte i=0,test_num=8;
|
||||
|
||||
|
||||
if(pDM_Odm->SupportICType != ODM_RTL8723B)
|
||||
return;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SingleDualAntennaDetection_PSD()============> \n"));
|
||||
|
||||
//2 [ Backup Current RF/BB Settings ]
|
||||
|
||||
Channel_ori = ODM_GetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, bRFRegOffsetMask);
|
||||
Reg948 = ODM_GetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord);
|
||||
Regb2c = ODM_GetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord);
|
||||
Regc50 = ODM_GetBBReg(pDM_Odm, rOFDM0_XAAGCCore1, bMaskDWord);
|
||||
Regc14 = ODM_GetBBReg(pDM_Odm, 0xc14, bMaskDWord);
|
||||
Reg908 = ODM_GetBBReg(pDM_Odm, 0x908, bMaskDWord);
|
||||
|
||||
//2 [ Setting for doing PSD function (CH4)]
|
||||
ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 0); //disable whole CCK block
|
||||
ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0xFF); // Turn off TX -> Pause TX Queue
|
||||
ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, 0x0); // [ Set IQK Matrix = 0 ] equivalent to [ Turn off CCA]
|
||||
|
||||
// PHYTXON while loop
|
||||
ODM_SetBBReg(pDM_Odm, 0x908, bMaskDWord, 0x803);
|
||||
while (ODM_GetBBReg(pDM_Odm, 0xdf4, BIT6))
|
||||
{
|
||||
i++;
|
||||
if (i > 1000000)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Wait in %s() more than %d times!\n", __FUNCTION__, i));
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, 0xc50, 0x7f, initial_gain);
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); // Set RF to CH4 & 40M
|
||||
ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0xf); // 3 wire Disable 88c[23:20]=0xf
|
||||
ODM_SetBBReg(pDM_Odm, rFPGA0_PSDFunction, BIT14|BIT15, 0x0); //128 pt //Set PSD 128 ptss
|
||||
ODM_StallExecution(3000);
|
||||
|
||||
|
||||
//2 [ Doing PSD Function in (CH4)]
|
||||
|
||||
//Antenna A
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Main-ant (CH4)\n"));
|
||||
ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x200);
|
||||
ODM_StallExecution(10);
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("dbg\n"));
|
||||
for (i=0;i<test_num;i++)
|
||||
{
|
||||
for (tone_idx=0;tone_idx<Tone_lenth_1;tone_idx++)
|
||||
{
|
||||
PSD_report_temp = odm_GetPSDData(pDM_Odm, Tone_idx_1[tone_idx], initial_gain);
|
||||
//if( PSD_report_temp>PSD_report_Main[tone_idx] )
|
||||
PSD_report_Main[tone_idx]+=PSD_report_temp;
|
||||
}
|
||||
}
|
||||
//Antenna B
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Aux-ant (CH4)\n"));
|
||||
ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x280);
|
||||
ODM_StallExecution(10);
|
||||
for (i=0;i<test_num;i++)
|
||||
{
|
||||
for (tone_idx=0;tone_idx<Tone_lenth_1;tone_idx++)
|
||||
{
|
||||
PSD_report_temp = odm_GetPSDData(pDM_Odm, Tone_idx_1[tone_idx], initial_gain);
|
||||
//if( PSD_report_temp>PSD_report_Aux[tone_idx] )
|
||||
PSD_report_Aux[tone_idx]+=PSD_report_temp;
|
||||
}
|
||||
}
|
||||
//2 [ Doing PSD Function in (CH8)]
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0x0); // 3 wire enable 88c[23:20]=0x0
|
||||
ODM_StallExecution(3000);
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, 0xc50, 0x7f, initial_gain);
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, ODM_CHANNEL, 0x7ff, 0x04); // Set RF to CH8 & 40M
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0xf); // 3 wire Disable 88c[23:20]=0xf
|
||||
ODM_StallExecution(3000);
|
||||
|
||||
//Antenna A
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Main-ant (CH8)\n"));
|
||||
ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x200);
|
||||
ODM_StallExecution(10);
|
||||
|
||||
for (i=0;i<test_num;i++)
|
||||
{
|
||||
for (tone_idx=0;tone_idx<Tone_lenth_2;tone_idx++)
|
||||
{
|
||||
PSD_report_temp = odm_GetPSDData(pDM_Odm, Tone_idx_2[tone_idx], initial_gain);
|
||||
//if( PSD_report_temp>PSD_report_Main[tone_idx] )
|
||||
PSD_report_Main[Tone_lenth_1+tone_idx]+=PSD_report_temp;
|
||||
}
|
||||
}
|
||||
|
||||
//Antenna B
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Switch to Aux-ant (CH8)\n"));
|
||||
ODM_SetBBReg(pDM_Odm, 0x948, 0xfff, 0x280);
|
||||
ODM_StallExecution(10);
|
||||
|
||||
for (i=0;i<test_num;i++)
|
||||
{
|
||||
for (tone_idx=0;tone_idx<Tone_lenth_2;tone_idx++)
|
||||
{
|
||||
PSD_report_temp = odm_GetPSDData(pDM_Odm, Tone_idx_2[tone_idx], initial_gain);
|
||||
//if( PSD_report_temp>PSD_report_Aux[tone_idx] )
|
||||
PSD_report_Aux[Tone_lenth_1+tone_idx]+=PSD_report_temp;
|
||||
}
|
||||
}
|
||||
|
||||
//2 [ Calculate Result ]
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\nMain PSD Result: (ALL) \n"));
|
||||
for (tone_idx=0;tone_idx<(Tone_lenth_1+Tone_lenth_2);tone_idx++)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Tone-%d]: %d, \n",(tone_idx+1), PSD_report_Main[tone_idx] ));
|
||||
Main_psd_result+= PSD_report_Main[tone_idx];
|
||||
if(PSD_report_Main[tone_idx]>MAX_PSD_report_Main)
|
||||
MAX_PSD_report_Main=PSD_report_Main[tone_idx];
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("--------------------------- \nTotal_Main= (( %d ))\n", Main_psd_result));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MAX_Main = (( %d ))\n", MAX_PSD_report_Main));
|
||||
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("\nAux PSD Result: (ALL) \n"));
|
||||
for (tone_idx=0;tone_idx<(Tone_lenth_1+Tone_lenth_2);tone_idx++)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[Tone-%d]: %d, \n",(tone_idx+1), PSD_report_Aux[tone_idx] ));
|
||||
Aux_psd_result+= PSD_report_Aux[tone_idx];
|
||||
if(PSD_report_Aux[tone_idx]>MAX_PSD_report_Aux)
|
||||
MAX_PSD_report_Aux=PSD_report_Aux[tone_idx];
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("--------------------------- \nTotal_Aux= (( %d ))\n", Aux_psd_result));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("MAX_Aux = (( %d ))\n\n", MAX_PSD_report_Aux));
|
||||
|
||||
//Main_psd_result=Main_psd_result-MAX_PSD_report_Main;
|
||||
//Aux_psd_result=Aux_psd_result-MAX_PSD_report_Aux;
|
||||
PSD_power_threshold=(Main_psd_result*7)>>3;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("[ Main_result , Aux_result ] = [ %d , %d ], PSD_power_threshold=(( %d ))\n", Main_psd_result, Aux_psd_result,PSD_power_threshold));
|
||||
|
||||
//3 [ Dual Antenna ]
|
||||
if(Aux_psd_result >= PSD_power_threshold )
|
||||
{
|
||||
if(pDM_Odm->DM_SWAT_Table.ANTB_ON == FALSE)
|
||||
{
|
||||
pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE;
|
||||
pDM_Odm->DM_SWAT_Table.ANTB_ON = TRUE;
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD,("ODM_SwAntDivCheckBeforeLink(): Dual antenna\n"));
|
||||
|
||||
// set bt coexDM from 1ant coexDM to 2ant coexDM
|
||||
//BT_SetBtCoexAntNum(pAdapter, BT_COEX_ANT_TYPE_DETECTED, 2);
|
||||
|
||||
// Init antenna diversity
|
||||
pDM_Odm->SupportAbility |= ODM_BB_ANT_DIV;
|
||||
ODM_AntDivInit(pDM_Odm);
|
||||
}
|
||||
//3 [ Single Antenna ]
|
||||
else
|
||||
{
|
||||
if(pDM_Odm->DM_SWAT_Table.ANTB_ON == TRUE)
|
||||
{
|
||||
pDM_Odm->DM_SWAT_Table.ANTA_ON = TRUE;
|
||||
pDM_Odm->DM_SWAT_Table.ANTB_ON = FALSE;
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("ODM_SwAntDivCheckBeforeLink(): Single antenna\n"));
|
||||
}
|
||||
|
||||
//2 [ Recover all parameters ]
|
||||
|
||||
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, RF_CHNLBW, bRFRegOffsetMask,Channel_ori);
|
||||
ODM_SetBBReg(pDM_Odm, rFPGA0_AnalogParameter4, 0xf00000, 0x0); // 3 wire enable 88c[23:20]=0x0
|
||||
ODM_SetBBReg(pDM_Odm, 0xc50, 0x7f, Regc50);
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, rS0S1_PathSwitch, bMaskDWord, Reg948);
|
||||
ODM_SetBBReg(pDM_Odm, rAGC_table_select, bMaskDWord, Regb2c);
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, rFPGA0_RFMOD, BIT24, 1); //enable whole CCK block
|
||||
ODM_Write1Byte(pDM_Odm, REG_TXPAUSE, 0x0); //Turn on TX // Resume TX Queue
|
||||
ODM_SetBBReg(pDM_Odm, 0xC14, bMaskDWord, Regc14); // [ Set IQK Matrix = 0 ] equivalent to [ Turn on CCA]
|
||||
ODM_SetBBReg(pDM_Odm, 0x908, bMaskDWord, Reg908);
|
||||
|
||||
return;
|
||||
|
||||
}
|
||||
|
||||
#endif
|
||||
void
|
||||
odm_SwAntDetectInit(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
#if(defined(CONFIG_ANT_DETECTION))
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
|
||||
|
||||
//pDM_SWAT_Table->PreAntenna = MAIN_ANT;
|
||||
//pDM_SWAT_Table->CurAntenna = MAIN_ANT;
|
||||
pDM_SWAT_Table->SWAS_NoLink_State = 0;
|
||||
pDM_SWAT_Table->Pre_Aux_FailDetec = FALSE;
|
||||
pDM_SWAT_Table->SWAS_NoLink_BK_Reg948 = 0xff;
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -0,0 +1,98 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __PHYDMANTDECT_H__
|
||||
#define __PHYDMANTDECT_H__
|
||||
|
||||
#define ANTDECT_VERSION "2.1" /*2015.07.29 by YuChen*/
|
||||
|
||||
#if(defined(CONFIG_ANT_DETECTION))
|
||||
//#if( DM_ODM_SUPPORT_TYPE & (ODM_WIN |ODM_CE))
|
||||
//ANT Test
|
||||
#define ANTTESTALL 0x00 /*Ant A or B will be Testing*/
|
||||
#define ANTTESTA 0x01 /*Ant A will be Testing*/
|
||||
#define ANTTESTB 0x02 /*Ant B will be testing*/
|
||||
|
||||
#define MAX_ANTENNA_DETECTION_CNT 10
|
||||
|
||||
|
||||
typedef struct _ANT_DETECTED_INFO{
|
||||
BOOLEAN bAntDetected;
|
||||
u4Byte dBForAntA;
|
||||
u4Byte dBForAntB;
|
||||
u4Byte dBForAntO;
|
||||
}ANT_DETECTED_INFO, *PANT_DETECTED_INFO;
|
||||
|
||||
|
||||
typedef enum tag_SW_Antenna_Switch_Definition
|
||||
{
|
||||
Antenna_A = 1,
|
||||
Antenna_B = 2,
|
||||
Antenna_MAX = 3,
|
||||
}DM_SWAS_E;
|
||||
|
||||
|
||||
|
||||
//1 [1. Single Tone Method] ===================================================
|
||||
|
||||
|
||||
|
||||
VOID
|
||||
ODM_SingleDualAntennaDefaultSetting(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
ODM_SingleDualAntennaDetection(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte mode
|
||||
);
|
||||
|
||||
//1 [2. Scan AP RSSI Method] ==================================================
|
||||
|
||||
#define SwAntDivCheckBeforeLink ODM_SwAntDivCheckBeforeLink
|
||||
|
||||
BOOLEAN
|
||||
ODM_SwAntDivCheckBeforeLink(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
|
||||
|
||||
|
||||
//1 [3. PSD Method] ==========================================================
|
||||
|
||||
|
||||
VOID
|
||||
ODM_SingleDualAntennaDetection_PSD(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
#endif
|
||||
|
||||
VOID
|
||||
odm_SwAntDetectInit(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,634 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __PHYDMANTDIV_H__
|
||||
#define __PHYDMANTDIV_H__
|
||||
|
||||
/*#define ANTDIV_VERSION "2.0" //2014.11.04*/
|
||||
/*#define ANTDIV_VERSION "2.1" //2015.01.13 Dino*/
|
||||
/*#define ANTDIV_VERSION "2.2" 2015.01.16 Dino*/
|
||||
/*#define ANTDIV_VERSION "3.1" 2015.07.29 YuChen, remove 92c 92d 8723a*/
|
||||
/*#define ANTDIV_VERSION "3.2" 2015.08.11 Stanley, disable antenna diversity when BT is enable for 8723B*/
|
||||
/*#define ANTDIV_VERSION "3.3" 2015.08.12 Stanley. 8723B does not need to check the antenna is control by BT,
|
||||
because antenna diversity only works when BT is disable or radio off*/
|
||||
/*#define ANTDIV_VERSION "3.4" 2015.08.28 Dino 1.Add 8821A Smart Antenna 2. Add 8188F SW S0S1 Antenna Diversity*/
|
||||
/*#define ANTDIV_VERSION "3.5" 2015.10.07 Stanley Always check antenna detection result from BT-coex. for 8723B, not from PHYDM*/
|
||||
/*#define ANTDIV_VERSION "3.6"*/ /*2015.11.16 Stanley */
|
||||
/*#define ANTDIV_VERSION "3.7"*/ /*2015.11.20 Dino Add SmartAnt FAT Patch */
|
||||
/*#define ANTDIV_VERSION "3.8" 2015.12.21 Dino, Add SmartAnt dynamic training packet num */
|
||||
#define ANTDIV_VERSION "3.9" /*2016.01.05 Dino, Add SmartAnt cmd for converting single & two smtant, and add cmd for adjust truth table */
|
||||
|
||||
//1 ============================================================
|
||||
//1 Definition
|
||||
//1 ============================================================
|
||||
|
||||
#define ANTDIV_INIT 0xff
|
||||
#define MAIN_ANT 1 /*Ant A or Ant Main or S1*/
|
||||
#define AUX_ANT 2 /*AntB or Ant Aux or S0*/
|
||||
#define MAX_ANT 3 /* 3 for AP using*/
|
||||
|
||||
#define ANT1_2G 0 /* = ANT2_5G for 8723D BTG S1 RX S0S1 diversity for 8723D, TX fixed at S1 */
|
||||
#define ANT2_2G 1 /* = ANT1_5G for 8723D BTG S0 RX S0S1 diversity for 8723D, TX fixed at S1 */
|
||||
/*smart antenna*/
|
||||
#define SUPPORT_RF_PATH_NUM 4
|
||||
#define SUPPORT_BEAM_PATTERN_NUM 4
|
||||
#define NUM_ANTENNA_8821A 2
|
||||
|
||||
#define NO_FIX_TX_ANT 0
|
||||
#define FIX_TX_AT_MAIN 1
|
||||
#define FIX_AUX_AT_MAIN 2
|
||||
|
||||
//Antenna Diversty Control Type
|
||||
#define ODM_AUTO_ANT 0
|
||||
#define ODM_FIX_MAIN_ANT 1
|
||||
#define ODM_FIX_AUX_ANT 2
|
||||
|
||||
#define ODM_N_ANTDIV_SUPPORT (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8188F|ODM_RTL8723D|ODM_RTL8195A)
|
||||
#define ODM_AC_ANTDIV_SUPPORT (ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812|ODM_RTL8821C)
|
||||
#define ODM_ANTDIV_SUPPORT (ODM_N_ANTDIV_SUPPORT|ODM_AC_ANTDIV_SUPPORT)
|
||||
#define ODM_SMART_ANT_SUPPORT (ODM_RTL8188E|ODM_RTL8192E)
|
||||
#define ODM_HL_SMART_ANT_TYPE1_SUPPORT (ODM_RTL8821)
|
||||
|
||||
#define ODM_ANTDIV_2G_SUPPORT_IC (ODM_RTL8188E|ODM_RTL8192E|ODM_RTL8723B|ODM_RTL8881A|ODM_RTL8188F|ODM_RTL8723D)
|
||||
#define ODM_ANTDIV_5G_SUPPORT_IC (ODM_RTL8821|ODM_RTL8881A|ODM_RTL8812|ODM_RTL8821C)
|
||||
|
||||
#define ODM_EVM_ENHANCE_ANTDIV_SUPPORT_IC (ODM_RTL8192E)
|
||||
|
||||
#define ODM_ANTDIV_2G BIT0
|
||||
#define ODM_ANTDIV_5G BIT1
|
||||
|
||||
#define ANTDIV_ON 1
|
||||
#define ANTDIV_OFF 0
|
||||
|
||||
#define FAT_ON 1
|
||||
#define FAT_OFF 0
|
||||
|
||||
#define TX_BY_DESC 1
|
||||
#define TX_BY_REG 0
|
||||
|
||||
#define RSSI_METHOD 0
|
||||
#define EVM_METHOD 1
|
||||
#define CRC32_METHOD 2
|
||||
|
||||
#define INIT_ANTDIV_TIMMER 0
|
||||
#define CANCEL_ANTDIV_TIMMER 1
|
||||
#define RELEASE_ANTDIV_TIMMER 2
|
||||
|
||||
#define CRC32_FAIL 1
|
||||
#define CRC32_OK 0
|
||||
|
||||
#define Evm_RSSI_TH_High 25
|
||||
#define Evm_RSSI_TH_Low 20
|
||||
|
||||
#define NORMAL_STATE_MIAN 1
|
||||
#define NORMAL_STATE_AUX 2
|
||||
#define TRAINING_STATE 3
|
||||
|
||||
#define FORCE_RSSI_DIFF 10
|
||||
|
||||
#define CSI_ON 1
|
||||
#define CSI_OFF 0
|
||||
|
||||
#define DIVON_CSIOFF 1
|
||||
#define DIVOFF_CSION 2
|
||||
|
||||
#define BDC_DIV_TRAIN_STATE 0
|
||||
#define BDC_BFer_TRAIN_STATE 1
|
||||
#define BDC_DECISION_STATE 2
|
||||
#define BDC_BF_HOLD_STATE 3
|
||||
#define BDC_DIV_HOLD_STATE 4
|
||||
|
||||
#define BDC_MODE_1 1
|
||||
#define BDC_MODE_2 2
|
||||
#define BDC_MODE_3 3
|
||||
#define BDC_MODE_4 4
|
||||
#define BDC_MODE_NULL 0xff
|
||||
|
||||
/*SW S0S1 antenna diversity*/
|
||||
#define SWAW_STEP_INIT 0xff
|
||||
#define SWAW_STEP_PEEK 0
|
||||
#define SWAW_STEP_DETERMINE 1
|
||||
|
||||
#define RSSI_CHECK_RESET_PERIOD 10
|
||||
#define RSSI_CHECK_THRESHOLD 50
|
||||
|
||||
/*Hong Lin Smart antenna*/
|
||||
#define HL_SMTANT_2WIRE_DATA_LEN 24
|
||||
|
||||
//1 ============================================================
|
||||
//1 structure
|
||||
//1 ============================================================
|
||||
|
||||
|
||||
typedef struct _SW_Antenna_Switch_
|
||||
{
|
||||
u1Byte Double_chk_flag; /*If current antenna RSSI > "RSSI_CHECK_THRESHOLD", than check this antenna again*/
|
||||
u1Byte try_flag;
|
||||
s4Byte PreRSSI;
|
||||
u1Byte CurAntenna;
|
||||
u1Byte PreAntenna;
|
||||
u1Byte RSSI_Trying;
|
||||
u1Byte reset_idx;
|
||||
u1Byte Train_time;
|
||||
u1Byte Train_time_flag; /*base on RSSI difference between two antennas*/
|
||||
RT_TIMER phydm_SwAntennaSwitchTimer;
|
||||
u4Byte PktCnt_SWAntDivByCtrlFrame;
|
||||
BOOLEAN bSWAntDivByCtrlFrame;
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
#if USE_WORKITEM
|
||||
RT_WORK_ITEM phydm_SwAntennaSwitchWorkitem;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* AntDect (Before link Antenna Switch check) need to be moved*/
|
||||
u2Byte Single_Ant_Counter;
|
||||
u2Byte Dual_Ant_Counter;
|
||||
u2Byte Aux_FailDetec_Counter;
|
||||
u2Byte Retry_Counter;
|
||||
u1Byte SWAS_NoLink_State;
|
||||
u4Byte SWAS_NoLink_BK_Reg948;
|
||||
BOOLEAN ANTA_ON; /*To indicate Ant A is or not*/
|
||||
BOOLEAN ANTB_ON; /*To indicate Ant B is on or not*/
|
||||
BOOLEAN Pre_Aux_FailDetec;
|
||||
BOOLEAN RSSI_AntDect_bResult;
|
||||
u1Byte Ant5G;
|
||||
u1Byte Ant2G;
|
||||
|
||||
|
||||
}SWAT_T, *pSWAT_T;
|
||||
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
|
||||
#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
|
||||
typedef struct _BF_DIV_COEX_
|
||||
{
|
||||
BOOLEAN w_BFer_Client[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
BOOLEAN w_BFee_Client[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u4Byte MA_rx_TP[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u4Byte MA_rx_TP_DIV[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
|
||||
u1Byte BDCcoexType_wBfer;
|
||||
u1Byte num_Txbfee_Client;
|
||||
u1Byte num_Txbfer_Client;
|
||||
u1Byte BDC_Try_counter;
|
||||
u1Byte BDC_Hold_counter;
|
||||
u1Byte BDC_Mode;
|
||||
u1Byte BDC_active_Mode;
|
||||
u1Byte BDC_state;
|
||||
u1Byte BDC_RxIdleUpdate_counter;
|
||||
u1Byte num_Client;
|
||||
u1Byte pre_num_Client;
|
||||
u1Byte num_BfTar;
|
||||
u1Byte num_DivTar;
|
||||
|
||||
BOOLEAN bAll_DivSta_Idle;
|
||||
BOOLEAN bAll_BFSta_Idle;
|
||||
BOOLEAN BDC_Try_flag;
|
||||
BOOLEAN BF_pass;
|
||||
BOOLEAN DIV_pass;
|
||||
}BDC_T,*pBDC_T;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
|
||||
typedef struct _SMART_ANTENNA_TRAINNING_ {
|
||||
u4Byte latch_time;
|
||||
BOOLEAN pkt_skip_statistic_en;
|
||||
u4Byte fix_beam_pattern_en;
|
||||
u4Byte fix_training_num_en;
|
||||
u4Byte fix_beam_pattern_codeword;
|
||||
u4Byte update_beam_codeword;
|
||||
u4Byte ant_num; /*number of used smart beam antenna*/
|
||||
u4Byte ant_num_total;/*number of total smart beam antenna*/
|
||||
u4Byte first_train_ant; /*decide witch antenna to train first*/
|
||||
u4Byte rfu_codeword_table[4]; /*2G beam truth table*/
|
||||
u4Byte rfu_codeword_table_5g[4]; /*5G beam truth table*/
|
||||
u4Byte beam_patten_num_each_ant;/*number of beam can be switched in each antenna*/
|
||||
u4Byte data_codeword_bit_num;
|
||||
u1Byte per_beam_training_pkt_num;
|
||||
u1Byte decision_holding_period;
|
||||
u1Byte pkt_counter;
|
||||
u4Byte fast_training_beam_num;
|
||||
u4Byte pre_fast_training_beam_num;
|
||||
u4Byte pkt_rssi_pre[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM];
|
||||
u1Byte beam_train_cnt[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM];
|
||||
u1Byte beam_train_rssi_diff[SUPPORT_RF_PATH_NUM][SUPPORT_BEAM_PATTERN_NUM];
|
||||
u4Byte pkt_rssi_sum[8][SUPPORT_BEAM_PATTERN_NUM];
|
||||
u4Byte pkt_rssi_cnt[8][SUPPORT_BEAM_PATTERN_NUM];
|
||||
u4Byte rx_idle_beam[SUPPORT_RF_PATH_NUM];
|
||||
u4Byte pre_codeword;
|
||||
BOOLEAN force_update_beam_en;
|
||||
u4Byte beacon_counter;
|
||||
u4Byte pre_beacon_counter;
|
||||
u1Byte update_beam_idx;
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
RT_WORK_ITEM hl_smart_antenna_workitem;
|
||||
RT_WORK_ITEM hl_smart_antenna_decision_workitem;
|
||||
#endif
|
||||
|
||||
} SAT_T, *pSAT_T;
|
||||
#endif
|
||||
|
||||
typedef struct _FAST_ANTENNA_TRAINNING_
|
||||
{
|
||||
u1Byte Bssid[6];
|
||||
u1Byte antsel_rx_keep_0;
|
||||
u1Byte antsel_rx_keep_1;
|
||||
u1Byte antsel_rx_keep_2;
|
||||
u1Byte antsel_rx_keep_3;
|
||||
u4Byte antSumRSSI[7];
|
||||
u4Byte antRSSIcnt[7];
|
||||
u4Byte antAveRSSI[7];
|
||||
u1Byte FAT_State;
|
||||
u4Byte TrainIdx;
|
||||
u1Byte antsel_a[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u1Byte antsel_b[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u1Byte antsel_c[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u2Byte MainAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u2Byte AuxAnt_Sum[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u2Byte MainAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u2Byte AuxAnt_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u2Byte MainAnt_Sum_cck[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u2Byte AuxAnt_Sum_cck[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u2Byte MainAnt_Cnt_cck[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u2Byte AuxAnt_Cnt_cck[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u1Byte RxIdleAnt;
|
||||
u1Byte AntDiv_OnOff;
|
||||
BOOLEAN bBecomeLinked;
|
||||
u4Byte MinMaxRSSI;
|
||||
u1Byte idx_AntDiv_counter_2G;
|
||||
u1Byte idx_AntDiv_counter_5G;
|
||||
u1Byte AntDiv_2G_5G;
|
||||
u4Byte CCK_counter_main;
|
||||
u4Byte CCK_counter_aux;
|
||||
u4Byte OFDM_counter_main;
|
||||
u4Byte OFDM_counter_aux;
|
||||
|
||||
#ifdef ODM_EVM_ENHANCE_ANTDIV
|
||||
u4Byte MainAntEVM_Sum[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u4Byte AuxAntEVM_Sum[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u4Byte MainAntEVM_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
u4Byte AuxAntEVM_Cnt[ODM_ASSOCIATE_ENTRY_NUM];
|
||||
BOOLEAN EVM_method_enable;
|
||||
u1Byte TargetAnt_EVM;
|
||||
u1Byte TargetAnt_CRC32;
|
||||
u1Byte TargetAnt_enhance;
|
||||
u1Byte pre_TargetAnt_enhance;
|
||||
u2Byte Main_MPDU_OK_cnt;
|
||||
u2Byte Aux_MPDU_OK_cnt;
|
||||
|
||||
u4Byte CRC32_Ok_Cnt;
|
||||
u4Byte CRC32_Fail_Cnt;
|
||||
u4Byte MainCRC32_Ok_Cnt;
|
||||
u4Byte AuxCRC32_Ok_Cnt;
|
||||
u4Byte MainCRC32_Fail_Cnt;
|
||||
u4Byte AuxCRC32_Fail_Cnt;
|
||||
#endif
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
u4Byte CCK_CtrlFrame_Cnt_main;
|
||||
u4Byte CCK_CtrlFrame_Cnt_aux;
|
||||
u4Byte OFDM_CtrlFrame_Cnt_main;
|
||||
u4Byte OFDM_CtrlFrame_Cnt_aux;
|
||||
u4Byte MainAnt_CtrlFrame_Sum;
|
||||
u4Byte AuxAnt_CtrlFrame_Sum;
|
||||
u4Byte MainAnt_CtrlFrame_Cnt;
|
||||
u4Byte AuxAnt_CtrlFrame_Cnt;
|
||||
#endif
|
||||
u1Byte b_fix_tx_ant;
|
||||
BOOLEAN fix_ant_bfee;
|
||||
BOOLEAN enable_ctrl_frame_antdiv;
|
||||
BOOLEAN use_ctrl_frame_antdiv;
|
||||
u1Byte hw_antsw_occur;
|
||||
u1Byte *pForceTxAntByDesc;
|
||||
u1Byte ForceTxAntByDesc; /*A temp value, will hook to driver team's outer parameter later*/
|
||||
u1Byte *pDefaultS0S1;
|
||||
u1Byte DefaultS0S1;
|
||||
}FAT_T,*pFAT_T;
|
||||
|
||||
|
||||
//1 ============================================================
|
||||
//1 enumeration
|
||||
//1 ============================================================
|
||||
|
||||
|
||||
|
||||
typedef enum _FAT_STATE /*Fast antenna training*/
|
||||
{
|
||||
FAT_BEFORE_LINK_STATE = 0,
|
||||
FAT_PREPARE_STATE = 1,
|
||||
FAT_TRAINING_STATE = 2,
|
||||
FAT_DECISION_STATE = 3
|
||||
}FAT_STATE_E, *PFAT_STATE_E;
|
||||
|
||||
typedef enum _ANT_DIV_TYPE
|
||||
{
|
||||
NO_ANTDIV = 0xFF,
|
||||
CG_TRX_HW_ANTDIV = 0x01,
|
||||
CGCS_RX_HW_ANTDIV = 0x02,
|
||||
FIXED_HW_ANTDIV = 0x03,
|
||||
CG_TRX_SMART_ANTDIV = 0x04,
|
||||
CGCS_RX_SW_ANTDIV = 0x05,
|
||||
S0S1_SW_ANTDIV = 0x06, /*8723B intrnal switch S0 S1*/
|
||||
S0S1_TRX_HW_ANTDIV = 0x07, /*TRX S0S1 diversity for 8723D*/
|
||||
HL_SW_SMART_ANT_TYPE1 = 0x10 /*Hong-Lin Smart antenna use for 8821AE which is a 2 Ant. entitys, and each Ant. is equipped with 4 antenna patterns*/
|
||||
}ANT_DIV_TYPE_E, *PANT_DIV_TYPE_E;
|
||||
|
||||
|
||||
//1 ============================================================
|
||||
//1 function prototype
|
||||
//1 ============================================================
|
||||
|
||||
|
||||
VOID
|
||||
ODM_StopAntennaSwitchDm(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_enable_antenna_diversity(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
ODM_SetAntConfig(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte antSetting // 0=A, 1=B, 2=C, ....
|
||||
);
|
||||
|
||||
|
||||
#define SwAntDivRestAfterLink ODM_SwAntDivRestAfterLink
|
||||
|
||||
VOID ODM_SwAntDivRestAfterLink(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
|
||||
|
||||
VOID
|
||||
ODM_UpdateRxIdleAnt(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Ant
|
||||
);
|
||||
|
||||
#if (RTL8723B_SUPPORT == 1)
|
||||
VOID
|
||||
ODM_UpdateRxIdleAnt_8723B(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Ant,
|
||||
IN u4Byte DefaultAnt,
|
||||
IN u4Byte OptionalAnt
|
||||
);
|
||||
#endif
|
||||
|
||||
#if (RTL8188F_SUPPORT == 1)
|
||||
VOID
|
||||
phydm_update_rx_idle_antenna_8188F(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u4Byte default_ant
|
||||
);
|
||||
#endif
|
||||
|
||||
#if (RTL8723D_SUPPORT == 1)
|
||||
|
||||
VOID
|
||||
phydm_set_tx_ant_pwr_8723d(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Ant
|
||||
);
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
VOID
|
||||
ODM_SW_AntDiv_Callback(
|
||||
IN PRT_TIMER pTimer
|
||||
);
|
||||
|
||||
VOID
|
||||
ODM_SW_AntDiv_WorkitemCallback(
|
||||
IN PVOID pContext
|
||||
);
|
||||
|
||||
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
|
||||
VOID
|
||||
ODM_SW_AntDiv_WorkitemCallback(
|
||||
IN PVOID pContext
|
||||
);
|
||||
|
||||
VOID
|
||||
ODM_SW_AntDiv_Callback(
|
||||
void *FunctionContext
|
||||
);
|
||||
|
||||
#endif
|
||||
|
||||
VOID
|
||||
odm_S0S1_SwAntDivByCtrlFrame(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Step
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_AntselStatisticsOfCtrlFrame(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte antsel_tr_mux,
|
||||
IN u4Byte RxPWDBAll
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_S0S1_SwAntDivByCtrlFrame_ProcessRSSI(
|
||||
IN PVOID pDM_VOID,
|
||||
IN PVOID p_phy_info_void,
|
||||
IN PVOID p_pkt_info_void
|
||||
);
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef ODM_EVM_ENHANCE_ANTDIV
|
||||
VOID
|
||||
odm_EVM_FastAntTrainingCallback(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
#endif
|
||||
|
||||
VOID
|
||||
odm_HW_AntDiv(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
#if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) )
|
||||
VOID
|
||||
odm_FastAntTraining(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_FastAntTrainingCallback(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_FastAntTrainingWorkItemCallback(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
VOID
|
||||
phydm_beam_switch_workitem_callback(
|
||||
IN PVOID pContext
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_beam_decision_workitem_callback(
|
||||
IN PVOID pContext
|
||||
);
|
||||
|
||||
#endif
|
||||
|
||||
VOID
|
||||
phydm_update_beam_pattern(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u4Byte codeword,
|
||||
IN u4Byte codeword_length
|
||||
);
|
||||
|
||||
void
|
||||
phydm_set_all_ant_same_beam_num(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_hl_smart_ant_debug(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u4Byte *const dm_value,
|
||||
IN u4Byte *_used,
|
||||
OUT char *output,
|
||||
IN u4Byte *_out_len
|
||||
);
|
||||
|
||||
#endif/*#ifdef CONFIG_HL_SMART_ANTENNA_TYPE1*/
|
||||
|
||||
VOID
|
||||
ODM_AntDivInit(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
ODM_AntDiv(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_AntselStatistics(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte antsel_tr_mux,
|
||||
IN u4Byte MacId,
|
||||
IN u4Byte utility,
|
||||
IN u1Byte method,
|
||||
IN u1Byte isCCKrate
|
||||
);
|
||||
|
||||
VOID
|
||||
ODM_Process_RSSIForAntDiv(
|
||||
IN OUT PVOID pDM_VOID,
|
||||
IN PVOID p_phy_info_void,
|
||||
IN PVOID p_pkt_info_void
|
||||
);
|
||||
|
||||
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
VOID
|
||||
ODM_SetTxAntByTxInfo(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte pDesc,
|
||||
IN u1Byte macId
|
||||
);
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE == ODM_AP)
|
||||
|
||||
struct tx_desc; /*declared tx_desc here or compile error happened when enabled 8822B*/
|
||||
|
||||
VOID
|
||||
ODM_SetTxAntByTxInfo(
|
||||
struct rtl8192cd_priv *priv,
|
||||
struct tx_desc *pdesc,
|
||||
unsigned short aid
|
||||
);
|
||||
|
||||
#if 1/*def def CONFIG_WLAN_HAL*/
|
||||
VOID
|
||||
ODM_SetTxAntByTxInfo_HAL(
|
||||
struct rtl8192cd_priv *priv,
|
||||
PVOID pdesc_data,
|
||||
u2Byte aid
|
||||
);
|
||||
#endif /*#ifdef CONFIG_WLAN_HAL*/
|
||||
#endif
|
||||
|
||||
|
||||
VOID
|
||||
ODM_AntDiv_Config(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
ODM_AntDivTimers(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte state
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_antdiv_debug(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u4Byte *const dm_value,
|
||||
IN u4Byte *_used,
|
||||
OUT char *output,
|
||||
IN u4Byte *_out_len
|
||||
);
|
||||
|
||||
#endif /*#if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))*/
|
||||
|
||||
VOID
|
||||
ODM_AntDivReset(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_AntennaDiversityInit(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_AntennaDiversity(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
#endif /*#ifndef __ODMANTDIV_H__*/
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,367 @@
|
||||
#ifndef __INC_PHYDM_BEAMFORMING_H
|
||||
#define __INC_PHYDM_BEAMFORMING_H
|
||||
|
||||
#ifndef BEAMFORMING_SUPPORT
|
||||
#define BEAMFORMING_SUPPORT 0
|
||||
#endif
|
||||
|
||||
/*Beamforming Related*/
|
||||
#include "txbf/halcomtxbf.h"
|
||||
#include "txbf/haltxbfjaguar.h"
|
||||
#include "txbf/haltxbf8192e.h"
|
||||
#include "txbf/haltxbf8814a.h"
|
||||
#include "txbf/haltxbf8822b.h"
|
||||
#include "txbf/haltxbfinterface.h"
|
||||
|
||||
#if (BEAMFORMING_SUPPORT == 1)
|
||||
|
||||
#define MAX_BEAMFORMEE_SU 2
|
||||
#define MAX_BEAMFORMER_SU 2
|
||||
#if (RTL8822B_SUPPORT == 1)
|
||||
#define MAX_BEAMFORMEE_MU 6
|
||||
#define MAX_BEAMFORMER_MU 1
|
||||
#else
|
||||
#define MAX_BEAMFORMEE_MU 0
|
||||
#define MAX_BEAMFORMER_MU 0
|
||||
#endif
|
||||
|
||||
#define BEAMFORMEE_ENTRY_NUM (MAX_BEAMFORMEE_SU + MAX_BEAMFORMEE_MU)
|
||||
#define BEAMFORMER_ENTRY_NUM (MAX_BEAMFORMER_SU + MAX_BEAMFORMER_MU)
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
/*for different naming between WIN and CE*/
|
||||
#define BEACON_QUEUE BCN_QUEUE_INX
|
||||
#define NORMAL_QUEUE MGT_QUEUE_INX
|
||||
#define RT_DISABLE_FUNC RTW_DISABLE_FUNC
|
||||
#define RT_ENABLE_FUNC RTW_ENABLE_FUNC
|
||||
#endif
|
||||
|
||||
typedef enum _BEAMFORMING_ENTRY_STATE {
|
||||
BEAMFORMING_ENTRY_STATE_UNINITIALIZE,
|
||||
BEAMFORMING_ENTRY_STATE_INITIALIZEING,
|
||||
BEAMFORMING_ENTRY_STATE_INITIALIZED,
|
||||
BEAMFORMING_ENTRY_STATE_PROGRESSING,
|
||||
BEAMFORMING_ENTRY_STATE_PROGRESSED
|
||||
} BEAMFORMING_ENTRY_STATE, *PBEAMFORMING_ENTRY_STATE;
|
||||
|
||||
|
||||
typedef enum _BEAMFORMING_NOTIFY_STATE {
|
||||
BEAMFORMING_NOTIFY_NONE,
|
||||
BEAMFORMING_NOTIFY_ADD,
|
||||
BEAMFORMING_NOTIFY_DELETE,
|
||||
BEAMFORMEE_NOTIFY_ADD_SU,
|
||||
BEAMFORMEE_NOTIFY_DELETE_SU,
|
||||
BEAMFORMEE_NOTIFY_ADD_MU,
|
||||
BEAMFORMEE_NOTIFY_DELETE_MU,
|
||||
BEAMFORMING_NOTIFY_RESET
|
||||
} BEAMFORMING_NOTIFY_STATE, *PBEAMFORMING_NOTIFY_STATE;
|
||||
|
||||
typedef enum _BEAMFORMING_CAP {
|
||||
BEAMFORMING_CAP_NONE = 0x0,
|
||||
BEAMFORMER_CAP_HT_EXPLICIT = BIT1,
|
||||
BEAMFORMEE_CAP_HT_EXPLICIT = BIT2,
|
||||
BEAMFORMER_CAP_VHT_SU = BIT5, /* Self has er Cap, because Reg er & peer ee */
|
||||
BEAMFORMEE_CAP_VHT_SU = BIT6, /* Self has ee Cap, because Reg ee & peer er */
|
||||
BEAMFORMER_CAP_VHT_MU = BIT7, /* Self has er Cap, because Reg er & peer ee */
|
||||
BEAMFORMEE_CAP_VHT_MU = BIT8, /* Self has ee Cap, because Reg ee & peer er */
|
||||
BEAMFORMER_CAP = BIT9,
|
||||
BEAMFORMEE_CAP = BIT10,
|
||||
}BEAMFORMING_CAP, *PBEAMFORMING_CAP;
|
||||
|
||||
|
||||
typedef enum _SOUNDING_MODE {
|
||||
SOUNDING_SW_VHT_TIMER = 0x0,
|
||||
SOUNDING_SW_HT_TIMER = 0x1,
|
||||
SOUNDING_STOP_All_TIMER = 0x2,
|
||||
SOUNDING_HW_VHT_TIMER = 0x3,
|
||||
SOUNDING_HW_HT_TIMER = 0x4,
|
||||
SOUNDING_STOP_OID_TIMER = 0x5,
|
||||
SOUNDING_AUTO_VHT_TIMER = 0x6,
|
||||
SOUNDING_AUTO_HT_TIMER = 0x7,
|
||||
SOUNDING_FW_VHT_TIMER = 0x8,
|
||||
SOUNDING_FW_HT_TIMER = 0x9,
|
||||
}SOUNDING_MODE, *PSOUNDING_MODE;
|
||||
|
||||
typedef struct _RT_BEAMFORM_STAINFO {
|
||||
pu1Byte RA;
|
||||
u2Byte AID;
|
||||
u2Byte MacID;
|
||||
u1Byte MyMacAddr[6];
|
||||
WIRELESS_MODE WirelessMode;
|
||||
CHANNEL_WIDTH BW;
|
||||
BEAMFORMING_CAP BeamformCap;
|
||||
u1Byte HtBeamformCap;
|
||||
u2Byte VhtBeamformCap;
|
||||
u1Byte CurBeamform;
|
||||
u2Byte CurBeamformVHT;
|
||||
} RT_BEAMFORM_STAINFO, *PRT_BEAMFORM_STAINFO;
|
||||
|
||||
|
||||
typedef struct _RT_BEAMFORMEE_ENTRY {
|
||||
BOOLEAN bUsed;
|
||||
BOOLEAN bTxBF;
|
||||
BOOLEAN bSound;
|
||||
u2Byte AID; /*Used to construct AID field of NDPA packet.*/
|
||||
u2Byte MacId; /*Used to Set Reg42C in IBSS mode. */
|
||||
u2Byte P_AID; /*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */
|
||||
u2Byte G_ID; /*Used to fill Tx DESC*/
|
||||
u1Byte MyMacAddr[6];
|
||||
u1Byte MacAddr[6]; /*Used to fill Reg6E4 to fill Mac address of CSI report frame.*/
|
||||
CHANNEL_WIDTH SoundBW; /*Sounding BandWidth*/
|
||||
u2Byte SoundPeriod;
|
||||
BEAMFORMING_CAP BeamformEntryCap;
|
||||
BEAMFORMING_ENTRY_STATE BeamformEntryState;
|
||||
BOOLEAN bBeamformingInProgress;
|
||||
/*u1Byte LogSeq; // Move to _RT_BEAMFORMER_ENTRY*/
|
||||
/*u2Byte LogRetryCnt:3; // 0~4 // Move to _RT_BEAMFORMER_ENTRY*/
|
||||
/*u2Byte LogSuccessCnt:2; // 0~2 // Move to _RT_BEAMFORMER_ENTRY*/
|
||||
u2Byte LogStatusFailCnt:5; // 0~21
|
||||
u2Byte DefaultCSICnt:5; // 0~21
|
||||
u1Byte CSIMatrix[327];
|
||||
u2Byte CSIMatrixLen;
|
||||
u1Byte NumofSoundingDim;
|
||||
u1Byte CompSteeringNumofBFer;
|
||||
u1Byte su_reg_index;
|
||||
/*For MU-MIMO*/
|
||||
BOOLEAN is_mu_sta;
|
||||
u1Byte mu_reg_index;
|
||||
u1Byte gid_valid[8];
|
||||
u1Byte user_position[16];
|
||||
} RT_BEAMFORMEE_ENTRY, *PRT_BEAMFORMEE_ENTRY;
|
||||
|
||||
typedef struct _RT_BEAMFORMER_ENTRY {
|
||||
BOOLEAN bUsed;
|
||||
/*P_AID of BFer entry is probably not used*/
|
||||
u2Byte P_AID; /*Used to fill Reg42C & Reg714 to compare with P_AID of Tx DESC. */
|
||||
u2Byte G_ID;
|
||||
u1Byte MyMacAddr[6];
|
||||
u1Byte MacAddr[6];
|
||||
BEAMFORMING_CAP BeamformEntryCap;
|
||||
u1Byte NumofSoundingDim;
|
||||
u1Byte ClockResetTimes; /*Modified by Jeffery @2015-04-10*/
|
||||
u1Byte PreLogSeq; /*Modified by Jeffery @2015-03-30*/
|
||||
u1Byte LogSeq; /*Modified by Jeffery @2014-10-29*/
|
||||
u2Byte LogRetryCnt:3; /*Modified by Jeffery @2014-10-29*/
|
||||
u2Byte LogSuccess:2; /*Modified by Jeffery @2014-10-29*/
|
||||
u1Byte su_reg_index;
|
||||
/*For MU-MIMO*/
|
||||
BOOLEAN is_mu_ap;
|
||||
u1Byte gid_valid[8];
|
||||
u1Byte user_position[16];
|
||||
u2Byte AID;
|
||||
} RT_BEAMFORMER_ENTRY, *PRT_BEAMFORMER_ENTRY;
|
||||
|
||||
typedef struct _RT_SOUNDING_INFO {
|
||||
u1Byte SoundIdx;
|
||||
CHANNEL_WIDTH SoundBW;
|
||||
SOUNDING_MODE SoundMode;
|
||||
u2Byte SoundPeriod;
|
||||
} RT_SOUNDING_INFO, *PRT_SOUNDING_INFO;
|
||||
|
||||
|
||||
|
||||
typedef struct _RT_BEAMFORMING_OID_INFO {
|
||||
u1Byte SoundOidIdx;
|
||||
CHANNEL_WIDTH SoundOidBW;
|
||||
SOUNDING_MODE SoundOidMode;
|
||||
u2Byte SoundOidPeriod;
|
||||
} RT_BEAMFORMING_OID_INFO, *PRT_BEAMFORMING_OID_INFO;
|
||||
|
||||
|
||||
typedef struct _RT_BEAMFORMING_INFO {
|
||||
BEAMFORMING_CAP BeamformCap;
|
||||
RT_BEAMFORMEE_ENTRY BeamformeeEntry[BEAMFORMEE_ENTRY_NUM];
|
||||
RT_BEAMFORMER_ENTRY BeamformerEntry[BEAMFORMER_ENTRY_NUM];
|
||||
RT_BEAMFORM_STAINFO BeamformSTAinfo;
|
||||
u1Byte BeamformeeCurIdx;
|
||||
RT_TIMER BeamformingTimer;
|
||||
RT_TIMER mu_timer;
|
||||
RT_SOUNDING_INFO SoundingInfo;
|
||||
RT_BEAMFORMING_OID_INFO BeamformingOidInfo;
|
||||
HAL_TXBF_INFO TxbfInfo;
|
||||
u1Byte SoundingSequence;
|
||||
u1Byte beamformee_su_cnt;
|
||||
u1Byte beamformer_su_cnt;
|
||||
u4Byte beamformee_su_reg_maping;
|
||||
u4Byte beamformer_su_reg_maping;
|
||||
/*For MU-MINO*/
|
||||
u1Byte beamformee_mu_cnt;
|
||||
u1Byte beamformer_mu_cnt;
|
||||
u4Byte beamformee_mu_reg_maping;
|
||||
u1Byte mu_ap_index;
|
||||
BOOLEAN is_mu_sounding;
|
||||
u1Byte FirstMUBFeeIndex;
|
||||
BOOLEAN is_mu_sounding_in_progress;
|
||||
BOOLEAN dbg_disable_mu_tx;
|
||||
BOOLEAN applyVmatrix;
|
||||
BOOLEAN snding3SS;
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
PADAPTER SourceAdapter;
|
||||
#endif
|
||||
/* Control register */
|
||||
u4Byte RegMUTxCtrl; /* For USB/SDIO interfaces aync I/O */
|
||||
} RT_BEAMFORMING_INFO, *PRT_BEAMFORMING_INFO;
|
||||
|
||||
|
||||
typedef struct _RT_NDPA_STA_INFO {
|
||||
u2Byte AID:12;
|
||||
u2Byte FeedbackType:1;
|
||||
u2Byte NcIndex:3;
|
||||
} RT_NDPA_STA_INFO, *PRT_NDPA_STA_INFO;
|
||||
|
||||
typedef enum _PHYDM_ACTING_TYPE {
|
||||
PhyDM_ACTING_AS_IBSS = 0,
|
||||
PhyDM_ACTING_AS_AP = 1
|
||||
} PHYDM_ACTING_TYPE;
|
||||
|
||||
|
||||
BEAMFORMING_CAP
|
||||
phydm_Beamforming_GetEntryBeamCapByMacId(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte MacId
|
||||
);
|
||||
|
||||
PRT_BEAMFORMEE_ENTRY
|
||||
phydm_Beamforming_GetBFeeEntryByAddr(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte RA,
|
||||
OUT pu1Byte Idx
|
||||
);
|
||||
|
||||
PRT_BEAMFORMER_ENTRY
|
||||
phydm_Beamforming_GetBFerEntryByAddr(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte TA,
|
||||
OUT pu1Byte Idx
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_Beamforming_Notify(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
phydm_actingDetermine(
|
||||
IN PVOID pDM_VOID,
|
||||
IN PHYDM_ACTING_TYPE type
|
||||
);
|
||||
|
||||
VOID
|
||||
Beamforming_Enter(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u2Byte staIdx
|
||||
);
|
||||
|
||||
VOID
|
||||
Beamforming_Leave(
|
||||
IN PVOID pDM_VOID,
|
||||
pu1Byte RA
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
BeamformingStart_FW(
|
||||
IN PVOID pDM_VOID,
|
||||
u1Byte Idx
|
||||
);
|
||||
|
||||
VOID
|
||||
Beamforming_CheckSoundingSuccess(
|
||||
IN PVOID pDM_VOID,
|
||||
BOOLEAN Status
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_Beamforming_End_SW(
|
||||
IN PVOID pDM_VOID,
|
||||
BOOLEAN Status
|
||||
);
|
||||
|
||||
VOID
|
||||
Beamforming_TimerCallback(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_Beamforming_Init(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
|
||||
|
||||
BEAMFORMING_CAP
|
||||
phydm_Beamforming_GetBeamCap(
|
||||
IN PVOID pDM_VOID,
|
||||
IN PRT_BEAMFORMING_INFO pBeamInfo
|
||||
);
|
||||
|
||||
|
||||
BOOLEAN
|
||||
BeamformingControl_V1(
|
||||
IN PVOID pDM_VOID,
|
||||
pu1Byte RA,
|
||||
u1Byte AID,
|
||||
u1Byte Mode,
|
||||
CHANNEL_WIDTH BW,
|
||||
u1Byte Rate
|
||||
);
|
||||
|
||||
|
||||
BOOLEAN
|
||||
phydm_BeamformingControl_V2(
|
||||
IN PVOID pDM_VOID,
|
||||
u1Byte Idx,
|
||||
u1Byte Mode,
|
||||
CHANNEL_WIDTH BW,
|
||||
u2Byte Period
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_Beamforming_Watchdog(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
Beamforming_SWTimerCallback(
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
PRT_TIMER pTimer
|
||||
#elif(DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
void *FunctionContext
|
||||
#endif
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
Beamforming_SendHTNDPAPacket(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte RA,
|
||||
IN CHANNEL_WIDTH BW,
|
||||
IN u1Byte QIdx
|
||||
);
|
||||
|
||||
|
||||
BOOLEAN
|
||||
Beamforming_SendVHTNDPAPacket(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte RA,
|
||||
IN u2Byte AID,
|
||||
IN CHANNEL_WIDTH BW,
|
||||
IN u1Byte QIdx
|
||||
);
|
||||
|
||||
#else
|
||||
#define Beamforming_GidPAid(Adapter, pTcb)
|
||||
#define phydm_actingDetermine(pDM_Odm, type) FALSE
|
||||
#define Beamforming_Enter(pDM_Odm, staIdx)
|
||||
#define Beamforming_Leave(pDM_Odm, RA)
|
||||
#define Beamforming_End_FW(pDMOdm)
|
||||
#define BeamformingControl_V1(pDM_Odm, RA, AID, Mode, BW, Rate) TRUE
|
||||
#define BeamformingControl_V2(pDM_Odm, Idx, Mode, BW, Period) TRUE
|
||||
#define phydm_Beamforming_End_SW(pDM_Odm, _Status)
|
||||
#define Beamforming_TimerCallback(pDM_Odm)
|
||||
#define phydm_Beamforming_Init(pDM_Odm)
|
||||
#define phydm_BeamformingControl_V2(pDM_Odm, _Idx, _Mode, _BW, _Period) FALSE
|
||||
#define Beamforming_Watchdog(pDM_Odm)
|
||||
#define phydm_Beamforming_Watchdog(pDM_Odm)
|
||||
|
||||
|
||||
#endif
|
||||
#endif
|
||||
@@ -0,0 +1,400 @@
|
||||
#include "mp_precomp.h"
|
||||
#include "phydm_precomp.h"
|
||||
|
||||
/*Set NHM period, threshold, disable ignore cca or not, disable ignore txon or not*/
|
||||
VOID
|
||||
phydm_NHMsetting(
|
||||
IN PVOID pDM_VOID,
|
||||
u1Byte NHMsetting
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PCCX_INFO CCX_INFO = &pDM_Odm->DM_CCX_INFO;
|
||||
|
||||
if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) {
|
||||
|
||||
if (NHMsetting == SET_NHM_SETTING){
|
||||
|
||||
/*Set inexclude_cca, inexclude_txon*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT9, CCX_INFO->NHM_inexclude_cca);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT10, CCX_INFO->NHM_inexclude_txon);
|
||||
|
||||
/*Set NHM period*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_CCX_PERIOD_11AC, bMaskHWord, CCX_INFO->NHM_period);
|
||||
|
||||
/*Set NHM threshold*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, bMaskByte0, CCX_INFO->NHM_th[0]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, bMaskByte1, CCX_INFO->NHM_th[1]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, bMaskByte2, CCX_INFO->NHM_th[2]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, bMaskByte3, CCX_INFO->NHM_th[3]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, bMaskByte0, CCX_INFO->NHM_th[4]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, bMaskByte1, CCX_INFO->NHM_th[5]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, bMaskByte2, CCX_INFO->NHM_th[6]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, bMaskByte3, CCX_INFO->NHM_th[7]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH8_11AC, bMaskByte0, CCX_INFO->NHM_th[8]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, bMaskByte2, CCX_INFO->NHM_th[9]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, bMaskByte3, CCX_INFO->NHM_th[10]);
|
||||
|
||||
/*CCX EN*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT8, CCX_EN);
|
||||
|
||||
}
|
||||
else if (NHMsetting == STORE_NHM_SETTING) {
|
||||
|
||||
/*Store pervious disable_ignore_cca, disable_ignore_txon*/
|
||||
CCX_INFO->NHM_inexclude_cca_restore = (BOOLEAN)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT9);
|
||||
CCX_INFO->NHM_inexclude_txon_restore = (BOOLEAN)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT10);
|
||||
|
||||
/*Store pervious NHM period*/
|
||||
CCX_INFO->NHM_period_restore = (u2Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_CCX_PERIOD_11AC, bMaskHWord);
|
||||
|
||||
/*Store NHM threshold*/
|
||||
CCX_INFO->NHM_th_restore[0] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, bMaskByte0);
|
||||
CCX_INFO->NHM_th_restore[1] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, bMaskByte1);
|
||||
CCX_INFO->NHM_th_restore[2] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, bMaskByte2);
|
||||
CCX_INFO->NHM_th_restore[3] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, bMaskByte3);
|
||||
CCX_INFO->NHM_th_restore[4] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, bMaskByte0);
|
||||
CCX_INFO->NHM_th_restore[5] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, bMaskByte1);
|
||||
CCX_INFO->NHM_th_restore[6] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, bMaskByte2);
|
||||
CCX_INFO->NHM_th_restore[7] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, bMaskByte3);
|
||||
CCX_INFO->NHM_th_restore[8] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH8_11AC, bMaskByte0);
|
||||
CCX_INFO->NHM_th_restore[9] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, bMaskByte2);
|
||||
CCX_INFO->NHM_th_restore[10] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, bMaskByte3);
|
||||
}
|
||||
else if (NHMsetting == RESTORE_NHM_SETTING) {
|
||||
|
||||
/*Set disable_ignore_cca, disable_ignore_txon*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT9, CCX_INFO->NHM_inexclude_cca_restore);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT10, CCX_INFO->NHM_inexclude_txon_restore);
|
||||
|
||||
/*Set NHM period*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_CCX_PERIOD_11AC, bMaskHWord, CCX_INFO->NHM_period);
|
||||
|
||||
/*Set NHM threshold*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, bMaskByte0, CCX_INFO->NHM_th_restore[0]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, bMaskByte1, CCX_INFO->NHM_th_restore[1]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, bMaskByte2, CCX_INFO->NHM_th_restore[2]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11AC, bMaskByte3, CCX_INFO->NHM_th_restore[3]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, bMaskByte0, CCX_INFO->NHM_th_restore[4]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, bMaskByte1, CCX_INFO->NHM_th_restore[5]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, bMaskByte2, CCX_INFO->NHM_th_restore[6]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11AC, bMaskByte3, CCX_INFO->NHM_th_restore[7]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH8_11AC, bMaskByte0, CCX_INFO->NHM_th_restore[8]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, bMaskByte2, CCX_INFO->NHM_th_restore[9]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, bMaskByte3, CCX_INFO->NHM_th_restore[10]);
|
||||
}
|
||||
else
|
||||
return;
|
||||
}
|
||||
|
||||
else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) {
|
||||
|
||||
if (NHMsetting == SET_NHM_SETTING){
|
||||
|
||||
/*Set disable_ignore_cca, disable_ignore_txon*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT9, CCX_INFO->NHM_inexclude_cca);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT10, CCX_INFO->NHM_inexclude_txon);
|
||||
|
||||
/*Set NHM period*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_CCX_PERIOD_11N, bMaskHWord, CCX_INFO->NHM_period);
|
||||
|
||||
/*Set NHM threshold*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, bMaskByte0, CCX_INFO->NHM_th[0]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, bMaskByte1, CCX_INFO->NHM_th[1]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, bMaskByte2, CCX_INFO->NHM_th[2]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, bMaskByte3, CCX_INFO->NHM_th[3]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, bMaskByte0, CCX_INFO->NHM_th[4]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, bMaskByte1, CCX_INFO->NHM_th[5]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, bMaskByte2, CCX_INFO->NHM_th[6]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, bMaskByte3, CCX_INFO->NHM_th[7]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH8_11N, bMaskByte0, CCX_INFO->NHM_th[8]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, bMaskByte2, CCX_INFO->NHM_th[9]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, bMaskByte3, CCX_INFO->NHM_th[10]);
|
||||
|
||||
/*CCX EN*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT8, CCX_EN);
|
||||
}
|
||||
else if (NHMsetting == STORE_NHM_SETTING) {
|
||||
|
||||
/*Store pervious disable_ignore_cca, disable_ignore_txon*/
|
||||
CCX_INFO->NHM_inexclude_cca_restore = (BOOLEAN)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT9);
|
||||
CCX_INFO->NHM_inexclude_txon_restore= (BOOLEAN)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT10);
|
||||
|
||||
/*Store pervious NHM period*/
|
||||
CCX_INFO->NHM_period_restore= (u2Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_CCX_PERIOD_11N, bMaskHWord);
|
||||
|
||||
/*Store NHM threshold*/
|
||||
CCX_INFO->NHM_th_restore[0] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, bMaskByte0);
|
||||
CCX_INFO->NHM_th_restore[1] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, bMaskByte1);
|
||||
CCX_INFO->NHM_th_restore[2] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, bMaskByte2);
|
||||
CCX_INFO->NHM_th_restore[3] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, bMaskByte3);
|
||||
CCX_INFO->NHM_th_restore[4] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, bMaskByte0);
|
||||
CCX_INFO->NHM_th_restore[5] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, bMaskByte1);
|
||||
CCX_INFO->NHM_th_restore[6] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, bMaskByte2);
|
||||
CCX_INFO->NHM_th_restore[7] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, bMaskByte3);
|
||||
CCX_INFO->NHM_th_restore[8] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH8_11N, bMaskByte0);
|
||||
CCX_INFO->NHM_th_restore[9] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, bMaskByte2);
|
||||
CCX_INFO->NHM_th_restore[10] = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, bMaskByte3);
|
||||
|
||||
}
|
||||
else if (NHMsetting == RESTORE_NHM_SETTING) {
|
||||
|
||||
/*Set disable_ignore_cca, disable_ignore_txon*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT9, CCX_INFO->NHM_inexclude_cca_restore);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT10, CCX_INFO->NHM_inexclude_txon_restore);
|
||||
|
||||
/*Set NHM period*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_CCX_PERIOD_11N, bMaskHWord, CCX_INFO->NHM_period_restore);
|
||||
|
||||
/*Set NHM threshold*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, bMaskByte0, CCX_INFO->NHM_th_restore[0]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, bMaskByte1, CCX_INFO->NHM_th_restore[1]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, bMaskByte2, CCX_INFO->NHM_th_restore[2]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH3_TO_TH0_11N, bMaskByte3, CCX_INFO->NHM_th_restore[3]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, bMaskByte0, CCX_INFO->NHM_th_restore[4]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, bMaskByte1, CCX_INFO->NHM_th_restore[5]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, bMaskByte2, CCX_INFO->NHM_th_restore[6]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH7_TO_TH4_11N, bMaskByte3, CCX_INFO->NHM_th_restore[7]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH8_11N, bMaskByte0, CCX_INFO->NHM_th_restore[8]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, bMaskByte2, CCX_INFO->NHM_th_restore[9]);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, bMaskByte3, CCX_INFO->NHM_th_restore[10]);
|
||||
}
|
||||
else
|
||||
return;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
VOID
|
||||
phydm_NHMtrigger(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PCCX_INFO CCX_INFO = &pDM_Odm->DM_CCX_INFO;
|
||||
|
||||
if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) {
|
||||
|
||||
/*Trigger NHM*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT1, 0);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11AC, BIT1, 1);
|
||||
}
|
||||
else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) {
|
||||
|
||||
/*Trigger NHM*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT1, 0);
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_NHM_TH9_TH10_11N, BIT1, 1);
|
||||
}
|
||||
}
|
||||
|
||||
VOID
|
||||
phydm_getNHMresult(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u4Byte value32;
|
||||
PCCX_INFO CCX_INFO = &pDM_Odm->DM_CCX_INFO;
|
||||
|
||||
if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) {
|
||||
|
||||
value32 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_CNT_11AC);
|
||||
CCX_INFO->NHM_result[0] = (u1Byte)(value32 & bMaskByte0);
|
||||
CCX_INFO->NHM_result[1] = (u1Byte)((value32 & bMaskByte1) >> 8);
|
||||
CCX_INFO->NHM_result[2] = (u1Byte)((value32 & bMaskByte2) >> 16);
|
||||
CCX_INFO->NHM_result[3] = (u1Byte)((value32 & bMaskByte3) >> 24);
|
||||
|
||||
value32 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_CNT7_TO_CNT4_11AC);
|
||||
CCX_INFO->NHM_result[4] = (u1Byte)(value32 & bMaskByte0);
|
||||
CCX_INFO->NHM_result[5] = (u1Byte)((value32 & bMaskByte1) >> 8);
|
||||
CCX_INFO->NHM_result[6] = (u1Byte)((value32 & bMaskByte2) >> 16);
|
||||
CCX_INFO->NHM_result[7] = (u1Byte)((value32 & bMaskByte3) >> 24);
|
||||
|
||||
value32 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_CNT11_TO_CNT8_11AC);
|
||||
CCX_INFO->NHM_result[8] = (u1Byte)(value32 & bMaskByte0);
|
||||
CCX_INFO->NHM_result[9] = (u1Byte)((value32 & bMaskByte1) >> 8);
|
||||
CCX_INFO->NHM_result[10] = (u1Byte)((value32 & bMaskByte2) >> 16);
|
||||
CCX_INFO->NHM_result[11] = (u1Byte)((value32 & bMaskByte3) >> 24);
|
||||
|
||||
/*Get NHM duration*/
|
||||
value32 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_DUR_READY_11AC);
|
||||
CCX_INFO->NHM_duration = (u2Byte)(value32 & bMaskLWord);
|
||||
|
||||
}
|
||||
|
||||
else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) {
|
||||
|
||||
value32 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_CNT_11N);
|
||||
CCX_INFO->NHM_result[0] = (u1Byte)(value32 & bMaskByte0);
|
||||
CCX_INFO->NHM_result[1] = (u1Byte)((value32 & bMaskByte1) >> 8);
|
||||
CCX_INFO->NHM_result[2] = (u1Byte)((value32 & bMaskByte2) >> 16);
|
||||
CCX_INFO->NHM_result[3] = (u1Byte)((value32 & bMaskByte3) >> 24);
|
||||
|
||||
value32 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_CNT7_TO_CNT4_11N);
|
||||
CCX_INFO->NHM_result[4] = (u1Byte)(value32 & bMaskByte0);
|
||||
CCX_INFO->NHM_result[5] = (u1Byte)((value32 & bMaskByte1) >> 8);
|
||||
CCX_INFO->NHM_result[6] = (u1Byte)((value32 & bMaskByte2) >> 16);
|
||||
CCX_INFO->NHM_result[7] = (u1Byte)((value32 & bMaskByte3) >> 24);
|
||||
|
||||
value32 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_CNT9_TO_CNT8_11N);
|
||||
CCX_INFO->NHM_result[8] = (u1Byte)((value32 & bMaskByte2) >> 16);
|
||||
CCX_INFO->NHM_result[9] = (u1Byte)((value32 & bMaskByte3) >> 24);
|
||||
|
||||
value32 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_CNT10_TO_CNT11_11N);
|
||||
CCX_INFO->NHM_result[10] = (u1Byte)((value32 & bMaskByte2) >> 16);
|
||||
CCX_INFO->NHM_result[11] = (u1Byte)((value32 & bMaskByte3) >> 24);
|
||||
|
||||
/*Get NHM duration*/
|
||||
value32 = ODM_Read4Byte(pDM_Odm, ODM_REG_NHM_CNT10_TO_CNT11_11N);
|
||||
CCX_INFO->NHM_duration = (u2Byte)(value32 & bMaskLWord);
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
BOOLEAN
|
||||
phydm_checkNHMready(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u4Byte value32 = 0;
|
||||
u1Byte i;
|
||||
BOOLEAN ret = FALSE;
|
||||
|
||||
if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) {
|
||||
|
||||
value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_RESULT_11AC, bMaskDWord);
|
||||
|
||||
for (i = 0; i < 200; i ++) {
|
||||
|
||||
ODM_delay_ms(1);
|
||||
if (ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_DUR_READY_11AC, BIT17)) {
|
||||
ret = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) {
|
||||
|
||||
value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_READY_11N, bMaskDWord);
|
||||
|
||||
for (i = 0; i < 200; i ++) {
|
||||
|
||||
ODM_delay_ms(1);
|
||||
if (ODM_GetBBReg(pDM_Odm, ODM_REG_NHM_DUR_READY_11AC, BIT17) ) {
|
||||
ret = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
VOID
|
||||
phydm_storeNHMsetting(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PCCX_INFO CCX_INFO = &pDM_Odm->DM_CCX_INFO;
|
||||
|
||||
if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) {
|
||||
|
||||
|
||||
}
|
||||
else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) {
|
||||
|
||||
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
VOID
|
||||
phydm_CLMsetting(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PCCX_INFO CCX_INFO = &pDM_Odm->DM_CCX_INFO;
|
||||
|
||||
|
||||
if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) {
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_CCX_PERIOD_11AC, bMaskLWord, CCX_INFO->CLM_period); /*4us sample 1 time*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11AC, BIT8, 0x1); /*Enable CCX for CLM*/
|
||||
|
||||
} else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) {
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_CCX_PERIOD_11N, bMaskLWord, CCX_INFO->CLM_period); /*4us sample 1 time*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11N, BIT8, 0x1); /*Enable CCX for CLM*/
|
||||
}
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCX, ODM_DBG_LOUD, ("[%s] : CLM period = %dus\n", __func__, CCX_INFO->CLM_period*4));
|
||||
|
||||
}
|
||||
|
||||
VOID
|
||||
phydm_CLMtrigger(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
|
||||
if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) {
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11AC, BIT0, 0x0); /*Trigger CLM*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11AC, BIT0, 0x1);
|
||||
} else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) {
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11N, BIT0, 0x0); /*Trigger CLM*/
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG_CLM_11N, BIT0, 0x1);
|
||||
}
|
||||
}
|
||||
|
||||
BOOLEAN
|
||||
phydm_checkCLMready(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u4Byte value32 = 0;
|
||||
BOOLEAN ret = FALSE;
|
||||
|
||||
if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
|
||||
value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_RESULT_11AC, bMaskDWord); /*make sure CLM calc is ready*/
|
||||
else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
|
||||
value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_READY_11N, bMaskDWord); /*make sure CLM calc is ready*/
|
||||
|
||||
if ((pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) && (value32 & BIT16))
|
||||
ret = TRUE;
|
||||
else if ((pDM_Odm->SupportICType & ODM_IC_11N_SERIES) && (value32 & BIT17))
|
||||
ret = TRUE;
|
||||
else
|
||||
ret = FALSE;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCX, ODM_DBG_LOUD, ("[%s] : CLM ready = %d\n", __func__, ret));
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
void
|
||||
phydm_getCLMresult(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PCCX_INFO CCX_INFO = &pDM_Odm->DM_CCX_INFO;
|
||||
|
||||
u4Byte value32 = 0;
|
||||
u2Byte results = 0;
|
||||
|
||||
if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
|
||||
value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_RESULT_11AC, bMaskDWord); /*read CLM calc result*/
|
||||
else if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
|
||||
value32 = ODM_GetBBReg(pDM_Odm, ODM_REG_CLM_RESULT_11N, bMaskDWord); /*read CLM calc result*/
|
||||
|
||||
CCX_INFO->CLM_result = (u2Byte)(value32 & bMaskLWord);
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CCX, ODM_DBG_LOUD, ("[%s] : CLM result = %dus\n", __func__, CCX_INFO->CLM_result*4));
|
||||
|
||||
}
|
||||
@@ -0,0 +1,102 @@
|
||||
#ifndef __PHYDMCCX_H__
|
||||
#define __PHYDMCCX_H__
|
||||
|
||||
#define CCX_EN 1
|
||||
|
||||
#define SET_NHM_SETTING 0
|
||||
#define STORE_NHM_SETTING 1
|
||||
#define RESTORE_NHM_SETTING 2
|
||||
|
||||
/*
|
||||
#define NHM_EXCLUDE_CCA 0
|
||||
#define NHM_INCLUDE_CCA 1
|
||||
#define NHM_EXCLUDE_TXON 0
|
||||
#define NHM_INCLUDE_TXON 1
|
||||
*/
|
||||
|
||||
typedef enum NHM_inexclude_cca {
|
||||
NHM_EXCLUDE_CCA,
|
||||
NHM_INCLUDE_CCA
|
||||
}NHM_INEXCLUDE_CCA;
|
||||
|
||||
typedef enum NHM_inexclude_txon {
|
||||
NHM_EXCLUDE_TXON,
|
||||
NHM_INCLUDE_TXON
|
||||
}NHM_INEXCLUDE_TXON;
|
||||
|
||||
|
||||
typedef struct _CCX_INFO{
|
||||
|
||||
/*Settings*/
|
||||
u1Byte NHM_th[11];
|
||||
u2Byte NHM_period; /* 4us per unit */
|
||||
u2Byte CLM_period; /* 4us per unit */
|
||||
NHM_INEXCLUDE_TXON NHM_inexclude_txon;
|
||||
NHM_INEXCLUDE_CCA NHM_inexclude_cca;
|
||||
|
||||
/*Previous Settings*/
|
||||
u1Byte NHM_th_restore[11];
|
||||
u2Byte NHM_period_restore; /* 4us per unit */
|
||||
u2Byte CLM_period_restore; /* 4us per unit */
|
||||
NHM_INEXCLUDE_TXON NHM_inexclude_txon_restore;
|
||||
NHM_INEXCLUDE_CCA NHM_inexclude_cca_restore;
|
||||
|
||||
/*Report*/
|
||||
u1Byte NHM_result[12];
|
||||
u2Byte NHM_duration;
|
||||
u2Byte CLM_result;
|
||||
|
||||
|
||||
BOOLEAN echo_NHM_en;
|
||||
BOOLEAN echo_CLM_en;
|
||||
u1Byte echo_IGI;
|
||||
|
||||
}CCX_INFO, *PCCX_INFO;
|
||||
|
||||
/*NHM*/
|
||||
|
||||
VOID
|
||||
phydm_NHMsetting(
|
||||
IN PVOID pDM_VOID,
|
||||
u1Byte NHMsetting
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_NHMtrigger(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_getNHMresult(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
phydm_checkNHMready(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
/*CLM*/
|
||||
|
||||
VOID
|
||||
phydm_CLMsetting(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_CLMtrigger(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
phydm_checkCLMready(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_getCLMresult(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,381 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
#include "mp_precomp.h"
|
||||
#include "phydm_precomp.h"
|
||||
|
||||
VOID
|
||||
odm_SetCrystalCap(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte CrystalCap
|
||||
)
|
||||
{
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK);
|
||||
|
||||
if(pCfoTrack->CrystalCap == CrystalCap)
|
||||
return;
|
||||
|
||||
pCfoTrack->CrystalCap = CrystalCap;
|
||||
|
||||
if (pDM_Odm->SupportICType & (ODM_RTL8188E | ODM_RTL8188F)) {
|
||||
/* write 0x24[22:17] = 0x24[16:11] = CrystalCap */
|
||||
CrystalCap = CrystalCap & 0x3F;
|
||||
ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x007ff800, (CrystalCap|(CrystalCap << 6)));
|
||||
} else if (pDM_Odm->SupportICType & ODM_RTL8812) {
|
||||
/* write 0x2C[30:25] = 0x2C[24:19] = CrystalCap */
|
||||
CrystalCap = CrystalCap & 0x3F;
|
||||
ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x7FF80000, (CrystalCap|(CrystalCap << 6)));
|
||||
} else if ((pDM_Odm->SupportICType & (ODM_RTL8703B|ODM_RTL8723B|ODM_RTL8192E|ODM_RTL8821))) {
|
||||
/* 0x2C[23:18] = 0x2C[17:12] = CrystalCap */
|
||||
CrystalCap = CrystalCap & 0x3F;
|
||||
ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x00FFF000, (CrystalCap|(CrystalCap << 6)));
|
||||
} else if (pDM_Odm->SupportICType & ODM_RTL8814A) {
|
||||
/* write 0x2C[26:21] = 0x2C[20:15] = CrystalCap */
|
||||
CrystalCap = CrystalCap & 0x3F;
|
||||
ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0x07FF8000, (CrystalCap|(CrystalCap << 6)));
|
||||
} else if (pDM_Odm->SupportICType & (ODM_RTL8822B|ODM_RTL8821C)) {
|
||||
/* write 0x24[30:25] = 0x28[6:1] = CrystalCap */
|
||||
CrystalCap = CrystalCap & 0x3F;
|
||||
ODM_SetBBReg(pDM_Odm, REG_AFE_XTAL_CTRL, 0x7e000000, CrystalCap);
|
||||
ODM_SetBBReg(pDM_Odm, REG_AFE_PLL_CTRL, 0x7e, CrystalCap);
|
||||
} else {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_SetCrystalCap(): Use default setting.\n"));
|
||||
ODM_SetBBReg(pDM_Odm, REG_MAC_PHY_CTRL, 0xFFF000, (CrystalCap|(CrystalCap << 6)));
|
||||
}
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("odm_SetCrystalCap(): CrystalCap = 0x%x\n", CrystalCap));
|
||||
#endif
|
||||
}
|
||||
|
||||
u1Byte
|
||||
odm_GetDefaultCrytaltalCap(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u1Byte CrystalCap = 0x20;
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
PADAPTER Adapter = pDM_Odm->Adapter;
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
||||
|
||||
CrystalCap = pHalData->CrystalCap;
|
||||
#else
|
||||
prtl8192cd_priv priv = pDM_Odm->priv;
|
||||
|
||||
if(priv->pmib->dot11RFEntry.xcap > 0)
|
||||
CrystalCap = priv->pmib->dot11RFEntry.xcap;
|
||||
#endif
|
||||
|
||||
CrystalCap = CrystalCap & 0x3f;
|
||||
|
||||
return CrystalCap;
|
||||
}
|
||||
|
||||
VOID
|
||||
odm_SetATCStatus(
|
||||
IN PVOID pDM_VOID,
|
||||
IN BOOLEAN ATCStatus
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK);
|
||||
|
||||
if(pCfoTrack->bATCStatus == ATCStatus)
|
||||
return;
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, ODM_REG(BB_ATC,pDM_Odm), ODM_BIT(BB_ATC,pDM_Odm), ATCStatus);
|
||||
pCfoTrack->bATCStatus = ATCStatus;
|
||||
}
|
||||
|
||||
BOOLEAN
|
||||
odm_GetATCStatus(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
BOOLEAN ATCStatus;
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
|
||||
ATCStatus = (BOOLEAN)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_ATC,pDM_Odm), ODM_BIT(BB_ATC,pDM_Odm));
|
||||
return ATCStatus;
|
||||
}
|
||||
|
||||
VOID
|
||||
ODM_CfoTrackingReset(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK);
|
||||
|
||||
pCfoTrack->DefXCap = odm_GetDefaultCrytaltalCap(pDM_Odm);
|
||||
pCfoTrack->bAdjust = TRUE;
|
||||
|
||||
if(pCfoTrack->CrystalCap > pCfoTrack->DefXCap)
|
||||
{
|
||||
odm_SetCrystalCap(pDM_Odm, pCfoTrack->CrystalCap - 1);
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD,
|
||||
("ODM_CfoTrackingReset(): approch default value (0x%x)\n", pCfoTrack->CrystalCap));
|
||||
} else if (pCfoTrack->CrystalCap < pCfoTrack->DefXCap)
|
||||
{
|
||||
odm_SetCrystalCap(pDM_Odm, pCfoTrack->CrystalCap + 1);
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD,
|
||||
("ODM_CfoTrackingReset(): approch default value (0x%x)\n", pCfoTrack->CrystalCap));
|
||||
}
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
odm_SetATCStatus(pDM_Odm, TRUE);
|
||||
#endif
|
||||
}
|
||||
|
||||
VOID
|
||||
ODM_CfoTrackingInit(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK);
|
||||
|
||||
pCfoTrack->DefXCap = pCfoTrack->CrystalCap = odm_GetDefaultCrytaltalCap(pDM_Odm);
|
||||
pCfoTrack->bATCStatus = odm_GetATCStatus(pDM_Odm);
|
||||
pCfoTrack->bAdjust = TRUE;
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init()=========>\n"));
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking_init(): bATCStatus = %d, CrystalCap = 0x%x\n", pCfoTrack->bATCStatus, pCfoTrack->DefXCap));
|
||||
|
||||
#if RTL8822B_SUPPORT
|
||||
/* Crystal cap. control by WiFi */
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8822B)
|
||||
ODM_SetBBReg(pDM_Odm, 0x10, 0x40, 0x1);
|
||||
#endif
|
||||
|
||||
#if RTL8821C_SUPPORT
|
||||
/* Crystal cap. control by WiFi */
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8821C)
|
||||
ODM_SetBBReg(pDM_Odm, 0x10, 0x40, 0x1);
|
||||
#endif
|
||||
}
|
||||
|
||||
VOID
|
||||
ODM_CfoTracking(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK);
|
||||
s4Byte CFO_ave = 0;
|
||||
u4Byte CFO_rpt_sum, CFO_kHz_avg[4] = {0};
|
||||
s4Byte CFO_ave_diff;
|
||||
s1Byte CrystalCap = pCfoTrack->CrystalCap;
|
||||
u1Byte Adjust_Xtal = 1, i, valid_path_cnt = 0;
|
||||
|
||||
//4 Support ability
|
||||
if(!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING))
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Return: SupportAbility ODM_BB_CFO_TRACKING is disabled\n"));
|
||||
return;
|
||||
}
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking()=========> \n"));
|
||||
|
||||
if(!pDM_Odm->bLinked || !pDM_Odm->bOneEntryOnly)
|
||||
{
|
||||
//4 No link or more than one entry
|
||||
ODM_CfoTrackingReset(pDM_Odm);
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Reset: bLinked = %d, bOneEntryOnly = %d\n",
|
||||
pDM_Odm->bLinked, pDM_Odm->bOneEntryOnly));
|
||||
}
|
||||
else
|
||||
{
|
||||
//3 1. CFO Tracking
|
||||
//4 1.1 No new packet
|
||||
if(pCfoTrack->packetCount == pCfoTrack->packetCount_pre)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): packet counter doesn't change\n"));
|
||||
return;
|
||||
}
|
||||
pCfoTrack->packetCount_pre = pCfoTrack->packetCount;
|
||||
|
||||
//4 1.2 Calculate CFO
|
||||
for (i = 0; i < pDM_Odm->num_rf_path; i++) {
|
||||
|
||||
if (pCfoTrack->CFO_cnt[i] == 0)
|
||||
continue;
|
||||
|
||||
valid_path_cnt++;
|
||||
CFO_rpt_sum = (u4Byte)((pCfoTrack->CFO_tail[i] < 0) ? (0 - pCfoTrack->CFO_tail[i]) : pCfoTrack->CFO_tail[i]);
|
||||
CFO_kHz_avg[i] = CFO_HW_RPT_2_MHZ(CFO_rpt_sum) / pCfoTrack->CFO_cnt[i];
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("[Path %d] CFO_rpt_sum = (( %d )), CFO_cnt = (( %d )) , CFO_avg= (( %s%d )) kHz\n",
|
||||
i, CFO_rpt_sum, pCfoTrack->CFO_cnt[i],((pCfoTrack->CFO_tail[i] < 0) ? "-" : " ") ,CFO_kHz_avg[i]));
|
||||
}
|
||||
|
||||
for (i = 0; i < valid_path_cnt; i++) {
|
||||
|
||||
//ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("path [%d], pCfoTrack->CFO_tail = %d\n", i, pCfoTrack->CFO_tail[i]));
|
||||
if (pCfoTrack->CFO_tail[i] < 0) {
|
||||
CFO_ave += (0-(s4Byte)CFO_kHz_avg[i]);
|
||||
//ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("CFO_ave = %d\n", CFO_ave));
|
||||
}
|
||||
else
|
||||
CFO_ave += (s4Byte)CFO_kHz_avg[i];
|
||||
}
|
||||
|
||||
if (valid_path_cnt >= 2)
|
||||
CFO_ave = CFO_ave / valid_path_cnt;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("valid_path_cnt = ((%d)), CFO_ave = ((%d kHz))\n", valid_path_cnt, CFO_ave));
|
||||
|
||||
/*reset counter*/
|
||||
for (i = 0; i < pDM_Odm->num_rf_path; i++) {
|
||||
pCfoTrack->CFO_tail[i] = 0;
|
||||
pCfoTrack->CFO_cnt[i] = 0;
|
||||
}
|
||||
|
||||
//4 1.3 Avoid abnormal large CFO
|
||||
CFO_ave_diff = (pCfoTrack->CFO_ave_pre >= CFO_ave)?(pCfoTrack->CFO_ave_pre - CFO_ave):(CFO_ave - pCfoTrack->CFO_ave_pre);
|
||||
if(CFO_ave_diff > 20 && pCfoTrack->largeCFOHit == 0 && !pCfoTrack->bAdjust)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): first large CFO hit\n"));
|
||||
pCfoTrack->largeCFOHit = 1;
|
||||
return;
|
||||
}
|
||||
else
|
||||
pCfoTrack->largeCFOHit = 0;
|
||||
pCfoTrack->CFO_ave_pre = CFO_ave;
|
||||
|
||||
//4 1.4 Dynamic Xtal threshold
|
||||
if(pCfoTrack->bAdjust == FALSE)
|
||||
{
|
||||
if(CFO_ave > CFO_TH_XTAL_HIGH || CFO_ave < (-CFO_TH_XTAL_HIGH))
|
||||
pCfoTrack->bAdjust = TRUE;
|
||||
}
|
||||
else
|
||||
{
|
||||
if(CFO_ave < CFO_TH_XTAL_LOW && CFO_ave > (-CFO_TH_XTAL_LOW))
|
||||
pCfoTrack->bAdjust = FALSE;
|
||||
}
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
//4 1.5 BT case: Disable CFO tracking
|
||||
if(pDM_Odm->bBtEnabled)
|
||||
{
|
||||
pCfoTrack->bAdjust = FALSE;
|
||||
odm_SetCrystalCap(pDM_Odm, pCfoTrack->DefXCap);
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Disable CFO tracking for BT!!\n"));
|
||||
}
|
||||
/*
|
||||
//4 1.6 Big jump
|
||||
if(pCfoTrack->bAdjust)
|
||||
{
|
||||
if(CFO_ave > CFO_TH_XTAL_LOW)
|
||||
Adjust_Xtal = Adjust_Xtal + ((CFO_ave - CFO_TH_XTAL_LOW) >> 2);
|
||||
else if(CFO_ave < (-CFO_TH_XTAL_LOW))
|
||||
Adjust_Xtal = Adjust_Xtal + ((CFO_TH_XTAL_LOW - CFO_ave) >> 2);
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Crystal cap offset = %d\n", Adjust_Xtal));
|
||||
}
|
||||
*/
|
||||
#endif
|
||||
|
||||
//4 1.7 Adjust Crystal Cap.
|
||||
if(pCfoTrack->bAdjust)
|
||||
{
|
||||
if(CFO_ave > CFO_TH_XTAL_LOW)
|
||||
CrystalCap = CrystalCap + Adjust_Xtal;
|
||||
else if(CFO_ave < (-CFO_TH_XTAL_LOW))
|
||||
CrystalCap = CrystalCap - Adjust_Xtal;
|
||||
|
||||
if(CrystalCap > 0x3f)
|
||||
CrystalCap = 0x3f;
|
||||
else if (CrystalCap < 0)
|
||||
CrystalCap = 0;
|
||||
|
||||
odm_SetCrystalCap(pDM_Odm, (u1Byte)CrystalCap);
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Crystal cap = 0x%x, Default Crystal cap = 0x%x\n",
|
||||
pCfoTrack->CrystalCap, pCfoTrack->DefXCap));
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
if(pDM_Odm->SupportICType & ODM_IC_11AC_SERIES)
|
||||
return;
|
||||
|
||||
//3 2. Dynamic ATC switch
|
||||
if(CFO_ave < CFO_TH_ATC && CFO_ave > -CFO_TH_ATC)
|
||||
{
|
||||
odm_SetATCStatus(pDM_Odm, FALSE);
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Disable ATC!!\n"));
|
||||
}
|
||||
else
|
||||
{
|
||||
odm_SetATCStatus(pDM_Odm, TRUE);
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): Enable ATC!!\n"));
|
||||
}
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
VOID
|
||||
ODM_ParsingCFO(
|
||||
IN PVOID pDM_VOID,
|
||||
IN PVOID pPktinfo_VOID,
|
||||
IN s1Byte* pcfotail,
|
||||
IN u1Byte num_ss
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PODM_PACKET_INFO_T pPktinfo = (PODM_PACKET_INFO_T)pPktinfo_VOID;
|
||||
PCFO_TRACKING pCfoTrack = (PCFO_TRACKING)PhyDM_Get_Structure( pDM_Odm, PHYDM_CFOTRACK);
|
||||
u1Byte i;
|
||||
|
||||
if(!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING))
|
||||
return;
|
||||
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
if(pPktinfo->bPacketMatchBSSID)
|
||||
#else
|
||||
if(pPktinfo->StationID != 0)
|
||||
#endif
|
||||
{
|
||||
if (num_ss > pDM_Odm->num_rf_path) /*For fool proof*/
|
||||
num_ss = pDM_Odm->num_rf_path;
|
||||
|
||||
/*ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("num_ss = ((%d)), pDM_Odm->num_rf_path = ((%d))\n", num_ss, pDM_Odm->num_rf_path));*/
|
||||
|
||||
|
||||
//3 Update CFO report for path-A & path-B
|
||||
// Only paht-A and path-B have CFO tail and short CFO
|
||||
for(i = 0; i < num_ss; i++)
|
||||
{
|
||||
pCfoTrack->CFO_tail[i] += pcfotail[i];
|
||||
pCfoTrack->CFO_cnt[i] ++;
|
||||
/*ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("[ID %d][path %d][Rate 0x%x] CFO_tail = ((%d)), CFO_tail_sum = ((%d)), CFO_cnt = ((%d))\n",
|
||||
pPktinfo->StationID, i, pPktinfo->DataRate, pcfotail[i], pCfoTrack->CFO_tail[i], pCfoTrack->CFO_cnt[i]));
|
||||
*/
|
||||
}
|
||||
|
||||
//3 Update packet counter
|
||||
if(pCfoTrack->packetCount == 0xffffffff)
|
||||
pCfoTrack->packetCount = 0;
|
||||
else
|
||||
pCfoTrack->packetCount++;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,70 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __PHYDMCFOTRACK_H__
|
||||
#define __PHYDMCFOTRACK_H__
|
||||
|
||||
#define CFO_TRACKING_VERSION "1.4" /*2015.10.01 Stanley, Modify for 8822B*/
|
||||
|
||||
#define CFO_TH_XTAL_HIGH 20 // kHz
|
||||
#define CFO_TH_XTAL_LOW 10 // kHz
|
||||
#define CFO_TH_ATC 80 // kHz
|
||||
|
||||
typedef struct _CFO_TRACKING_
|
||||
{
|
||||
BOOLEAN bATCStatus;
|
||||
BOOLEAN largeCFOHit;
|
||||
BOOLEAN bAdjust;
|
||||
u1Byte CrystalCap;
|
||||
u1Byte DefXCap;
|
||||
s4Byte CFO_tail[4];
|
||||
u4Byte CFO_cnt[4];
|
||||
s4Byte CFO_ave_pre;
|
||||
u4Byte packetCount;
|
||||
u4Byte packetCount_pre;
|
||||
|
||||
BOOLEAN bForceXtalCap;
|
||||
BOOLEAN bReset;
|
||||
}CFO_TRACKING, *PCFO_TRACKING;
|
||||
|
||||
VOID
|
||||
ODM_CfoTrackingReset(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
ODM_CfoTrackingInit(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
ODM_CfoTracking(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
ODM_ParsingCFO(
|
||||
IN PVOID pDM_VOID,
|
||||
IN PVOID pPktinfo_VOID,
|
||||
IN s1Byte* pcfotail,
|
||||
IN u1Byte num_ss
|
||||
);
|
||||
|
||||
#endif
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,357 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
|
||||
#ifndef __ODM_DBG_H__
|
||||
#define __ODM_DBG_H__
|
||||
|
||||
/*#define DEBUG_VERSION "1.1"*/ /*2015.07.29 YuChen*/
|
||||
/*#define DEBUG_VERSION "1.2"*/ /*2015.08.28 Dino*/
|
||||
#define DEBUG_VERSION "1.3" /*2016.04.28 YuChen*/
|
||||
//-----------------------------------------------------------------------------
|
||||
// Define the debug levels
|
||||
//
|
||||
// 1. DBG_TRACE and DBG_LOUD are used for normal cases.
|
||||
// So that, they can help SW engineer to develope or trace states changed
|
||||
// and also help HW enginner to trace every operation to and from HW,
|
||||
// e.g IO, Tx, Rx.
|
||||
//
|
||||
// 2. DBG_WARNNING and DBG_SERIOUS are used for unusual or error cases,
|
||||
// which help us to debug SW or HW.
|
||||
//
|
||||
//-----------------------------------------------------------------------------
|
||||
//
|
||||
// Never used in a call to ODM_RT_TRACE()!
|
||||
//
|
||||
#define ODM_DBG_OFF 1
|
||||
|
||||
//
|
||||
// Fatal bug.
|
||||
// For example, Tx/Rx/IO locked up, OS hangs, memory access violation,
|
||||
// resource allocation failed, unexpected HW behavior, HW BUG and so on.
|
||||
//
|
||||
#define ODM_DBG_SERIOUS 2
|
||||
|
||||
//
|
||||
// Abnormal, rare, or unexpeted cases.
|
||||
// For example, IRP/Packet/OID canceled, device suprisely unremoved and so on.
|
||||
//
|
||||
#define ODM_DBG_WARNING 3
|
||||
|
||||
//
|
||||
// Normal case with useful information about current SW or HW state.
|
||||
// For example, Tx/Rx descriptor to fill, Tx/Rx descriptor completed status,
|
||||
// SW protocol state change, dynamic mechanism state change and so on.
|
||||
//
|
||||
#define ODM_DBG_LOUD 4
|
||||
|
||||
//
|
||||
// Normal case with detail execution flow or information.
|
||||
//
|
||||
#define ODM_DBG_TRACE 5
|
||||
|
||||
/*FW DBG MSG*/
|
||||
#define RATE_DECISION BIT0
|
||||
#define INIT_RA_TABLE BIT1
|
||||
#define RATE_UP BIT2
|
||||
#define RATE_DOWN BIT3
|
||||
#define TRY_DONE BIT4
|
||||
#define RA_H2C BIT5
|
||||
#define F_RATE_AP_RPT BIT7
|
||||
|
||||
//-----------------------------------------------------------------------------
|
||||
// Define the tracing components
|
||||
//
|
||||
//-----------------------------------------------------------------------------
|
||||
/*BB FW Functions*/
|
||||
#define PHYDM_FW_COMP_RA BIT0
|
||||
#define PHYDM_FW_COMP_MU BIT1
|
||||
#define PHYDM_FW_COMP_PATH_DIV BIT2
|
||||
#define PHYDM_FW_COMP_PHY_CONFIG BIT3
|
||||
|
||||
|
||||
/*BB Driver Functions*/
|
||||
#define ODM_COMP_DIG BIT0
|
||||
#define ODM_COMP_RA_MASK BIT1
|
||||
#define ODM_COMP_DYNAMIC_TXPWR BIT2
|
||||
#define ODM_COMP_FA_CNT BIT3
|
||||
#define ODM_COMP_RSSI_MONITOR BIT4
|
||||
#define ODM_COMP_SNIFFER BIT5
|
||||
#define ODM_COMP_ANT_DIV BIT6
|
||||
#define ODM_COMP_DFS BIT7
|
||||
#define ODM_COMP_NOISY_DETECT BIT8
|
||||
#define ODM_COMP_RATE_ADAPTIVE BIT9
|
||||
#define ODM_COMP_PATH_DIV BIT10
|
||||
#define ODM_COMP_CCX BIT11
|
||||
|
||||
#define ODM_COMP_DYNAMIC_PRICCA BIT12
|
||||
/*BIT13 TBD*/
|
||||
#define ODM_COMP_MP BIT14
|
||||
#define ODM_COMP_CFO_TRACKING BIT15
|
||||
#define ODM_COMP_ACS BIT16
|
||||
#define PHYDM_COMP_ADAPTIVITY BIT17
|
||||
#define PHYDM_COMP_RA_DBG BIT18
|
||||
#define PHYDM_COMP_TXBF BIT19
|
||||
//MAC Functions
|
||||
#define ODM_COMP_EDCA_TURBO BIT20
|
||||
/*BIT21 TBD*/
|
||||
#define ODM_FW_DEBUG_TRACE BIT22
|
||||
//RF Functions
|
||||
/*BIT23 TBD*/
|
||||
#define ODM_COMP_TX_PWR_TRACK BIT24
|
||||
/*BIT25 TBD*/
|
||||
#define ODM_COMP_CALIBRATION BIT26
|
||||
//Common Functions
|
||||
/*BIT27 TBD*/
|
||||
#define ODM_PHY_CONFIG BIT28
|
||||
#define ODM_COMP_INIT BIT29
|
||||
#define ODM_COMP_COMMON BIT30
|
||||
#define ODM_COMP_API BIT31
|
||||
|
||||
|
||||
/*------------------------Export Marco Definition---------------------------*/
|
||||
|
||||
#define config_phydm_read_txagc_check(data) (data != INVALID_TXAGC_DATA)
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
#define RT_PRINTK DbgPrint
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
#define DbgPrint printk
|
||||
#define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __FUNCTION__, ## args);
|
||||
#define RT_DISP(dbgtype, dbgflag, printstr)
|
||||
#else
|
||||
#define DbgPrint panic_printk
|
||||
#define RT_PRINTK(fmt, args...) DbgPrint( "%s(): " fmt, __FUNCTION__, ## args);
|
||||
#endif
|
||||
|
||||
#ifndef ASSERT
|
||||
#define ASSERT(expr)
|
||||
#endif
|
||||
|
||||
#if DBG
|
||||
#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt) \
|
||||
do { \
|
||||
if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel || level == ODM_DBG_SERIOUS)) \
|
||||
{ \
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8188E) \
|
||||
DbgPrint("[PhyDM-8188E] "); \
|
||||
else if(pDM_Odm->SupportICType == ODM_RTL8192E) \
|
||||
DbgPrint("[PhyDM-8192E] "); \
|
||||
else if(pDM_Odm->SupportICType == ODM_RTL8812) \
|
||||
DbgPrint("[PhyDM-8812A] "); \
|
||||
else if(pDM_Odm->SupportICType == ODM_RTL8821) \
|
||||
DbgPrint("[PhyDM-8821A] "); \
|
||||
else if(pDM_Odm->SupportICType == ODM_RTL8814A) \
|
||||
DbgPrint("[PhyDM-8814A] "); \
|
||||
else if(pDM_Odm->SupportICType == ODM_RTL8703B) \
|
||||
DbgPrint("[PhyDM-8703B] "); \
|
||||
else if(pDM_Odm->SupportICType == ODM_RTL8822B) \
|
||||
DbgPrint("[PhyDM-8822B] "); \
|
||||
else if (pDM_Odm->SupportICType == ODM_RTL8188F) \
|
||||
DbgPrint("[PhyDM-8188F] "); \
|
||||
RT_PRINTK fmt; \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt) \
|
||||
if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \
|
||||
{ \
|
||||
RT_PRINTK fmt; \
|
||||
}
|
||||
|
||||
#define ODM_RT_ASSERT(pDM_Odm, expr, fmt) \
|
||||
if(!(expr)) { \
|
||||
DbgPrint( "Assertion failed! %s at ......\n", #expr); \
|
||||
DbgPrint( " ......%s,%s,line=%d\n",__FILE__,__FUNCTION__,__LINE__); \
|
||||
RT_PRINTK fmt; \
|
||||
ASSERT(FALSE); \
|
||||
}
|
||||
#define ODM_dbg_enter() { DbgPrint("==> %s\n", __FUNCTION__); }
|
||||
#define ODM_dbg_exit() { DbgPrint("<== %s\n", __FUNCTION__); }
|
||||
#define ODM_dbg_trace(str) { DbgPrint("%s:%s\n", __FUNCTION__, str); }
|
||||
|
||||
#define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr) \
|
||||
if(((comp) & pDM_Odm->DebugComponents) && (level <= pDM_Odm->DebugLevel)) \
|
||||
{ \
|
||||
int __i; \
|
||||
pu1Byte __ptr = (pu1Byte)ptr; \
|
||||
DbgPrint("[ODM] "); \
|
||||
DbgPrint(title_str); \
|
||||
DbgPrint(" "); \
|
||||
for( __i=0; __i<6; __i++ ) \
|
||||
DbgPrint("%02X%s", __ptr[__i], (__i==5)?"":"-"); \
|
||||
DbgPrint("\n"); \
|
||||
}
|
||||
#else
|
||||
#define ODM_RT_TRACE(pDM_Odm, comp, level, fmt)
|
||||
#define ODM_RT_TRACE_F(pDM_Odm, comp, level, fmt)
|
||||
#define ODM_RT_ASSERT(pDM_Odm, expr, fmt)
|
||||
#define ODM_dbg_enter()
|
||||
#define ODM_dbg_exit()
|
||||
#define ODM_dbg_trace(str)
|
||||
#define ODM_PRINT_ADDR(pDM_Odm, comp, level, title_str, ptr)
|
||||
#endif
|
||||
|
||||
|
||||
VOID
|
||||
PHYDM_InitDebugSetting(IN PDM_ODM_T pDM_Odm);
|
||||
|
||||
VOID phydm_BasicDbgMessage( IN PVOID pDM_VOID);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
#define PHYDM_DBGPRINT 0
|
||||
#define PHYDM_SSCANF(x, y, z) DCMD_Scanf(x, y, z)
|
||||
#define PHYDM_VAST_INFO_SNPRINTF PHYDM_SNPRINTF
|
||||
#if (PHYDM_DBGPRINT == 1)
|
||||
#define PHYDM_SNPRINTF(msg) \
|
||||
do {\
|
||||
rsprintf msg;\
|
||||
DbgPrint(output);\
|
||||
} while (0)
|
||||
#else
|
||||
#define PHYDM_SNPRINTF(msg) \
|
||||
do {\
|
||||
rsprintf msg;\
|
||||
DCMD_Printf(output);\
|
||||
} while (0)
|
||||
#endif
|
||||
#else
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) || defined(__OSK__)
|
||||
#define PHYDM_DBGPRINT 0
|
||||
#else
|
||||
#define PHYDM_DBGPRINT 1
|
||||
#endif
|
||||
#define MAX_ARGC 20
|
||||
#define MAX_ARGV 16
|
||||
#define DCMD_DECIMAL "%d"
|
||||
#define DCMD_CHAR "%c"
|
||||
#define DCMD_HEX "%x"
|
||||
|
||||
#define PHYDM_SSCANF(x, y, z) sscanf(x, y, z)
|
||||
|
||||
#define PHYDM_VAST_INFO_SNPRINTF(msg)\
|
||||
do {\
|
||||
snprintf msg;\
|
||||
DbgPrint(output);\
|
||||
} while (0)
|
||||
|
||||
#if (PHYDM_DBGPRINT == 1)
|
||||
#define PHYDM_SNPRINTF(msg)\
|
||||
do {\
|
||||
snprintf msg;\
|
||||
DbgPrint(output);\
|
||||
} while (0)
|
||||
#else
|
||||
#define PHYDM_SNPRINTF(msg)\
|
||||
do {\
|
||||
if(out_len > used)\
|
||||
used+=snprintf msg;\
|
||||
} while (0)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
VOID phydm_BasicProfile(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u4Byte *_used,
|
||||
OUT char *output,
|
||||
IN u4Byte *_out_len
|
||||
);
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_AP))
|
||||
s4Byte
|
||||
phydm_cmd(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN char *input,
|
||||
IN u4Byte in_len,
|
||||
IN u1Byte flag,
|
||||
OUT char *output,
|
||||
IN u4Byte out_len
|
||||
);
|
||||
#endif
|
||||
VOID
|
||||
phydm_cmd_parser(
|
||||
IN PDM_ODM_T pDM_Odm,
|
||||
IN char input[][16],
|
||||
IN u4Byte input_num,
|
||||
IN u1Byte flag,
|
||||
OUT char *output,
|
||||
IN u4Byte out_len
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_la_mode_bb_setting(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u4Byte DbgPort,
|
||||
IN BOOLEAN bTriggerEdge,
|
||||
IN u1Byte sampling_rate
|
||||
);
|
||||
|
||||
u1Byte
|
||||
phydm_la_mode_mac_setting(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u4Byte TriggerTime_mu_sec
|
||||
);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
void phydm_sbd_check(
|
||||
IN PDM_ODM_T pDM_Odm
|
||||
);
|
||||
|
||||
void phydm_sbd_callback(
|
||||
PRT_TIMER pTimer
|
||||
);
|
||||
|
||||
void phydm_sbd_workitem_callback(
|
||||
IN PVOID pContext
|
||||
);
|
||||
#endif
|
||||
|
||||
VOID
|
||||
phydm_fw_trace_en_h2c(
|
||||
IN PVOID pDM_VOID,
|
||||
IN BOOLEAN enable,
|
||||
IN u4Byte fw_debug_component,
|
||||
IN u4Byte monitor_mode,
|
||||
IN u4Byte macid
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_fw_trace_handler(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte CmdBuf,
|
||||
IN u1Byte CmdLen
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_fw_trace_handler_code(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte Buffer,
|
||||
IN u1Byte CmdLen
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_fw_trace_handler_8051(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte CmdBuf,
|
||||
IN u1Byte CmdLen
|
||||
);
|
||||
|
||||
#endif // __ODM_DBG_H__
|
||||
|
||||
@@ -0,0 +1,258 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
/*
|
||||
============================================================
|
||||
include files
|
||||
============================================================
|
||||
*/
|
||||
|
||||
#include "mp_precomp.h"
|
||||
#include "phydm_precomp.h"
|
||||
|
||||
#if defined(CONFIG_PHYDM_DFS_MASTER)
|
||||
VOID phydm_radar_detect_reset(PVOID pDM_VOID)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, 0x924 , BIT15, 0);
|
||||
ODM_SetBBReg(pDM_Odm, 0x924 , BIT15, 1);
|
||||
}
|
||||
|
||||
VOID phydm_radar_detect_disable(PVOID pDM_VOID)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, 0x924 , BIT15, 0);
|
||||
}
|
||||
|
||||
static VOID phydm_radar_detect_with_dbg_parm(PVOID pDM_VOID)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, pDM_Odm->radar_detect_reg_918);
|
||||
ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, pDM_Odm->radar_detect_reg_91c);
|
||||
ODM_SetBBReg(pDM_Odm, 0x920, bMaskDWord, pDM_Odm->radar_detect_reg_920);
|
||||
ODM_SetBBReg(pDM_Odm, 0x924, bMaskDWord, pDM_Odm->radar_detect_reg_924);
|
||||
}
|
||||
|
||||
/* Init radar detection parameters, called after ch, bw is set */
|
||||
VOID phydm_radar_detect_enable(PVOID pDM_VOID)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u1Byte region_domain = pDM_Odm->DFS_RegionDomain;
|
||||
u1Byte c_channel = *(pDM_Odm->pChannel);
|
||||
|
||||
if (region_domain == PHYDM_DFS_DOMAIN_UNKNOWN) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DFS, ODM_DBG_LOUD, ("PHYDM_DFS_DOMAIN_UNKNOWN\n"));
|
||||
return;
|
||||
}
|
||||
|
||||
if (pDM_Odm->SupportICType & (ODM_RTL8821 | ODM_RTL8812 | ODM_RTL8881A)) {
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, 0x814, 0x3fffffff, 0x04cc4d10);
|
||||
ODM_SetBBReg(pDM_Odm, 0x834, bMaskByte0, 0x06);
|
||||
|
||||
if (pDM_Odm->radar_detect_dbg_parm_en) {
|
||||
phydm_radar_detect_with_dbg_parm(pDM_Odm);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
if (region_domain == PHYDM_DFS_DOMAIN_ETSI) {
|
||||
ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, 0x1c17ecdf);
|
||||
ODM_SetBBReg(pDM_Odm, 0x924, bMaskDWord, 0x01528500);
|
||||
ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x0fa21a20);
|
||||
ODM_SetBBReg(pDM_Odm, 0x920, bMaskDWord, 0xe0f69204);
|
||||
|
||||
} else if (region_domain == PHYDM_DFS_DOMAIN_MKK) {
|
||||
ODM_SetBBReg(pDM_Odm, 0x924, bMaskDWord, 0x01528500);
|
||||
ODM_SetBBReg(pDM_Odm, 0x920, bMaskDWord, 0xe0d67234);
|
||||
|
||||
if (c_channel >= 52 && c_channel <= 64) {
|
||||
ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, 0x1c16ecdf);
|
||||
ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x0f141a20);
|
||||
} else {
|
||||
ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, 0x1c16acdf);
|
||||
if (pDM_Odm->pBandWidth == ODM_BW20M)
|
||||
ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x64721a20);
|
||||
else
|
||||
ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x68721a20);
|
||||
}
|
||||
|
||||
} else if (region_domain == PHYDM_DFS_DOMAIN_FCC) {
|
||||
ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, 0x1c16acdf);
|
||||
ODM_SetBBReg(pDM_Odm, 0x924, bMaskDWord, 0x01528500);
|
||||
ODM_SetBBReg(pDM_Odm, 0x920, bMaskDWord, 0xe0d67231);
|
||||
if (pDM_Odm->pBandWidth == ODM_BW20M)
|
||||
ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x64741a20);
|
||||
else
|
||||
ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x68741a20);
|
||||
} else {
|
||||
/* not supported */
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DFS, ODM_DBG_LOUD, ("Unsupported DFS_RegionDomain:%d\n", region_domain));
|
||||
}
|
||||
|
||||
} else if (pDM_Odm->SupportICType & (ODM_RTL8814A | ODM_RTL8822B)) {
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, 0x814, 0x3fffffff, 0x04cc4d10);
|
||||
ODM_SetBBReg(pDM_Odm, 0x834, bMaskByte0, 0x06);
|
||||
|
||||
/* 8822B only, when BW = 20M, DFIR output is 40Mhz, but DFS input is 80MMHz, so it need to upgrade to 80MHz */
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8822B) {
|
||||
if (pDM_Odm->pBandWidth == ODM_BW20M)
|
||||
ODM_SetBBReg(pDM_Odm, 0x1984, BIT26, 1);
|
||||
else
|
||||
ODM_SetBBReg(pDM_Odm, 0x1984, BIT26, 0);
|
||||
}
|
||||
|
||||
if (pDM_Odm->radar_detect_dbg_parm_en) {
|
||||
phydm_radar_detect_with_dbg_parm(pDM_Odm);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
if (region_domain == PHYDM_DFS_DOMAIN_ETSI) {
|
||||
ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, 0x1c16acdf);
|
||||
ODM_SetBBReg(pDM_Odm, 0x924, bMaskDWord, 0x095a8500);
|
||||
ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x0fa21a20);
|
||||
ODM_SetBBReg(pDM_Odm, 0x920, bMaskDWord, 0xe0f57204);
|
||||
|
||||
} else if (region_domain == PHYDM_DFS_DOMAIN_MKK) {
|
||||
ODM_SetBBReg(pDM_Odm, 0x924, bMaskDWord, 0x095a8500);
|
||||
ODM_SetBBReg(pDM_Odm, 0x920, bMaskDWord, 0xe0d67234);
|
||||
|
||||
if (c_channel >= 52 && c_channel <= 64) {
|
||||
ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, 0x1c16ecdf);
|
||||
ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x0f141a20);
|
||||
} else {
|
||||
ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, 0x1c166cdf);
|
||||
if (pDM_Odm->pBandWidth == ODM_BW20M)
|
||||
ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x64721a20);
|
||||
else
|
||||
ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x68721a20);
|
||||
}
|
||||
} else if (region_domain == PHYDM_DFS_DOMAIN_FCC) {
|
||||
ODM_SetBBReg(pDM_Odm, 0x918, bMaskDWord, 0x1c166cdf);
|
||||
ODM_SetBBReg(pDM_Odm, 0x924, bMaskDWord, 0x095a8500);
|
||||
ODM_SetBBReg(pDM_Odm, 0x920, bMaskDWord, 0xe0d67231);
|
||||
if (pDM_Odm->pBandWidth == ODM_BW20M)
|
||||
ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x64741a20);
|
||||
else
|
||||
ODM_SetBBReg(pDM_Odm, 0x91c, bMaskDWord, 0x68741a20);
|
||||
} else {
|
||||
/* not supported */
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DFS, ODM_DBG_LOUD, ("Unsupported DFS_RegionDomain:%d\n", region_domain));
|
||||
}
|
||||
} else {
|
||||
/* not supported IC type*/
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DFS, ODM_DBG_LOUD, ("Unsupported IC Type:%d\n", pDM_Odm->SupportICType));
|
||||
}
|
||||
|
||||
exit:
|
||||
phydm_radar_detect_reset(pDM_Odm);
|
||||
}
|
||||
|
||||
BOOLEAN phydm_radar_detect(PVOID pDM_VOID)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
BOOLEAN enable_DFS = FALSE;
|
||||
BOOLEAN radar_detected = FALSE;
|
||||
u1Byte region_domain = pDM_Odm->DFS_RegionDomain;
|
||||
|
||||
if (region_domain == PHYDM_DFS_DOMAIN_UNKNOWN) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DFS, ODM_DBG_LOUD, ("PHYDM_DFS_DOMAIN_UNKNOWN\n"));
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
if (ODM_GetBBReg(pDM_Odm , 0x924, BIT15))
|
||||
enable_DFS = TRUE;
|
||||
|
||||
if ((ODM_GetBBReg(pDM_Odm , 0xf98, BIT17))
|
||||
|| (!(region_domain == PHYDM_DFS_DOMAIN_ETSI) && (ODM_GetBBReg(pDM_Odm , 0xf98, BIT19))))
|
||||
radar_detected = TRUE;
|
||||
|
||||
if (enable_DFS && radar_detected) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DFS, ODM_DBG_LOUD
|
||||
, ("Radar detect: enable_DFS:%d, radar_detected:%d\n"
|
||||
, enable_DFS, radar_detected));
|
||||
|
||||
phydm_radar_detect_reset(pDM_Odm);
|
||||
}
|
||||
|
||||
exit:
|
||||
return (enable_DFS && radar_detected);
|
||||
}
|
||||
#endif /* defined(CONFIG_PHYDM_DFS_MASTER) */
|
||||
|
||||
BOOLEAN
|
||||
phydm_dfs_master_enabled(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
#ifdef CONFIG_PHYDM_DFS_MASTER
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
|
||||
return *pDM_Odm->dfs_master_enabled ? TRUE : FALSE;
|
||||
#else
|
||||
return FALSE;
|
||||
#endif
|
||||
}
|
||||
|
||||
VOID
|
||||
phydm_dfs_debug(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u4Byte *const argv,
|
||||
IN u4Byte *_used,
|
||||
OUT char *output,
|
||||
IN u4Byte *_out_len
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u4Byte used = *_used;
|
||||
u4Byte out_len = *_out_len;
|
||||
|
||||
switch (argv[0]) {
|
||||
case 1:
|
||||
#if defined(CONFIG_PHYDM_DFS_MASTER)
|
||||
/* set dbg parameters for radar detection instead of the default value */
|
||||
if (argv[1] == 1) {
|
||||
pDM_Odm->radar_detect_reg_918 = argv[2];
|
||||
pDM_Odm->radar_detect_reg_91c = argv[3];
|
||||
pDM_Odm->radar_detect_reg_920 = argv[4];
|
||||
pDM_Odm->radar_detect_reg_924 = argv[5];
|
||||
pDM_Odm->radar_detect_dbg_parm_en = 1;
|
||||
|
||||
PHYDM_SNPRINTF((output+used, out_len-used, "Radar detection with dbg parameter\n"));
|
||||
PHYDM_SNPRINTF((output+used, out_len-used, "reg918:0x%08X\n", pDM_Odm->radar_detect_reg_918));
|
||||
PHYDM_SNPRINTF((output+used, out_len-used, "reg91c:0x%08X\n", pDM_Odm->radar_detect_reg_91c));
|
||||
PHYDM_SNPRINTF((output+used, out_len-used, "reg920:0x%08X\n", pDM_Odm->radar_detect_reg_920));
|
||||
PHYDM_SNPRINTF((output+used, out_len-used, "reg924:0x%08X\n", pDM_Odm->radar_detect_reg_924));
|
||||
} else {
|
||||
pDM_Odm->radar_detect_dbg_parm_en = 0;
|
||||
PHYDM_SNPRINTF((output+used, out_len-used, "Radar detection with default parameter\n"));
|
||||
}
|
||||
phydm_radar_detect_enable(pDM_Odm);
|
||||
#endif /* defined(CONFIG_PHYDM_DFS_MASTER) */
|
||||
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -0,0 +1,76 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __PHYDM_DFS_H__
|
||||
#define __PHYDM_DFS_H__
|
||||
|
||||
#define DFS_VERSION "0.0"
|
||||
|
||||
/* ============================================================
|
||||
Definition
|
||||
============================================================
|
||||
*/
|
||||
|
||||
/*
|
||||
============================================================
|
||||
1 structure
|
||||
============================================================
|
||||
*/
|
||||
|
||||
/* ============================================================
|
||||
enumeration
|
||||
============================================================
|
||||
*/
|
||||
|
||||
typedef enum _tag_PhyDM_DFS_REGION_DOMAIN {
|
||||
PHYDM_DFS_DOMAIN_UNKNOWN = 0,
|
||||
PHYDM_DFS_DOMAIN_FCC = 1,
|
||||
PHYDM_DFS_DOMAIN_MKK = 2,
|
||||
PHYDM_DFS_DOMAIN_ETSI = 3,
|
||||
} PHYDM_DFS_REGION_DOMAIN;
|
||||
|
||||
/*
|
||||
============================================================
|
||||
function prototype
|
||||
============================================================
|
||||
*/
|
||||
#if defined(CONFIG_PHYDM_DFS_MASTER)
|
||||
VOID phydm_radar_detect_reset(PVOID pDM_VOID);
|
||||
VOID phydm_radar_detect_disable(PVOID pDM_VOID);
|
||||
VOID phydm_radar_detect_enable(PVOID pDM_VOID);
|
||||
BOOLEAN phydm_radar_detect(PVOID pDM_VOID);
|
||||
#endif /* defined(CONFIG_PHYDM_DFS_MASTER) */
|
||||
|
||||
BOOLEAN
|
||||
phydm_dfs_master_enabled(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
phydm_dfs_debug(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u4Byte *const argv,
|
||||
IN u4Byte *_used,
|
||||
OUT char *output,
|
||||
IN u4Byte *_out_len
|
||||
);
|
||||
|
||||
#endif /*#ifndef __PHYDM_DFS_H__ */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,370 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __PHYDMDIG_H__
|
||||
#define __PHYDMDIG_H__
|
||||
|
||||
#define DIG_VERSION "1.24" /* 2016.06.01 Stanley. Modify IGI setting for 1R-CCA path-B */
|
||||
|
||||
/* Pause DIG & CCKPD */
|
||||
#define DM_DIG_MAX_PAUSE_TYPE 0x7
|
||||
|
||||
typedef enum tag_DIG_GoUpCheck_Level {
|
||||
|
||||
DIG_GOUPCHECK_LEVEL_0,
|
||||
DIG_GOUPCHECK_LEVEL_1,
|
||||
DIG_GOUPCHECK_LEVEL_2
|
||||
|
||||
} DIG_GOUPCHECK_LEVEL;
|
||||
|
||||
typedef struct _Dynamic_Initial_Gain_Threshold_
|
||||
{
|
||||
BOOLEAN bStopDIG; // for debug
|
||||
BOOLEAN bIgnoreDIG;
|
||||
BOOLEAN bPSDInProgress;
|
||||
|
||||
u1Byte Dig_Enable_Flag;
|
||||
u1Byte Dig_Ext_Port_Stage;
|
||||
|
||||
int RssiLowThresh;
|
||||
int RssiHighThresh;
|
||||
|
||||
u4Byte FALowThresh;
|
||||
u4Byte FAHighThresh;
|
||||
|
||||
u1Byte CurSTAConnectState;
|
||||
u1Byte PreSTAConnectState;
|
||||
u1Byte CurMultiSTAConnectState;
|
||||
|
||||
u1Byte PreIGValue;
|
||||
u1Byte CurIGValue;
|
||||
u1Byte BackupIGValue; //MP DIG
|
||||
u1Byte BT30_CurIGI;
|
||||
u1Byte IGIBackup;
|
||||
|
||||
s1Byte BackoffVal;
|
||||
s1Byte BackoffVal_range_max;
|
||||
s1Byte BackoffVal_range_min;
|
||||
u1Byte rx_gain_range_max;
|
||||
u1Byte rx_gain_range_min;
|
||||
u1Byte Rssi_val_min;
|
||||
|
||||
u1Byte PreCCK_CCAThres;
|
||||
u1Byte CurCCK_CCAThres;
|
||||
u1Byte PreCCKPDState;
|
||||
u1Byte CurCCKPDState;
|
||||
u1Byte CCKPDBackup;
|
||||
u1Byte pause_cckpd_level;
|
||||
u1Byte pause_cckpd_value[DM_DIG_MAX_PAUSE_TYPE + 1];
|
||||
|
||||
u1Byte LargeFAHit;
|
||||
u1Byte LargeFA_Timeout; /*if (LargeFAHit), monitor "LargeFA_Timeout" sec, if timeout, LargeFAHit=0*/
|
||||
u1Byte ForbiddenIGI;
|
||||
u4Byte Recover_cnt;
|
||||
|
||||
u1Byte DIG_Dynamic_MIN_0;
|
||||
u1Byte DIG_Dynamic_MIN_1;
|
||||
BOOLEAN bMediaConnect_0;
|
||||
BOOLEAN bMediaConnect_1;
|
||||
|
||||
u4Byte AntDiv_RSSI_max;
|
||||
u4Byte RSSI_max;
|
||||
|
||||
u1Byte *bP2PInProcess;
|
||||
|
||||
u1Byte pause_dig_level;
|
||||
u1Byte pause_dig_value[DM_DIG_MAX_PAUSE_TYPE + 1];
|
||||
|
||||
u4Byte cckFaMa;
|
||||
DIG_GOUPCHECK_LEVEL DIG_GoUpCheck_Level;
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
|
||||
BOOLEAN bTpTarget;
|
||||
BOOLEAN bNoiseEst;
|
||||
u4Byte TpTrainTH_min;
|
||||
u1Byte IGIOffset_A;
|
||||
u1Byte IGIOffset_B;
|
||||
#endif
|
||||
|
||||
#if (RTL8822B_SUPPORT == 1 || RTL8197F_SUPPORT == 1 || RTL8821C_SUPPORT == 1)
|
||||
u1Byte rfGainIdx;
|
||||
u1Byte agcTableIdx;
|
||||
u1Byte bigJumpLmt[16];
|
||||
u1Byte enableAdjustBigJump:1;
|
||||
u1Byte bigJumpStep1:3;
|
||||
u1Byte bigJumpStep2:2;
|
||||
u1Byte bigJumpStep3:2;
|
||||
#endif
|
||||
}DIG_T,*pDIG_T;
|
||||
|
||||
typedef struct _FALSE_ALARM_STATISTICS{
|
||||
u4Byte Cnt_Parity_Fail;
|
||||
u4Byte Cnt_Rate_Illegal;
|
||||
u4Byte Cnt_Crc8_fail;
|
||||
u4Byte Cnt_Mcs_fail;
|
||||
u4Byte Cnt_Ofdm_fail;
|
||||
u4Byte Cnt_Ofdm_fail_pre; //For RTL8881A
|
||||
u4Byte Cnt_Cck_fail;
|
||||
u4Byte Cnt_all;
|
||||
u4Byte Cnt_all_pre;
|
||||
u4Byte Cnt_Fast_Fsync;
|
||||
u4Byte Cnt_SB_Search_fail;
|
||||
u4Byte Cnt_OFDM_CCA;
|
||||
u4Byte Cnt_CCK_CCA;
|
||||
u4Byte Cnt_CCA_all;
|
||||
u4Byte Cnt_BW_USC; //Gary
|
||||
u4Byte Cnt_BW_LSC; //Gary
|
||||
u4Byte cnt_cck_crc32_error;
|
||||
u4Byte cnt_cck_crc32_ok;
|
||||
u4Byte cnt_ofdm_crc32_error;
|
||||
u4Byte cnt_ofdm_crc32_ok;
|
||||
u4Byte cnt_ht_crc32_error;
|
||||
u4Byte cnt_ht_crc32_ok;
|
||||
u4Byte cnt_vht_crc32_error;
|
||||
u4Byte cnt_vht_crc32_ok;
|
||||
u4Byte cnt_crc32_error_all;
|
||||
u4Byte cnt_crc32_ok_all;
|
||||
BOOLEAN cck_block_enable;
|
||||
BOOLEAN ofdm_block_enable;
|
||||
u4Byte dbg_port0;
|
||||
BOOLEAN edcca_flag;
|
||||
}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS;
|
||||
|
||||
typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition
|
||||
{
|
||||
DIG_TYPE_THRESH_HIGH = 0,
|
||||
DIG_TYPE_THRESH_LOW = 1,
|
||||
DIG_TYPE_BACKOFF = 2,
|
||||
DIG_TYPE_RX_GAIN_MIN = 3,
|
||||
DIG_TYPE_RX_GAIN_MAX = 4,
|
||||
DIG_TYPE_ENABLE = 5,
|
||||
DIG_TYPE_DISABLE = 6,
|
||||
DIG_OP_TYPE_MAX
|
||||
}DM_DIG_OP_E;
|
||||
|
||||
/*
|
||||
typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition
|
||||
{
|
||||
CCK_PD_STAGE_LowRssi = 0,
|
||||
CCK_PD_STAGE_HighRssi = 1,
|
||||
CCK_PD_STAGE_MAX = 3,
|
||||
}DM_CCK_PDTH_E;
|
||||
|
||||
typedef enum tag_DIG_EXT_PORT_ALGO_Definition
|
||||
{
|
||||
DIG_EXT_PORT_STAGE_0 = 0,
|
||||
DIG_EXT_PORT_STAGE_1 = 1,
|
||||
DIG_EXT_PORT_STAGE_2 = 2,
|
||||
DIG_EXT_PORT_STAGE_3 = 3,
|
||||
DIG_EXT_PORT_STAGE_MAX = 4,
|
||||
}DM_DIG_EXT_PORT_ALG_E;
|
||||
|
||||
typedef enum tag_DIG_Connect_Definition
|
||||
{
|
||||
DIG_STA_DISCONNECT = 0,
|
||||
DIG_STA_CONNECT = 1,
|
||||
DIG_STA_BEFORE_CONNECT = 2,
|
||||
DIG_MultiSTA_DISCONNECT = 3,
|
||||
DIG_MultiSTA_CONNECT = 4,
|
||||
DIG_CONNECT_MAX
|
||||
}DM_DIG_CONNECT_E;
|
||||
|
||||
|
||||
#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;}
|
||||
|
||||
#define DM_MultiSTA_InitGainChangeNotify_CONNECT(_ADAPTER) \
|
||||
DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_CONNECT)
|
||||
|
||||
#define DM_MultiSTA_InitGainChangeNotify_DISCONNECT(_ADAPTER) \
|
||||
DM_MultiSTA_InitGainChangeNotify(DIG_MultiSTA_DISCONNECT)
|
||||
*/
|
||||
|
||||
typedef enum tag_PHYDM_Pause_Type {
|
||||
PHYDM_PAUSE = BIT0,
|
||||
PHYDM_RESUME = BIT1
|
||||
} PHYDM_PAUSE_TYPE;
|
||||
|
||||
typedef enum tag_PHYDM_Pause_Level {
|
||||
/* number of pause level can't exceed DM_DIG_MAX_PAUSE_TYPE */
|
||||
PHYDM_PAUSE_LEVEL_0 = 0,
|
||||
PHYDM_PAUSE_LEVEL_1 = 1,
|
||||
PHYDM_PAUSE_LEVEL_2 = 2,
|
||||
PHYDM_PAUSE_LEVEL_3 = 3,
|
||||
PHYDM_PAUSE_LEVEL_4 = 4,
|
||||
PHYDM_PAUSE_LEVEL_5 = 5,
|
||||
PHYDM_PAUSE_LEVEL_6 = 6,
|
||||
PHYDM_PAUSE_LEVEL_7 = DM_DIG_MAX_PAUSE_TYPE /* maximum level */
|
||||
} PHYDM_PAUSE_LEVEL;
|
||||
|
||||
#define DM_DIG_THRESH_HIGH 40
|
||||
#define DM_DIG_THRESH_LOW 35
|
||||
|
||||
#define DM_FALSEALARM_THRESH_LOW 400
|
||||
#define DM_FALSEALARM_THRESH_HIGH 1000
|
||||
|
||||
#define DM_DIG_MAX_NIC 0x3e
|
||||
#define DM_DIG_MIN_NIC 0x20
|
||||
#define DM_DIG_MAX_OF_MIN_NIC 0x3e
|
||||
|
||||
#define DM_DIG_MAX_AP 0x3e
|
||||
#define DM_DIG_MIN_AP 0x20
|
||||
#define DM_DIG_MAX_OF_MIN 0x2A //0x32
|
||||
#define DM_DIG_MIN_AP_DFS 0x20
|
||||
|
||||
#define DM_DIG_MAX_NIC_HP 0x46
|
||||
#define DM_DIG_MIN_NIC_HP 0x2e
|
||||
|
||||
#define DM_DIG_MAX_AP_HP 0x42
|
||||
#define DM_DIG_MIN_AP_HP 0x30
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
|
||||
#define DM_DIG_MAX_AP_COVERAGR 0x26
|
||||
#define DM_DIG_MIN_AP_COVERAGE 0x1c
|
||||
#define DM_DIG_MAX_OF_MIN_COVERAGE 0x22
|
||||
|
||||
#define DM_DIG_TP_Target_TH0 500
|
||||
#define DM_DIG_TP_Target_TH1 1000
|
||||
#define DM_DIG_TP_Training_Period 10
|
||||
#endif
|
||||
|
||||
//vivi 92c&92d has different definition, 20110504
|
||||
//this is for 92c
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_CE)
|
||||
#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV
|
||||
#define DM_DIG_FA_TH0 0x80//0x20
|
||||
#else
|
||||
#define DM_DIG_FA_TH0 0x200//0x20
|
||||
#endif
|
||||
#else
|
||||
#define DM_DIG_FA_TH0 0x200//0x20
|
||||
#endif
|
||||
|
||||
#define DM_DIG_FA_TH1 0x300
|
||||
#define DM_DIG_FA_TH2 0x400
|
||||
//this is for 92d
|
||||
#define DM_DIG_FA_TH0_92D 0x100
|
||||
#define DM_DIG_FA_TH1_92D 0x400
|
||||
#define DM_DIG_FA_TH2_92D 0x600
|
||||
|
||||
#define DM_DIG_BACKOFF_MAX 12
|
||||
#define DM_DIG_BACKOFF_MIN -4
|
||||
#define DM_DIG_BACKOFF_DEFAULT 10
|
||||
|
||||
#define DM_DIG_FA_TH0_LPS 4 //-> 4 in lps
|
||||
#define DM_DIG_FA_TH1_LPS 15 //-> 15 lps
|
||||
#define DM_DIG_FA_TH2_LPS 30 //-> 30 lps
|
||||
#define RSSI_OFFSET_DIG 0x05
|
||||
#define LARGE_FA_TIMEOUT 60
|
||||
|
||||
|
||||
VOID
|
||||
ODM_ChangeDynamicInitGainThresh(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u4Byte DM_Type,
|
||||
IN u4Byte DM_Value
|
||||
);
|
||||
|
||||
VOID
|
||||
ODM_Write_DIG(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte CurrentIGI
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_PauseDIG(
|
||||
IN PVOID pDM_VOID,
|
||||
IN PHYDM_PAUSE_TYPE PauseType,
|
||||
IN PHYDM_PAUSE_LEVEL pause_level,
|
||||
IN u1Byte IGIValue
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_DIGInit(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_DIG(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_DIGbyRSSI_LPS(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_FalseAlarmCounterStatistics(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_PauseCCKPacketDetection(
|
||||
IN PVOID pDM_VOID,
|
||||
IN PHYDM_PAUSE_TYPE PauseType,
|
||||
IN PHYDM_PAUSE_LEVEL pause_level,
|
||||
IN u1Byte CCKPDThreshold
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_CCKPacketDetectionThresh(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
ODM_Write_CCK_CCA_Thres(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte CurCCK_CCAThres
|
||||
);
|
||||
|
||||
BOOLEAN
|
||||
phydm_DIG_GoUpCheck(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
VOID
|
||||
odm_MPT_DIGCallback(
|
||||
PRT_TIMER pTimer
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_MPT_DIGWorkItemCallback(
|
||||
IN PVOID pContext
|
||||
);
|
||||
|
||||
#endif
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_AP))
|
||||
VOID
|
||||
odm_MPT_DIGCallback(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
#endif
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE != ODM_CE)
|
||||
VOID
|
||||
ODM_MPT_DIG(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,124 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
//============================================================
|
||||
// include files
|
||||
//============================================================
|
||||
#include "mp_precomp.h"
|
||||
#include "phydm_precomp.h"
|
||||
|
||||
#if (defined(CONFIG_BB_POWER_SAVING))
|
||||
|
||||
VOID
|
||||
odm_DynamicBBPowerSavingInit(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable;
|
||||
|
||||
pDM_PSTable->PreCCAState = CCA_MAX;
|
||||
pDM_PSTable->CurCCAState = CCA_MAX;
|
||||
pDM_PSTable->PreRFState = RF_MAX;
|
||||
pDM_PSTable->CurRFState = RF_MAX;
|
||||
pDM_PSTable->Rssi_val_min = 0;
|
||||
pDM_PSTable->initialize = 0;
|
||||
}
|
||||
|
||||
void
|
||||
ODM_RF_Saving(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte bForceInNormal
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
#if (DM_ODM_SUPPORT_TYPE != ODM_AP)
|
||||
pPS_T pDM_PSTable = &pDM_Odm->DM_PSTable;
|
||||
u1Byte Rssi_Up_bound = 30 ;
|
||||
u1Byte Rssi_Low_bound = 25;
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
if(pDM_Odm->PatchID == 40 ) //RT_CID_819x_FUNAI_TV
|
||||
{
|
||||
Rssi_Up_bound = 50 ;
|
||||
Rssi_Low_bound = 45;
|
||||
}
|
||||
#endif
|
||||
if(pDM_PSTable->initialize == 0){
|
||||
|
||||
pDM_PSTable->Reg874 = (ODM_GetBBReg(pDM_Odm, 0x874, bMaskDWord)&0x1CC000)>>14;
|
||||
pDM_PSTable->RegC70 = (ODM_GetBBReg(pDM_Odm, 0xc70, bMaskDWord)&BIT3)>>3;
|
||||
pDM_PSTable->Reg85C = (ODM_GetBBReg(pDM_Odm, 0x85c, bMaskDWord)&0xFF000000)>>24;
|
||||
pDM_PSTable->RegA74 = (ODM_GetBBReg(pDM_Odm, 0xa74, bMaskDWord)&0xF000)>>12;
|
||||
//Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord);
|
||||
pDM_PSTable->initialize = 1;
|
||||
}
|
||||
|
||||
if(!bForceInNormal)
|
||||
{
|
||||
if(pDM_Odm->RSSI_Min != 0xFF)
|
||||
{
|
||||
if(pDM_PSTable->PreRFState == RF_Normal)
|
||||
{
|
||||
if(pDM_Odm->RSSI_Min >= Rssi_Up_bound)
|
||||
pDM_PSTable->CurRFState = RF_Save;
|
||||
else
|
||||
pDM_PSTable->CurRFState = RF_Normal;
|
||||
}
|
||||
else{
|
||||
if(pDM_Odm->RSSI_Min <= Rssi_Low_bound)
|
||||
pDM_PSTable->CurRFState = RF_Normal;
|
||||
else
|
||||
pDM_PSTable->CurRFState = RF_Save;
|
||||
}
|
||||
}
|
||||
else
|
||||
pDM_PSTable->CurRFState=RF_MAX;
|
||||
}
|
||||
else
|
||||
{
|
||||
pDM_PSTable->CurRFState = RF_Normal;
|
||||
}
|
||||
|
||||
if(pDM_PSTable->PreRFState != pDM_PSTable->CurRFState)
|
||||
{
|
||||
if(pDM_PSTable->CurRFState == RF_Save)
|
||||
{
|
||||
ODM_SetBBReg(pDM_Odm, 0x874 , 0x1C0000, 0x2); //Reg874[20:18]=3'b010
|
||||
ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, 0); //RegC70[3]=1'b0
|
||||
ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, 0x63); //Reg85C[31:24]=0x63
|
||||
ODM_SetBBReg(pDM_Odm, 0x874, 0xC000, 0x2); //Reg874[15:14]=2'b10
|
||||
ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, 0x3); //RegA75[7:4]=0x3
|
||||
ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x0); //Reg818[28]=1'b0
|
||||
ODM_SetBBReg(pDM_Odm, 0x818, BIT28, 0x1); //Reg818[28]=1'b1
|
||||
}
|
||||
else
|
||||
{
|
||||
ODM_SetBBReg(pDM_Odm, 0x874 , 0x1CC000, pDM_PSTable->Reg874);
|
||||
ODM_SetBBReg(pDM_Odm, 0xc70, BIT3, pDM_PSTable->RegC70);
|
||||
ODM_SetBBReg(pDM_Odm, 0x85c, 0xFF000000, pDM_PSTable->Reg85C);
|
||||
ODM_SetBBReg(pDM_Odm, 0xa74, 0xF000, pDM_PSTable->RegA74);
|
||||
ODM_SetBBReg(pDM_Odm,0x818, BIT28, 0x0);
|
||||
}
|
||||
pDM_PSTable->PreRFState =pDM_PSTable->CurRFState;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,58 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __PHYDMDYNAMICBBPOWERSAVING_H__
|
||||
#define __PHYDMDYNAMICBBPOWERSAVING_H__
|
||||
|
||||
#define DYNAMIC_BBPWRSAV_VERSION "1.1"
|
||||
|
||||
#if (defined(CONFIG_BB_POWER_SAVING))
|
||||
|
||||
typedef struct _Dynamic_Power_Saving_
|
||||
{
|
||||
u1Byte PreCCAState;
|
||||
u1Byte CurCCAState;
|
||||
|
||||
u1Byte PreRFState;
|
||||
u1Byte CurRFState;
|
||||
|
||||
int Rssi_val_min;
|
||||
|
||||
u1Byte initialize;
|
||||
u4Byte Reg874,RegC70,Reg85C,RegA74;
|
||||
|
||||
}PS_T,*pPS_T;
|
||||
|
||||
#define dm_RF_Saving ODM_RF_Saving
|
||||
|
||||
void ODM_RF_Saving(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte bForceInNormal
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_DynamicBBPowerSavingInit(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
#else
|
||||
#define dm_RF_Saving(pDM_VOID, bForceInNormal)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,542 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
//============================================================
|
||||
// include files
|
||||
//============================================================
|
||||
#include "mp_precomp.h"
|
||||
#include "phydm_precomp.h"
|
||||
|
||||
VOID
|
||||
odm_DynamicTxPowerInit(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
PADAPTER Adapter = pDM_Odm->Adapter;
|
||||
PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
||||
|
||||
/*if (!IS_HARDWARE_TYPE_8814A(Adapter)) {*/
|
||||
/* ODM_RT_TRACE(pDM_Odm,ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, */
|
||||
/* ("odm_DynamicTxPowerInit DynamicTxPowerEnable=%d\n", pMgntInfo->bDynamicTxPowerEnable));*/
|
||||
/* return;*/
|
||||
/*} else*/
|
||||
{
|
||||
pMgntInfo->bDynamicTxPowerEnable = TRUE;
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD,
|
||||
("odm_DynamicTxPowerInit DynamicTxPowerEnable=%d\n", pMgntInfo->bDynamicTxPowerEnable));
|
||||
}
|
||||
|
||||
#if DEV_BUS_TYPE==RT_USB_INTERFACE
|
||||
if(RT_GetInterfaceSelection(Adapter) == INTF_SEL1_USB_High_Power)
|
||||
{
|
||||
odm_DynamicTxPowerSavePowerIndex(pDM_Odm);
|
||||
pMgntInfo->bDynamicTxPowerEnable = TRUE;
|
||||
}
|
||||
else
|
||||
#else
|
||||
//so 92c pci do not need dynamic tx power? vivi check it later
|
||||
pMgntInfo->bDynamicTxPowerEnable = FALSE;
|
||||
#endif
|
||||
|
||||
|
||||
pHalData->LastDTPLvl = TxHighPwrLevel_Normal;
|
||||
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
|
||||
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
|
||||
pDM_Odm->LastDTPLvl = TxHighPwrLevel_Normal;
|
||||
pDM_Odm->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
|
||||
pDM_Odm->tx_agc_ofdm_18_6 = ODM_GetBBReg(pDM_Odm, 0xC24, bMaskDWord); /*TXAGC {18M 12M 9M 6M}*/
|
||||
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
VOID
|
||||
odm_DynamicTxPowerSavePowerIndex(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))
|
||||
u1Byte index;
|
||||
u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
PADAPTER Adapter = pDM_Odm->Adapter;
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
||||
for(index = 0; index< 6; index++)
|
||||
pHalData->PowerIndex_backup[index] = PlatformEFIORead1Byte(Adapter, Power_Index_REG[index]);
|
||||
|
||||
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
VOID
|
||||
odm_DynamicTxPowerRestorePowerIndex(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE|ODM_WIN))
|
||||
u1Byte index;
|
||||
PADAPTER Adapter = pDM_Odm->Adapter;
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
||||
u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
for(index = 0; index< 6; index++)
|
||||
PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], pHalData->PowerIndex_backup[index]);
|
||||
|
||||
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
VOID
|
||||
odm_DynamicTxPowerWritePowerIndex(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Value)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u1Byte index;
|
||||
u4Byte Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a};
|
||||
|
||||
for(index = 0; index< 6; index++)
|
||||
//PlatformEFIOWrite1Byte(Adapter, Power_Index_REG[index], Value);
|
||||
ODM_Write1Byte(pDM_Odm, Power_Index_REG[index], Value);
|
||||
|
||||
}
|
||||
|
||||
VOID
|
||||
odm_DynamicTxPowerNIC_CE(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
|
||||
#if (RTL8821A_SUPPORT == 1)
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
u1Byte val;
|
||||
u1Byte rssi_tmp = pDM_Odm->RSSI_Min;
|
||||
|
||||
if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR))
|
||||
return;
|
||||
|
||||
if (rssi_tmp >= TX_POWER_NEAR_FIELD_THRESH_LVL2) {
|
||||
pDM_Odm->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2;
|
||||
/**/
|
||||
} else if (rssi_tmp >= TX_POWER_NEAR_FIELD_THRESH_LVL1) {
|
||||
pDM_Odm->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
|
||||
/**/
|
||||
} else if (rssi_tmp < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) {
|
||||
pDM_Odm->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
|
||||
/**/
|
||||
}
|
||||
|
||||
if (pDM_Odm->LastDTPLvl != pDM_Odm->DynamicTxHighPowerLvl) {
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, ODM_DBG_LOUD, ("update_DTP_lv: ((%d)) -> ((%d))\n", pDM_Odm->LastDTPLvl, pDM_Odm->DynamicTxHighPowerLvl));
|
||||
|
||||
pDM_Odm->LastDTPLvl = pDM_Odm->DynamicTxHighPowerLvl;
|
||||
|
||||
if (pDM_Odm->SupportICType & (ODM_RTL8821)) {
|
||||
|
||||
if (pDM_Odm->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) {
|
||||
|
||||
ODM_SetMACReg(pDM_Odm, 0x6D8, BIT20|BIT19|BIT18, 1); /* Resp TXAGC offset = -3dB*/
|
||||
|
||||
val = pDM_Odm->tx_agc_ofdm_18_6 & 0xff;
|
||||
if (val >= 0x20)
|
||||
val -= 0x16;
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, 0xC24, 0xff, val);
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, ODM_DBG_LOUD, ("Set TX power: level 2\n"));
|
||||
} else if (pDM_Odm->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) {
|
||||
|
||||
ODM_SetMACReg(pDM_Odm, 0x6D8, BIT20|BIT19|BIT18, 1); /* Resp TXAGC offset = -3dB*/
|
||||
|
||||
val = pDM_Odm->tx_agc_ofdm_18_6 & 0xff;
|
||||
if (val >= 0x20)
|
||||
val -= 0x10;
|
||||
|
||||
ODM_SetBBReg(pDM_Odm, 0xC24, 0xff, val);
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, ODM_DBG_LOUD, ("Set TX power: level 1\n"));
|
||||
} else if (pDM_Odm->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) {
|
||||
|
||||
ODM_SetMACReg(pDM_Odm, 0x6D8, BIT20|BIT19|BIT18, 0); /* Resp TXAGC offset = 0dB*/
|
||||
ODM_SetBBReg(pDM_Odm, 0xC24, bMaskDWord, pDM_Odm->tx_agc_ofdm_18_6);
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, ODM_DBG_LOUD, ("Set TX power: normal\n"));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
VOID
|
||||
odm_DynamicTxPower(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
//
|
||||
// For AP/ADSL use prtl8192cd_priv
|
||||
// For CE/NIC use PADAPTER
|
||||
//
|
||||
//PADAPTER pAdapter = pDM_Odm->Adapter;
|
||||
// prtl8192cd_priv priv = pDM_Odm->priv;
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR))
|
||||
return;
|
||||
//
|
||||
// 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
|
||||
// at the same time. In the stage2/3, we need to prive universal interface and merge all
|
||||
// HW dynamic mechanism.
|
||||
//
|
||||
switch (pDM_Odm->SupportPlatform)
|
||||
{
|
||||
case ODM_WIN:
|
||||
odm_DynamicTxPowerNIC(pDM_Odm);
|
||||
break;
|
||||
case ODM_CE:
|
||||
odm_DynamicTxPowerNIC_CE(pDM_Odm);
|
||||
break;
|
||||
case ODM_AP:
|
||||
odm_DynamicTxPowerAP(pDM_Odm);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
VOID
|
||||
odm_DynamicTxPowerNIC(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
|
||||
if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR))
|
||||
return;
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
|
||||
|
||||
if (pDM_Odm->SupportICType == ODM_RTL8814A) {
|
||||
odm_DynamicTxPower_8814A(pDM_Odm);
|
||||
} else if (pDM_Odm->SupportICType & ODM_RTL8821) {
|
||||
PADAPTER Adapter = pDM_Odm->Adapter;
|
||||
PMGNT_INFO pMgntInfo = GetDefaultMgntInfo(Adapter);
|
||||
|
||||
if (pMgntInfo->RegRspPwr == 1) {
|
||||
if (pDM_Odm->RSSI_Min > 60)
|
||||
ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 1); /*Resp TXAGC offset = -3dB*/
|
||||
else if (pDM_Odm->RSSI_Min < 55)
|
||||
ODM_SetMACReg(pDM_Odm, ODM_REG_RESP_TX_11AC, BIT20|BIT19|BIT18, 0); /*Resp TXAGC offset = 0dB*/
|
||||
}
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
VOID
|
||||
odm_DynamicTxPowerAP(
|
||||
IN PVOID pDM_VOID
|
||||
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
||||
|
||||
//#if ((RTL8192C_SUPPORT==1) || (RTL8192D_SUPPORT==1) || (RTL8188E_SUPPORT==1) || (RTL8812E_SUPPORT==1))
|
||||
|
||||
|
||||
prtl8192cd_priv priv = pDM_Odm->priv;
|
||||
s4Byte i;
|
||||
s2Byte pwr_thd = 63;
|
||||
|
||||
if(!priv->pshare->rf_ft_var.tx_pwr_ctrl)
|
||||
return;
|
||||
|
||||
#if ((RTL8812A_SUPPORT == 1) || (RTL8881A_SUPPORT == 1) || (RTL8814A_SUPPORT == 1))
|
||||
if (pDM_Odm->SupportICType & (ODM_RTL8812 | ODM_RTL8881A | ODM_RTL8814A))
|
||||
pwr_thd = TX_POWER_NEAR_FIELD_THRESH_LVL1;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Check if station is near by to use lower tx power
|
||||
*/
|
||||
|
||||
if ((priv->up_time % 3) == 0 ) {
|
||||
int disable_pwr_ctrl = ((pDM_Odm->FalseAlmCnt.Cnt_all > 1000 ) || ((pDM_Odm->FalseAlmCnt.Cnt_all > 300 ) && ((RTL_R8(0xc50) & 0x7f) >= 0x32))) ? 1 : 0;
|
||||
|
||||
for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++){
|
||||
PSTA_INFO_T pstat = pDM_Odm->pODM_StaInfo[i];
|
||||
if(IS_STA_VALID(pstat) ) {
|
||||
if(disable_pwr_ctrl)
|
||||
pstat->hp_level = 0;
|
||||
else if ((pstat->hp_level == 0) && (pstat->rssi > pwr_thd))
|
||||
pstat->hp_level = 1;
|
||||
else if ((pstat->hp_level == 1) && (pstat->rssi < (pwr_thd-8)))
|
||||
pstat->hp_level = 0;
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(CONFIG_WLAN_HAL_8192EE)
|
||||
if (GET_CHIP_VER(priv) == VERSION_8192E) {
|
||||
if( !disable_pwr_ctrl && (pDM_Odm->RSSI_Min != 0xff) ) {
|
||||
if(pDM_Odm->RSSI_Min > pwr_thd)
|
||||
RRSR_power_control_11n(priv, 1 );
|
||||
else if(pDM_Odm->RSSI_Min < (pwr_thd-8))
|
||||
RRSR_power_control_11n(priv, 0 );
|
||||
} else {
|
||||
RRSR_power_control_11n(priv, 0 );
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_WLAN_HAL_8814AE
|
||||
if (GET_CHIP_VER(priv) == VERSION_8814A) {
|
||||
if (!disable_pwr_ctrl && (pDM_Odm->RSSI_Min != 0xff)) {
|
||||
if (pDM_Odm->RSSI_Min > pwr_thd)
|
||||
RRSR_power_control_14(priv, 1);
|
||||
else if (pDM_Odm->RSSI_Min < (pwr_thd-8))
|
||||
RRSR_power_control_14(priv, 0);
|
||||
} else {
|
||||
RRSR_power_control_14(priv, 0);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
}
|
||||
//#endif
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
VOID
|
||||
odm_DynamicTxPower_8821(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte pDesc,
|
||||
IN u1Byte macId
|
||||
)
|
||||
{
|
||||
#if (RTL8821A_SUPPORT == 1)
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PSTA_INFO_T pEntry;
|
||||
u1Byte reg0xc56_byte;
|
||||
u1Byte txpwr_offset = 0;
|
||||
|
||||
pEntry = pDM_Odm->pODM_StaInfo[macId];
|
||||
|
||||
reg0xc56_byte = ODM_Read1Byte(pDM_Odm, 0xc56);
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("reg0xc56_byte=%d\n", reg0xc56_byte));
|
||||
|
||||
if (pEntry[macId].rssi_stat.UndecoratedSmoothedPWDB > 85) {
|
||||
|
||||
/* Avoid TXAGC error after TX power offset is applied.
|
||||
For example: Reg0xc56=0x6, if txpwr_offset=3( reduce 11dB )
|
||||
Total power = 6-11= -5( overflow!! ), PA may be burned !
|
||||
so txpwr_offset should be adjusted by Reg0xc56*/
|
||||
|
||||
if (reg0xc56_byte < 7)
|
||||
txpwr_offset = 1;
|
||||
else if (reg0xc56_byte < 11)
|
||||
txpwr_offset = 2;
|
||||
else
|
||||
txpwr_offset = 3;
|
||||
|
||||
SET_TX_DESC_TX_POWER_OFFSET_8812(pDesc, txpwr_offset);
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("odm_DynamicTxPower_8821: RSSI=%d, txpwr_offset=%d\n", pEntry[macId].rssi_stat.UndecoratedSmoothedPWDB, txpwr_offset));
|
||||
|
||||
} else{
|
||||
SET_TX_DESC_TX_POWER_OFFSET_8812(pDesc, txpwr_offset);
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("odm_DynamicTxPower_8821: RSSI=%d, txpwr_offset=%d\n", pEntry[macId].rssi_stat.UndecoratedSmoothedPWDB, txpwr_offset));
|
||||
|
||||
}
|
||||
#endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
|
||||
#endif /*#if (RTL8821A_SUPPORT==1)*/
|
||||
}
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
VOID
|
||||
odm_DynamicTxPower_8814A(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PADAPTER Adapter = pDM_Odm->Adapter;
|
||||
PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
||||
s4Byte UndecoratedSmoothedPWDB;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD,
|
||||
("TxLevel=%d pMgntInfo->IOTAction=%x pMgntInfo->bDynamicTxPowerEnable=%d\n",
|
||||
pHalData->DynamicTxHighPowerLvl, pMgntInfo->IOTAction, pMgntInfo->bDynamicTxPowerEnable));
|
||||
|
||||
/*STA not connected and AP not connected*/
|
||||
if ((!pMgntInfo->bMediaConnect) && (pHalData->EntryMinUndecoratedSmoothedPWDB == 0)) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("Not connected to any reset power lvl\n"));
|
||||
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
if ((pMgntInfo->bDynamicTxPowerEnable != TRUE) || pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_HIGH_POWER) {
|
||||
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
|
||||
} else {
|
||||
if (pMgntInfo->bMediaConnect) { /*Default port*/
|
||||
if (ACTING_AS_AP(Adapter) || ACTING_AS_IBSS(Adapter)) {
|
||||
UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB;
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Client PWDB = 0x%x\n", UndecoratedSmoothedPWDB));
|
||||
} else {
|
||||
UndecoratedSmoothedPWDB = pHalData->UndecoratedSmoothedPWDB;
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x\n", UndecoratedSmoothedPWDB));
|
||||
}
|
||||
} else {/*associated entry pwdb*/
|
||||
UndecoratedSmoothedPWDB = pHalData->EntryMinUndecoratedSmoothedPWDB;
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x\n", UndecoratedSmoothedPWDB));
|
||||
}
|
||||
|
||||
/*Should we separate as 2.4G/5G band?*/
|
||||
|
||||
if (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) {
|
||||
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2;
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n"));
|
||||
} else if ((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) &&
|
||||
(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
|
||||
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1;
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n"));
|
||||
} else if (UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) {
|
||||
pHalData->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n"));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
if (pHalData->DynamicTxHighPowerLvl != pHalData->LastDTPLvl) {
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD, ("odm_DynamicTxPower_8814A() Channel = %d\n" , pHalData->CurrentChannel));
|
||||
odm_SetTxPowerLevel8814(Adapter, pHalData->CurrentChannel, pHalData->DynamicTxHighPowerLvl);
|
||||
}
|
||||
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_DYNAMIC_TXPWR, DBG_LOUD,
|
||||
("odm_DynamicTxPower_8814A() Channel = %d TXpower lvl=%d/%d\n" ,
|
||||
pHalData->CurrentChannel, pHalData->LastDTPLvl, pHalData->DynamicTxHighPowerLvl));
|
||||
|
||||
pHalData->LastDTPLvl = pHalData->DynamicTxHighPowerLvl;
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**/
|
||||
/*For normal driver we always use the FW method to configure TX power index to reduce I/O transaction.*/
|
||||
/**/
|
||||
/**/
|
||||
VOID
|
||||
odm_SetTxPowerLevel8814(
|
||||
IN PADAPTER Adapter,
|
||||
IN u1Byte Channel,
|
||||
IN u1Byte PwrLvl
|
||||
)
|
||||
{
|
||||
#if (DEV_BUS_TYPE == RT_USB_INTERFACE)
|
||||
u4Byte i, j, k = 0;
|
||||
u4Byte value[264] = {0};
|
||||
u4Byte path = 0, PowerIndex, txagc_table_wd = 0x00801000;
|
||||
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
||||
|
||||
u1Byte jaguar2Rates[][4] = { {MGN_1M, MGN_2M, MGN_5_5M, MGN_11M},
|
||||
{MGN_6M, MGN_9M, MGN_12M, MGN_18M},
|
||||
{MGN_24M, MGN_36M, MGN_48M, MGN_54M},
|
||||
{MGN_MCS0, MGN_MCS1, MGN_MCS2, MGN_MCS3},
|
||||
{MGN_MCS4, MGN_MCS5, MGN_MCS6, MGN_MCS7},
|
||||
{MGN_MCS8, MGN_MCS9, MGN_MCS10, MGN_MCS11},
|
||||
{MGN_MCS12, MGN_MCS13, MGN_MCS14, MGN_MCS15},
|
||||
{MGN_MCS16, MGN_MCS17, MGN_MCS18, MGN_MCS19},
|
||||
{MGN_MCS20, MGN_MCS21, MGN_MCS22, MGN_MCS23},
|
||||
{MGN_VHT1SS_MCS0, MGN_VHT1SS_MCS1, MGN_VHT1SS_MCS2, MGN_VHT1SS_MCS3},
|
||||
{MGN_VHT1SS_MCS4, MGN_VHT1SS_MCS5, MGN_VHT1SS_MCS6, MGN_VHT1SS_MCS7},
|
||||
{MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9, MGN_VHT2SS_MCS0, MGN_VHT2SS_MCS1},
|
||||
{MGN_VHT2SS_MCS2, MGN_VHT2SS_MCS3, MGN_VHT2SS_MCS4, MGN_VHT2SS_MCS5},
|
||||
{MGN_VHT2SS_MCS6, MGN_VHT2SS_MCS7, MGN_VHT2SS_MCS8, MGN_VHT2SS_MCS9},
|
||||
{MGN_VHT3SS_MCS0, MGN_VHT3SS_MCS1, MGN_VHT3SS_MCS2, MGN_VHT3SS_MCS3},
|
||||
{MGN_VHT3SS_MCS4, MGN_VHT3SS_MCS5, MGN_VHT3SS_MCS6, MGN_VHT3SS_MCS7},
|
||||
{MGN_VHT3SS_MCS8, MGN_VHT3SS_MCS9, 0, 0} };
|
||||
|
||||
for (path = ODM_RF_PATH_A; path <= ODM_RF_PATH_D; ++path) {
|
||||
|
||||
u1Byte usb_host = UsbModeQueryHubUsbType(Adapter);
|
||||
u1Byte usb_rfset = UsbModeQueryRfSet(Adapter);
|
||||
u1Byte usb_rf_type = RT_GetRFType(Adapter);
|
||||
|
||||
for (i = 0; i <= 16; i++) {
|
||||
for (j = 0; j <= 3; j++) {
|
||||
if (jaguar2Rates[i][j] == 0)
|
||||
continue;
|
||||
|
||||
txagc_table_wd = 0x00801000;
|
||||
PowerIndex = (u4Byte) PHY_GetTxPowerIndex(Adapter, (u1Byte)path, jaguar2Rates[i][j], pHalData->CurrentChannelBW, Channel);
|
||||
|
||||
/*for Query bus type to recude tx power.*/
|
||||
if (usb_host != USB_MODE_U3 && usb_rfset == 1 && IS_HARDWARE_TYPE_8814AU(Adapter) && usb_rf_type == RF_3T3R) {
|
||||
if (Channel <= 14) {
|
||||
if (PowerIndex >= 16)
|
||||
PowerIndex -= 16;
|
||||
else
|
||||
PowerIndex = 0;
|
||||
} else
|
||||
PowerIndex = 0;
|
||||
}
|
||||
|
||||
if (PwrLvl == TxHighPwrLevel_Level1) {
|
||||
if (PowerIndex >= 0x10)
|
||||
PowerIndex -= 0x10;
|
||||
else
|
||||
PowerIndex = 0;
|
||||
} else if (PwrLvl == TxHighPwrLevel_Level2) {
|
||||
PowerIndex = 0;
|
||||
}
|
||||
|
||||
txagc_table_wd |= (path << 8) | MRateToHwRate(jaguar2Rates[i][j]) | (PowerIndex << 24);
|
||||
|
||||
PHY_SetTxPowerIndexShadow(Adapter, (u1Byte)PowerIndex, (u1Byte)path, jaguar2Rates[i][j]);
|
||||
|
||||
value[k++] = txagc_table_wd;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (Adapter->MgntInfo.bScanInProgress == FALSE && Adapter->MgntInfo.RegFWOffload == 2)
|
||||
HalDownloadTxPowerLevel8814(Adapter, value);
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
@@ -0,0 +1,110 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __PHYDMDYNAMICTXPOWER_H__
|
||||
#define __PHYDMDYNAMICTXPOWER_H__
|
||||
|
||||
/*#define DYNAMIC_TXPWR_VERSION "1.0"*/
|
||||
/*#define DYNAMIC_TXPWR_VERSION "1.3" */ /*2015.08.26, Add 8814 Dynamic TX power*/
|
||||
#define DYNAMIC_TXPWR_VERSION "1.4" /*2015.11.06, Add CE 8821A Dynamic TX power*/
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_AP)
|
||||
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
|
||||
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 60
|
||||
#define TX_POWER_NEAR_FIELD_THRESH_AP 0x3F
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
|
||||
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
|
||||
#elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
|
||||
#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
|
||||
#define TX_POWER_NEAR_FIELD_THRESH_LVL1 60
|
||||
#endif
|
||||
|
||||
#define TxHighPwrLevel_Normal 0
|
||||
#define TxHighPwrLevel_Level1 1
|
||||
#define TxHighPwrLevel_Level2 2
|
||||
|
||||
#define TxHighPwrLevel_BT1 3
|
||||
#define TxHighPwrLevel_BT2 4
|
||||
#define TxHighPwrLevel_15 5
|
||||
#define TxHighPwrLevel_35 6
|
||||
#define TxHighPwrLevel_50 7
|
||||
#define TxHighPwrLevel_70 8
|
||||
#define TxHighPwrLevel_100 9
|
||||
|
||||
VOID
|
||||
odm_DynamicTxPowerInit(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_DynamicTxPowerRestorePowerIndex(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_DynamicTxPowerNIC(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
#if(DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
VOID
|
||||
odm_DynamicTxPowerSavePowerIndex(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_DynamicTxPowerWritePowerIndex(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u1Byte Value);
|
||||
|
||||
VOID
|
||||
odm_DynamicTxPower_8821(
|
||||
IN PVOID pDM_VOID,
|
||||
IN pu1Byte pDesc,
|
||||
IN u1Byte macId
|
||||
);
|
||||
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
|
||||
VOID
|
||||
odm_DynamicTxPower_8814A(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
|
||||
VOID
|
||||
odm_SetTxPowerLevel8814(
|
||||
IN PADAPTER Adapter,
|
||||
IN u1Byte Channel,
|
||||
IN u1Byte PwrLvl
|
||||
);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
VOID
|
||||
odm_DynamicTxPower(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
odm_DynamicTxPowerAP(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,766 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
//============================================================
|
||||
// include files
|
||||
//============================================================
|
||||
#include "mp_precomp.h"
|
||||
#include "phydm_precomp.h"
|
||||
|
||||
VOID
|
||||
ODM_EdcaTurboInit(
|
||||
IN PVOID pDM_VOID)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE==ODM_WIN)
|
||||
PADAPTER Adapter = NULL;
|
||||
HAL_DATA_TYPE *pHalData = NULL;
|
||||
|
||||
if(pDM_Odm->Adapter==NULL) {
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EdcaTurboInit fail!!!\n"));
|
||||
return;
|
||||
}
|
||||
|
||||
Adapter=pDM_Odm->Adapter;
|
||||
pHalData=GET_HAL_DATA(Adapter);
|
||||
|
||||
pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE;
|
||||
pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE;
|
||||
pHalData->bIsAnyNonBEPkts = FALSE;
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE==ODM_CE)
|
||||
PADAPTER Adapter = pDM_Odm->Adapter;
|
||||
pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE;
|
||||
pDM_Odm->DM_EDCA_Table.bIsCurRDLState = FALSE;
|
||||
Adapter->recvpriv.bIsAnyNonBEPkts =FALSE;
|
||||
|
||||
#endif
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VO PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VO_PARAM)));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial VI PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_VI_PARAM)));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM)));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BK PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BK_PARAM)));
|
||||
|
||||
|
||||
} // ODM_InitEdcaTurbo
|
||||
|
||||
VOID
|
||||
odm_EdcaTurboCheck(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
//
|
||||
// For AP/ADSL use prtl8192cd_priv
|
||||
// For CE/NIC use PADAPTER
|
||||
//
|
||||
|
||||
//
|
||||
// 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate
|
||||
// at the same time. In the stage2/3, we need to prive universal interface and merge all
|
||||
// HW dynamic mechanism.
|
||||
//
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheck========================>\n"));
|
||||
|
||||
if(!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))
|
||||
return;
|
||||
|
||||
switch (pDM_Odm->SupportPlatform)
|
||||
{
|
||||
case ODM_WIN:
|
||||
|
||||
#if(DM_ODM_SUPPORT_TYPE==ODM_WIN)
|
||||
odm_EdcaTurboCheckMP(pDM_Odm);
|
||||
#endif
|
||||
break;
|
||||
|
||||
case ODM_CE:
|
||||
#if(DM_ODM_SUPPORT_TYPE==ODM_CE)
|
||||
odm_EdcaTurboCheckCE(pDM_Odm);
|
||||
#endif
|
||||
break;
|
||||
}
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("<========================odm_EdcaTurboCheck\n"));
|
||||
|
||||
} // odm_CheckEdcaTurbo
|
||||
|
||||
#if(DM_ODM_SUPPORT_TYPE==ODM_CE)
|
||||
|
||||
|
||||
VOID
|
||||
odm_EdcaTurboCheckCE(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PADAPTER Adapter = pDM_Odm->Adapter;
|
||||
u32 EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer];
|
||||
u32 EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer];
|
||||
u32 ICType=pDM_Odm->SupportICType;
|
||||
u32 IOTPeer=0;
|
||||
u8 WirelessMode=0xFF; //invalid value
|
||||
u32 trafficIndex;
|
||||
u32 edca_param;
|
||||
u64 cur_tx_bytes = 0;
|
||||
u64 cur_rx_bytes = 0;
|
||||
u8 bbtchange = _FALSE;
|
||||
u8 bBiasOnRx = _FALSE;
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
||||
struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(Adapter);
|
||||
struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv);
|
||||
struct recv_priv *precvpriv = &(Adapter->recvpriv);
|
||||
struct registry_priv *pregpriv = &Adapter->registrypriv;
|
||||
struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv);
|
||||
struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info);
|
||||
|
||||
if(pDM_Odm->bLinked != _TRUE)
|
||||
{
|
||||
precvpriv->bIsAnyNonBEPkts = _FALSE;
|
||||
return;
|
||||
}
|
||||
|
||||
if ((pregpriv->wifi_spec == 1) )//|| (pmlmeinfo->HT_enable == 0))
|
||||
{
|
||||
precvpriv->bIsAnyNonBEPkts = _FALSE;
|
||||
return;
|
||||
}
|
||||
|
||||
if(pDM_Odm->pWirelessMode!=NULL)
|
||||
WirelessMode=*(pDM_Odm->pWirelessMode);
|
||||
|
||||
IOTPeer = pmlmeinfo->assoc_AP_vendor;
|
||||
|
||||
if (IOTPeer >= HT_IOT_PEER_MAX)
|
||||
{
|
||||
precvpriv->bIsAnyNonBEPkts = _FALSE;
|
||||
return;
|
||||
}
|
||||
|
||||
if (pDM_Odm->SupportICType & ODM_RTL8188E) {
|
||||
if((IOTPeer == HT_IOT_PEER_RALINK)||(IOTPeer == HT_IOT_PEER_ATHEROS))
|
||||
bBiasOnRx = _TRUE;
|
||||
}
|
||||
|
||||
// Check if the status needs to be changed.
|
||||
if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) )
|
||||
{
|
||||
cur_tx_bytes = pdvobjpriv->traffic_stat.cur_tx_bytes;
|
||||
cur_rx_bytes = pdvobjpriv->traffic_stat.cur_rx_bytes;
|
||||
|
||||
//traffic, TX or RX
|
||||
if(bBiasOnRx)
|
||||
{
|
||||
if (cur_tx_bytes > (cur_rx_bytes << 2))
|
||||
{ // Uplink TP is present.
|
||||
trafficIndex = UP_LINK;
|
||||
}
|
||||
else
|
||||
{ // Balance TP is present.
|
||||
trafficIndex = DOWN_LINK;
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if (cur_rx_bytes > (cur_tx_bytes << 2))
|
||||
{ // Downlink TP is present.
|
||||
trafficIndex = DOWN_LINK;
|
||||
}
|
||||
else
|
||||
{ // Balance TP is present.
|
||||
trafficIndex = UP_LINK;
|
||||
}
|
||||
}
|
||||
|
||||
//if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA))
|
||||
{
|
||||
if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) {
|
||||
EDCA_BE_UL = 0x6ea42b;
|
||||
EDCA_BE_DL = 0x6ea42b;
|
||||
}
|
||||
|
||||
//92D txop can't be set to 0x3e for cisco1250
|
||||
if ((IOTPeer == HT_IOT_PEER_CISCO) && (WirelessMode == ODM_WM_N24G))
|
||||
{
|
||||
EDCA_BE_DL = edca_setting_DL[IOTPeer];
|
||||
EDCA_BE_UL = edca_setting_UL[IOTPeer];
|
||||
}
|
||||
//merge from 92s_92c_merge temp brunch v2445 20120215
|
||||
else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B)))
|
||||
{
|
||||
EDCA_BE_DL = edca_setting_DL_GMode[IOTPeer];
|
||||
}
|
||||
else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A)))
|
||||
{
|
||||
EDCA_BE_DL = 0xa630;
|
||||
}
|
||||
else if(IOTPeer == HT_IOT_PEER_MARVELL)
|
||||
{
|
||||
EDCA_BE_DL = edca_setting_DL[IOTPeer];
|
||||
EDCA_BE_UL = edca_setting_UL[IOTPeer];
|
||||
}
|
||||
else if(IOTPeer == HT_IOT_PEER_ATHEROS)
|
||||
{
|
||||
// Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue.
|
||||
EDCA_BE_DL = edca_setting_DL[IOTPeer];
|
||||
}
|
||||
|
||||
if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8821)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE
|
||||
{
|
||||
EDCA_BE_UL = 0x5ea42b;
|
||||
EDCA_BE_DL = 0x5ea42b;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%x EDCA_BE_DL =0x%x",EDCA_BE_UL,EDCA_BE_DL));
|
||||
}
|
||||
|
||||
if (trafficIndex == DOWN_LINK)
|
||||
edca_param = EDCA_BE_DL;
|
||||
else
|
||||
edca_param = EDCA_BE_UL;
|
||||
|
||||
rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param);
|
||||
|
||||
pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex;
|
||||
}
|
||||
|
||||
pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _TRUE;
|
||||
}
|
||||
else
|
||||
{
|
||||
//
|
||||
// Turn Off EDCA turbo here.
|
||||
// Restore original EDCA according to the declaration of AP.
|
||||
//
|
||||
if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)
|
||||
{
|
||||
rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE);
|
||||
pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = _FALSE;
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
#elif(DM_ODM_SUPPORT_TYPE==ODM_WIN)
|
||||
VOID
|
||||
odm_EdcaTurboCheckMP(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PADAPTER Adapter = pDM_Odm->Adapter;
|
||||
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
|
||||
|
||||
PADAPTER pDefaultAdapter = GetDefaultAdapter(Adapter);
|
||||
PADAPTER pExtAdapter = GetFirstExtAdapter(Adapter);//NULL;
|
||||
PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
|
||||
PSTA_QOS pStaQos = Adapter->MgntInfo.pStaQos;
|
||||
//[Win7 Count Tx/Rx statistic for Extension Port] odm_CheckEdcaTurbo's Adapter is always Default. 2009.08.20, by Bohn
|
||||
u8Byte Ext_curTxOkCnt = 0;
|
||||
u8Byte Ext_curRxOkCnt = 0;
|
||||
//For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn.
|
||||
u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE;
|
||||
|
||||
// Keep past Tx/Rx packet count for RT-to-RT EDCA turbo.
|
||||
u8Byte curTxOkCnt = 0;
|
||||
u8Byte curRxOkCnt = 0;
|
||||
u4Byte EDCA_BE_UL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[pMgntInfo->IOTPeer];
|
||||
u4Byte EDCA_BE_DL = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[pMgntInfo->IOTPeer];
|
||||
u4Byte EDCA_BE = 0x5ea42b;
|
||||
u1Byte IOTPeer=0;
|
||||
BOOLEAN *pbIsCurRDLState=NULL;
|
||||
BOOLEAN bLastIsCurRDLState=FALSE;
|
||||
BOOLEAN bBiasOnRx=FALSE;
|
||||
BOOLEAN bEdcaTurboOn=FALSE;
|
||||
u1Byte TxRate = 0xFF;
|
||||
u8Byte value64;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("odm_EdcaTurboCheckMP========================>"));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Orginial BE PARAM: 0x%x\n",ODM_Read4Byte(pDM_Odm,ODM_EDCA_BE_PARAM)));
|
||||
|
||||
////===============================
|
||||
////list paramter for different platform
|
||||
////===============================
|
||||
bLastIsCurRDLState=pDM_Odm->DM_EDCA_Table.bIsCurRDLState;
|
||||
pbIsCurRDLState=&(pDM_Odm->DM_EDCA_Table.bIsCurRDLState);
|
||||
|
||||
//2012/09/14 MH Add
|
||||
if (pMgntInfo->NumNonBePkt > pMgntInfo->RegEdcaThresh && !(Adapter->MgntInfo.bWiFiConfg & RT_WIFI_LOGO))
|
||||
pHalData->bIsAnyNonBEPkts = TRUE;
|
||||
|
||||
pMgntInfo->NumNonBePkt = 0;
|
||||
|
||||
// Caculate TX/RX TP:
|
||||
curTxOkCnt = pDM_Odm->curTxOkCnt;
|
||||
curRxOkCnt = pDM_Odm->curRxOkCnt;
|
||||
|
||||
|
||||
if(pExtAdapter == NULL)
|
||||
pExtAdapter = pDefaultAdapter;
|
||||
|
||||
Ext_curTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast - pMgntInfo->Ext_lastTxOkCnt;
|
||||
Ext_curRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast - pMgntInfo->Ext_lastRxOkCnt;
|
||||
GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus);
|
||||
//For future Win7 Enable Default Port to modify AMPDU size dynamically, 2009.08.20, Bohn.
|
||||
if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY)
|
||||
{
|
||||
curTxOkCnt = Ext_curTxOkCnt ;
|
||||
curRxOkCnt = Ext_curRxOkCnt ;
|
||||
}
|
||||
//
|
||||
IOTPeer=pMgntInfo->IOTPeer;
|
||||
bBiasOnRx=(pMgntInfo->IOTAction & HT_IOT_ACT_EDCA_BIAS_ON_RX)?TRUE:FALSE;
|
||||
bEdcaTurboOn=((!pHalData->bIsAnyNonBEPkts))?TRUE:FALSE;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bIsAnyNonBEPkts : 0x%lx \n",pHalData->bIsAnyNonBEPkts));
|
||||
|
||||
|
||||
////===============================
|
||||
////check if edca turbo is disabled
|
||||
////===============================
|
||||
if(odm_IsEdcaTurboDisable(pDM_Odm))
|
||||
{
|
||||
pHalData->bIsAnyNonBEPkts = FALSE;
|
||||
pMgntInfo->lastTxOkCnt = Adapter->TxStats.NumTxBytesUnicast;
|
||||
pMgntInfo->lastRxOkCnt = Adapter->RxStats.NumRxBytesUnicast;
|
||||
pMgntInfo->Ext_lastTxOkCnt = pExtAdapter->TxStats.NumTxBytesUnicast;
|
||||
pMgntInfo->Ext_lastRxOkCnt = pExtAdapter->RxStats.NumRxBytesUnicast;
|
||||
|
||||
}
|
||||
|
||||
////===============================
|
||||
////remove iot case out
|
||||
////===============================
|
||||
ODM_EdcaParaSelByIot(pDM_Odm, &EDCA_BE_UL, &EDCA_BE_DL);
|
||||
|
||||
|
||||
////===============================
|
||||
////Check if the status needs to be changed.
|
||||
////===============================
|
||||
if(bEdcaTurboOn)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("bEdcaTurboOn : 0x%x bBiasOnRx : 0x%x\n",bEdcaTurboOn,bBiasOnRx));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curTxOkCnt : 0x%lx \n",curTxOkCnt));
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("curRxOkCnt : 0x%lx \n",curRxOkCnt));
|
||||
if(bBiasOnRx)
|
||||
odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, TRUE, pbIsCurRDLState);
|
||||
else
|
||||
odm_EdcaChooseTrafficIdx(pDM_Odm,curTxOkCnt, curRxOkCnt, FALSE, pbIsCurRDLState);
|
||||
|
||||
//modify by Guo.Mingzhi 2011-12-29
|
||||
if( Adapter->AP_EDCA_PARAM[0] != EDCA_BE )
|
||||
EDCA_BE = Adapter->AP_EDCA_PARAM[0];
|
||||
else
|
||||
EDCA_BE=((*pbIsCurRDLState)==TRUE)?EDCA_BE_DL:EDCA_BE_UL;
|
||||
if(IS_HARDWARE_TYPE_8821U(Adapter))
|
||||
{
|
||||
if(pMgntInfo->RegTxDutyEnable)
|
||||
{
|
||||
//2013.01.23 LukeLee: debug for 8811AU thermal issue (reduce Tx duty cycle)
|
||||
if(!pMgntInfo->ForcedDataRate) //auto rate
|
||||
{
|
||||
if(pDM_Odm->TxRate != 0xFF)
|
||||
TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate);
|
||||
}
|
||||
else //force rate
|
||||
{
|
||||
TxRate = (u1Byte) pMgntInfo->ForcedDataRate;
|
||||
}
|
||||
|
||||
value64 = (curRxOkCnt<<2);
|
||||
if(curTxOkCnt < value64) //Downlink
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
|
||||
else //Uplink
|
||||
{
|
||||
/*DbgPrint("pRFCalibrateInfo->ThermalValue = 0x%X\n", pRFCalibrateInfo->ThermalValue);*/
|
||||
/*if(pRFCalibrateInfo->ThermalValue < pHalData->EEPROMThermalMeter)*/
|
||||
if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G))
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
|
||||
else
|
||||
{
|
||||
switch (TxRate)
|
||||
{
|
||||
case MGN_VHT1SS_MCS6:
|
||||
case MGN_VHT1SS_MCS5:
|
||||
case MGN_MCS6:
|
||||
case MGN_MCS5:
|
||||
case MGN_48M:
|
||||
case MGN_54M:
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea42b);
|
||||
break;
|
||||
case MGN_VHT1SS_MCS4:
|
||||
case MGN_MCS4:
|
||||
case MGN_36M:
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa42b);
|
||||
break;
|
||||
case MGN_VHT1SS_MCS3:
|
||||
case MGN_MCS3:
|
||||
case MGN_24M:
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa47f);
|
||||
break;
|
||||
case MGN_VHT1SS_MCS2:
|
||||
case MGN_MCS2:
|
||||
case MGN_18M:
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa57f);
|
||||
break;
|
||||
case MGN_VHT1SS_MCS1:
|
||||
case MGN_MCS1:
|
||||
case MGN_9M:
|
||||
case MGN_12M:
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa77f);
|
||||
break;
|
||||
case MGN_VHT1SS_MCS0:
|
||||
case MGN_MCS0:
|
||||
case MGN_6M:
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f);
|
||||
break;
|
||||
default:
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
|
||||
}
|
||||
|
||||
}
|
||||
else if (IS_HARDWARE_TYPE_8812AU(Adapter)){
|
||||
if(pMgntInfo->RegTxDutyEnable)
|
||||
{
|
||||
//2013.07.26 Wilson: debug for 8812AU thermal issue (reduce Tx duty cycle)
|
||||
// it;s the same issue as 8811AU
|
||||
if(!pMgntInfo->ForcedDataRate) //auto rate
|
||||
{
|
||||
if(pDM_Odm->TxRate != 0xFF)
|
||||
TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate);
|
||||
}
|
||||
else //force rate
|
||||
{
|
||||
TxRate = (u1Byte) pMgntInfo->ForcedDataRate;
|
||||
}
|
||||
|
||||
value64 = (curRxOkCnt<<2);
|
||||
if(curTxOkCnt < value64) //Downlink
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
|
||||
else //Uplink
|
||||
{
|
||||
/*DbgPrint("pRFCalibrateInfo->ThermalValue = 0x%X\n", pRFCalibrateInfo->ThermalValue);*/
|
||||
/*if(pRFCalibrateInfo->ThermalValue < pHalData->EEPROMThermalMeter)*/
|
||||
if((pDM_Odm->RFCalibrateInfo.ThermalValue < 0x2c) || (*pDM_Odm->pBandType == BAND_ON_2_4G))
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
|
||||
else
|
||||
{
|
||||
switch (TxRate)
|
||||
{
|
||||
case MGN_VHT2SS_MCS9:
|
||||
case MGN_VHT1SS_MCS9:
|
||||
case MGN_VHT1SS_MCS8:
|
||||
case MGN_MCS15:
|
||||
case MGN_MCS7:
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0x1ea44f);
|
||||
case MGN_VHT2SS_MCS8:
|
||||
case MGN_VHT1SS_MCS7:
|
||||
case MGN_MCS14:
|
||||
case MGN_MCS6:
|
||||
case MGN_54M:
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa44f);
|
||||
case MGN_VHT2SS_MCS7:
|
||||
case MGN_VHT2SS_MCS6:
|
||||
case MGN_VHT1SS_MCS6:
|
||||
case MGN_VHT1SS_MCS5:
|
||||
case MGN_MCS13:
|
||||
case MGN_MCS5:
|
||||
case MGN_48M:
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa630);
|
||||
break;
|
||||
case MGN_VHT2SS_MCS5:
|
||||
case MGN_VHT2SS_MCS4:
|
||||
case MGN_VHT1SS_MCS4:
|
||||
case MGN_VHT1SS_MCS3:
|
||||
case MGN_MCS12:
|
||||
case MGN_MCS4:
|
||||
case MGN_MCS3:
|
||||
case MGN_36M:
|
||||
case MGN_24M:
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa730);
|
||||
break;
|
||||
case MGN_VHT2SS_MCS3:
|
||||
case MGN_VHT2SS_MCS2:
|
||||
case MGN_VHT2SS_MCS1:
|
||||
case MGN_VHT1SS_MCS2:
|
||||
case MGN_VHT1SS_MCS1:
|
||||
case MGN_MCS11:
|
||||
case MGN_MCS10:
|
||||
case MGN_MCS9:
|
||||
case MGN_MCS2:
|
||||
case MGN_MCS1:
|
||||
case MGN_18M:
|
||||
case MGN_12M:
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa830);
|
||||
break;
|
||||
case MGN_VHT2SS_MCS0:
|
||||
case MGN_VHT1SS_MCS0:
|
||||
case MGN_MCS0:
|
||||
case MGN_MCS8:
|
||||
case MGN_9M:
|
||||
case MGN_6M:
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,0xa87f);
|
||||
break;
|
||||
default:
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
|
||||
}
|
||||
}
|
||||
else
|
||||
ODM_Write4Byte(pDM_Odm,ODM_EDCA_BE_PARAM,EDCA_BE);
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA Turbo on: EDCA_BE:0x%lx\n",EDCA_BE));
|
||||
|
||||
pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = TRUE;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("EDCA_BE_DL : 0x%lx EDCA_BE_UL : 0x%lx EDCA_BE : 0x%lx \n",EDCA_BE_DL,EDCA_BE_UL,EDCA_BE));
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
// Turn Off EDCA turbo here.
|
||||
// Restore original EDCA according to the declaration of AP.
|
||||
if(pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)
|
||||
{
|
||||
Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_AC_PARAM, GET_WMM_PARAM_ELE_SINGLE_AC_PARAM(pStaQos->WMMParamEle, AC0_BE) );
|
||||
|
||||
pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = FALSE;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Restore EDCA BE: 0x%lx \n",pDM_Odm->WMMEDCA_BE));
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
//check if edca turbo is disabled
|
||||
BOOLEAN
|
||||
odm_IsEdcaTurboDisable(
|
||||
IN PVOID pDM_VOID
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PADAPTER Adapter = pDM_Odm->Adapter;
|
||||
PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
|
||||
u4Byte IOTPeer=pMgntInfo->IOTPeer;
|
||||
|
||||
if(pDM_Odm->bBtDisableEdcaTurbo)
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable for BT!!\n"));
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
if((!(pDM_Odm->SupportAbility& ODM_MAC_EDCA_TURBO ))||
|
||||
(pDM_Odm->WIFITest & RT_WIFI_LOGO)||
|
||||
(IOTPeer>= HT_IOT_PEER_MAX))
|
||||
{
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("EdcaTurboDisable\n"));
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
|
||||
// 1. We do not turn on EDCA turbo mode for some AP that has IOT issue
|
||||
// 2. User may disable EDCA Turbo mode with OID settings.
|
||||
if(pMgntInfo->IOTAction & HT_IOT_ACT_DISABLE_EDCA_TURBO){
|
||||
ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD, ("IOTAction:EdcaTurboDisable\n"));
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
return FALSE;
|
||||
|
||||
|
||||
}
|
||||
|
||||
//add iot case here: for MP/CE
|
||||
VOID
|
||||
ODM_EdcaParaSelByIot(
|
||||
IN PVOID pDM_VOID,
|
||||
OUT u4Byte *EDCA_BE_UL,
|
||||
OUT u4Byte *EDCA_BE_DL
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
PADAPTER Adapter = pDM_Odm->Adapter;
|
||||
u4Byte IOTPeer=0;
|
||||
u4Byte ICType=pDM_Odm->SupportICType;
|
||||
u1Byte WirelessMode=0xFF; //invalid value
|
||||
u4Byte IOTPeerSubType = 0;
|
||||
|
||||
PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
|
||||
u1Byte TwoPortStatus = (u1Byte)TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE;
|
||||
|
||||
if(pDM_Odm->pWirelessMode!=NULL)
|
||||
WirelessMode=*(pDM_Odm->pWirelessMode);
|
||||
|
||||
///////////////////////////////////////////////////////////
|
||||
////list paramter for different platform
|
||||
|
||||
IOTPeer=pMgntInfo->IOTPeer;
|
||||
IOTPeerSubType=pMgntInfo->IOTPeerSubtype;
|
||||
GetTwoPortSharedResource(Adapter,TWO_PORT_SHARED_OBJECT__STATUS,NULL,&TwoPortStatus);
|
||||
|
||||
////============================
|
||||
/// IOT case for MP
|
||||
////============================
|
||||
if (pDM_Odm->SupportInterface == ODM_ITRF_PCIE) {
|
||||
(*EDCA_BE_UL) = 0x6ea42b;
|
||||
(*EDCA_BE_DL) = 0x6ea42b;
|
||||
}
|
||||
|
||||
if(TwoPortStatus == TWO_PORT_STATUS__EXTENSION_ONLY)
|
||||
{
|
||||
(*EDCA_BE_UL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_UL[ExtAdapter->MgntInfo.IOTPeer];
|
||||
(*EDCA_BE_DL) = 0x5ea42b;//Parameter suggested by Scott //edca_setting_DL[ExtAdapter->MgntInfo.IOTPeer];
|
||||
}
|
||||
|
||||
#if (INTEL_PROXIMITY_SUPPORT == 1)
|
||||
if(pMgntInfo->IntelClassModeInfo.bEnableCA == TRUE)
|
||||
{
|
||||
(*EDCA_BE_UL) = (*EDCA_BE_DL) = 0xa44f;
|
||||
}
|
||||
else
|
||||
#endif
|
||||
{
|
||||
if((pMgntInfo->IOTAction & (HT_IOT_ACT_FORCED_ENABLE_BE_TXOP|HT_IOT_ACT_AMSDU_ENABLE)))
|
||||
{// To check whether we shall force turn on TXOP configuration.
|
||||
if(!((*EDCA_BE_UL) & 0xffff0000))
|
||||
(*EDCA_BE_UL) |= 0x005e0000; // Force TxOP limit to 0x005e for UL.
|
||||
if(!((*EDCA_BE_DL) & 0xffff0000))
|
||||
(*EDCA_BE_DL) |= 0x005e0000; // Force TxOP limit to 0x005e for DL.
|
||||
}
|
||||
|
||||
//92D txop can't be set to 0x3e for cisco1250
|
||||
if ((IOTPeer == HT_IOT_PEER_CISCO) && (WirelessMode == ODM_WM_N24G))
|
||||
{
|
||||
(*EDCA_BE_DL) = edca_setting_DL[IOTPeer];
|
||||
(*EDCA_BE_UL) = edca_setting_UL[IOTPeer];
|
||||
}
|
||||
//merge from 92s_92c_merge temp brunch v2445 20120215
|
||||
else if((IOTPeer == HT_IOT_PEER_CISCO) &&((WirelessMode==ODM_WM_G)||(WirelessMode==(ODM_WM_B|ODM_WM_G))||(WirelessMode==ODM_WM_A)||(WirelessMode==ODM_WM_B)))
|
||||
{
|
||||
(*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer];
|
||||
}
|
||||
else if((IOTPeer== HT_IOT_PEER_AIRGO )&& ((WirelessMode==ODM_WM_G)||(WirelessMode==ODM_WM_A)))
|
||||
{
|
||||
(*EDCA_BE_DL) = 0xa630;
|
||||
}
|
||||
|
||||
else if(IOTPeer == HT_IOT_PEER_MARVELL)
|
||||
{
|
||||
(*EDCA_BE_DL) = edca_setting_DL[IOTPeer];
|
||||
(*EDCA_BE_UL) = edca_setting_UL[IOTPeer];
|
||||
}
|
||||
else if(IOTPeer == HT_IOT_PEER_ATHEROS && IOTPeerSubType != HT_IOT_PEER_TPLINK_AC1750)
|
||||
{
|
||||
// Set DL EDCA for Atheros peer to 0x3ea42b. Suggested by SD3 Wilson for ASUS TP issue.
|
||||
if(WirelessMode==ODM_WM_G)
|
||||
(*EDCA_BE_DL) = edca_setting_DL_GMode[IOTPeer];
|
||||
else
|
||||
(*EDCA_BE_DL) = edca_setting_DL[IOTPeer];
|
||||
|
||||
if(ICType == ODM_RTL8821)
|
||||
(*EDCA_BE_DL) = 0x5ea630;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
if((ICType==ODM_RTL8812)||(ICType==ODM_RTL8192E)) //add 8812AU/8812AE
|
||||
{
|
||||
(*EDCA_BE_UL) = 0x5ea42b;
|
||||
(*EDCA_BE_DL) = 0x5ea42b;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8812A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx\n",(*EDCA_BE_UL),(*EDCA_BE_DL)));
|
||||
}
|
||||
|
||||
if((ICType==ODM_RTL8814A) && (IOTPeer == HT_IOT_PEER_REALTEK)) /*8814AU and 8814AR*/
|
||||
{
|
||||
(*EDCA_BE_UL) = 0x5ea42b;
|
||||
(*EDCA_BE_DL) = 0xa42b;
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("8814A: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx\n",(*EDCA_BE_UL),(*EDCA_BE_DL)));
|
||||
}
|
||||
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Special: EDCA_BE_UL=0x%lx EDCA_BE_DL =0x%lx, IOTPeer = %d\n",(*EDCA_BE_UL),(*EDCA_BE_DL), IOTPeer));
|
||||
|
||||
}
|
||||
|
||||
|
||||
VOID
|
||||
odm_EdcaChooseTrafficIdx(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u8Byte cur_tx_bytes,
|
||||
IN u8Byte cur_rx_bytes,
|
||||
IN BOOLEAN bBiasOnRx,
|
||||
OUT BOOLEAN *pbIsCurRDLState
|
||||
)
|
||||
{
|
||||
PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
|
||||
|
||||
if(bBiasOnRx)
|
||||
{
|
||||
|
||||
if(cur_tx_bytes>(cur_rx_bytes*4))
|
||||
{
|
||||
*pbIsCurRDLState=FALSE;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Uplink Traffic\n "));
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
*pbIsCurRDLState=TRUE;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n"));
|
||||
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if(cur_rx_bytes>(cur_tx_bytes*4))
|
||||
{
|
||||
*pbIsCurRDLState=TRUE;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Downlink Traffic\n"));
|
||||
|
||||
}
|
||||
else
|
||||
{
|
||||
*pbIsCurRDLState=FALSE;
|
||||
ODM_RT_TRACE(pDM_Odm,ODM_COMP_EDCA_TURBO,ODM_DBG_LOUD,("Balance Traffic\n"));
|
||||
}
|
||||
}
|
||||
|
||||
return ;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -0,0 +1,100 @@
|
||||
/******************************************************************************
|
||||
*
|
||||
* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of version 2 of the GNU General Public License as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
|
||||
*
|
||||
*
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __PHYDMEDCATURBOCHECK_H__
|
||||
#define __PHYDMEDCATURBOCHECK_H__
|
||||
|
||||
/*#define EDCATURBO_VERSION "2.1"*/
|
||||
#define EDCATURBO_VERSION "2.3" /*2015.07.29 by YuChen*/
|
||||
|
||||
typedef struct _EDCA_TURBO_
|
||||
{
|
||||
BOOLEAN bCurrentTurboEDCA;
|
||||
BOOLEAN bIsCurRDLState;
|
||||
|
||||
#if(DM_ODM_SUPPORT_TYPE == ODM_CE )
|
||||
u4Byte prv_traffic_idx; // edca turbo
|
||||
#endif
|
||||
|
||||
}EDCA_T,*pEDCA_T;
|
||||
|
||||
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
|
||||
static u4Byte edca_setting_UL[HT_IOT_PEER_MAX] =
|
||||
// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU MARVELL 92U_AP SELF_AP(DownLink/Tx)
|
||||
{ 0x5e4322, 0xa44f, 0x5e4322, 0x5ea32b, 0x5ea422, 0x5ea322, 0x3ea430, 0x5ea42b, 0x5ea44f, 0x5e4322, 0x5e4322};
|
||||
|
||||
|
||||
static u4Byte edca_setting_DL[HT_IOT_PEER_MAX] =
|
||||
// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP(UpLink/Rx)
|
||||
{ 0xa44f, 0x5ea44f, 0x5e4322, 0x5ea42b, 0xa44f, 0xa630, 0x5ea630, 0x5ea42b, 0xa44f, 0xa42b, 0xa42b};
|
||||
|
||||
static u4Byte edca_setting_DL_GMode[HT_IOT_PEER_MAX] =
|
||||
// UNKNOWN REALTEK_90 REALTEK_92SE BROADCOM RALINK ATHEROS CISCO MERU, MARVELL 92U_AP SELF_AP
|
||||
{ 0x4322, 0xa44f, 0x5e4322, 0xa42b, 0x5e4322, 0x4322, 0xa42b, 0x5ea42b, 0xa44f, 0x5e4322, 0x5ea42b};
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
VOID
|
||||
odm_EdcaTurboCheck(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
VOID
|
||||
ODM_EdcaTurboInit(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
#if(DM_ODM_SUPPORT_TYPE==ODM_WIN)
|
||||
VOID
|
||||
odm_EdcaTurboCheckMP(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
|
||||
//check if edca turbo is disabled
|
||||
BOOLEAN
|
||||
odm_IsEdcaTurboDisable(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
//choose edca paramter for special IOT case
|
||||
VOID
|
||||
ODM_EdcaParaSelByIot(
|
||||
IN PVOID pDM_VOID,
|
||||
OUT u4Byte *EDCA_BE_UL,
|
||||
OUT u4Byte *EDCA_BE_DL
|
||||
);
|
||||
//check if it is UL or DL
|
||||
VOID
|
||||
odm_EdcaChooseTrafficIdx(
|
||||
IN PVOID pDM_VOID,
|
||||
IN u8Byte cur_tx_bytes,
|
||||
IN u8Byte cur_rx_bytes,
|
||||
IN BOOLEAN bBiasOnRx,
|
||||
OUT BOOLEAN *pbIsCurRDLState
|
||||
);
|
||||
|
||||
#elif (DM_ODM_SUPPORT_TYPE==ODM_CE)
|
||||
VOID
|
||||
odm_EdcaTurboCheckCE(
|
||||
IN PVOID pDM_VOID
|
||||
);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user