rtl8723ds: Fix builds for kernel 4.14

Signed-off-by: Alexander Kaplan <alex@nextthing.co>
Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net>
This commit is contained in:
Larry Finger 2017-10-14 09:31:11 -05:00
parent e87533e664
commit eb9c1aa49f
17 changed files with 420 additions and 421 deletions

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@ -4638,6 +4638,4 @@ void rtw_getrttbl_cmd_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd)
if (padapter->registrypriv.mp_mode == 1) if (padapter->registrypriv.mp_mode == 1)
padapter->mppriv.workparam.bcompleted = _TRUE; padapter->mppriv.workparam.bcompleted = _TRUE;
#endif #endif
} }

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@ -1067,7 +1067,7 @@ _adapter *rtw_get_iface_by_id(_adapter *padapter, u8 iface_id)
_adapter *iface = NULL; _adapter *iface = NULL;
struct dvobj_priv *dvobj = adapter_to_dvobj(padapter); struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
if ((padapter == NULL) || (iface_id >= CONFIG_IFACE_NUMBER)) { if (iface_id >= CONFIG_IFACE_NUMBER) {
rtw_warn_on(1); rtw_warn_on(1);
return iface; return iface;
} }

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@ -2142,6 +2142,7 @@ void rtw_sta_media_status_rpt(_adapter *adapter, struct sta_info *sta, bool conn
role = H2C_MSR_ROLE_TDLS; role = H2C_MSR_ROLE_TDLS;
else else
#endif #endif
{
if (MLME_IS_STA(adapter)) { if (MLME_IS_STA(adapter)) {
if (MLME_IS_GC(adapter)) if (MLME_IS_GC(adapter))
role = H2C_MSR_ROLE_GO; role = H2C_MSR_ROLE_GO;
@ -2156,25 +2157,24 @@ void rtw_sta_media_status_rpt(_adapter *adapter, struct sta_info *sta, bool conn
role = H2C_MSR_ROLE_ADHOC; role = H2C_MSR_ROLE_ADHOC;
#ifdef CONFIG_WFD #ifdef CONFIG_WFD
if (role == H2C_MSR_ROLE_GC if (role == H2C_MSR_ROLE_GC || role == H2C_MSR_ROLE_GO ||
|| role == H2C_MSR_ROLE_GO role == H2C_MSR_ROLE_TDLS) {
|| role == H2C_MSR_ROLE_TDLS if (adapter->wfd_info.rtsp_ctrlport ||
) { adapter->wfd_info.tdls_rtsp_ctrlport ||
if (adapter->wfd_info.rtsp_ctrlport adapter->wfd_info.peer_rtsp_ctrlport)
|| adapter->wfd_info.tdls_rtsp_ctrlport rtw_wfd_st_switch(sta, 1);
|| adapter->wfd_info.peer_rtsp_ctrlport) }
rtw_wfd_st_switch(sta, 1);
}
#endif #endif
} }
rtw_hal_set_FwMediaStatusRpt_single_cmd(adapter rtw_hal_set_FwMediaStatusRpt_single_cmd(adapter
, connected , connected
, miracast_enabled , miracast_enabled
, miracast_sink , miracast_sink
, role , role
, sta->mac_id , sta->mac_id
); );
}
} }
u8 rtw_sta_media_status_rpt_cmd(_adapter *adapter, struct sta_info *sta, bool connected) u8 rtw_sta_media_status_rpt_cmd(_adapter *adapter, struct sta_info *sta, bool connected)

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@ -836,7 +836,7 @@ u32 mp_join(PADAPTER padapter, u8 mode)
goto end_of_mp_start_test; goto end_of_mp_start_test;
} }
if (mode == WIFI_FW_ADHOC_STATE) if (mode == WIFI_FW_ADHOC_STATE)
set_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE); set_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE);
else else
set_fwstate(pmlmepriv, WIFI_STATION_STATE); set_fwstate(pmlmepriv, WIFI_STATION_STATE);
/* 3 3. join psudo AdHoc */ /* 3 3. join psudo AdHoc */

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@ -2042,10 +2042,12 @@ u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf)
RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_sdt_scid[i]); RTW_PUT_BE16(p2pie + p2pielen, pmlmepriv->p2p_sdt_scid[i]);
p2pielen += 2; p2pielen += 2;
} }
} else } else {
#endif /* CONFIG_INTEL_WIDI */ #endif /* CONFIG_INTEL_WIDI */
p2pie[p2pielen++] = 0x00; /* No Secondary Device Type List */ p2pie[p2pielen++] = 0x00; /* No Secondary Device Type List */
#ifdef CONFIG_INTEL_WIDI
}
#endif
/* Device Name */ /* Device Name */
/* Type: */ /* Type: */
/* *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); */ /* *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); */

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@ -3216,8 +3216,8 @@ void rtw_reordering_ctrl_timeout_handler(void *pcontext)
_enter_critical_bh(&ppending_recvframe_queue->lock, &irql); _enter_critical_bh(&ppending_recvframe_queue->lock, &irql);
if (preorder_ctrl) // if (preorder_ctrl)
preorder_ctrl->bReorderWaiting = _FALSE; preorder_ctrl->bReorderWaiting = _FALSE;
if (recv_indicatepkts_in_order(padapter, preorder_ctrl, _TRUE) == _TRUE) if (recv_indicatepkts_in_order(padapter, preorder_ctrl, _TRUE) == _TRUE)
_set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME); _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME);

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@ -4673,7 +4673,11 @@ int rtw_dev_nlo_info_set(struct pno_nlo_info *nlo_info, pno_ssid_t *ssid,
source = rtw_zmalloc(2048); source = rtw_zmalloc(2048);
if (source != NULL) { if (source != NULL) {
len = vfs_read(fp, source, len, &pos); #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0))
len = kernel_read(fp, source, len, &pos);
#else
len = vfs_read(fp, source, len, &pos);
#endif
rtw_parse_cipher_list(nlo_info, source); rtw_parse_cipher_list(nlo_info, source);
rtw_mfree(source, 2048); rtw_mfree(source, 2048);
} }

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@ -3833,8 +3833,9 @@ s32 rtw_monitor_xmit_entry(struct sk_buff *skb, struct net_device *ndev)
struct ieee80211_radiotap_header *rtap_hdr; struct ieee80211_radiotap_header *rtap_hdr;
_adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev);
if (skb) if (!skb)
rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize); return 1;
rtw_mstat_update(MSTAT_TYPE_SKB, MSTAT_ALLOC_SUCCESS, skb->truesize);
if (unlikely(skb->len < sizeof(struct ieee80211_radiotap_header))) if (unlikely(skb->len < sizeof(struct ieee80211_radiotap_header)))
goto fail; goto fail;

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@ -103,4 +103,4 @@ phydm_GetNHMStatisticsAP(
#endif //#if ( DM_ODM_SUPPORT_TYPE & ODM_AP ) #endif //#if ( DM_ODM_SUPPORT_TYPE & ODM_AP )
#endif //#ifndef __PHYDMACS_H__ #endif //#ifndef __PHYDMACS_H__

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@ -67,4 +67,4 @@ ODM_ParsingCFO(
IN u1Byte num_ss IN u1Byte num_ss
); );
#endif #endif

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@ -58,100 +58,100 @@
/* Tx Power Tracking*/ /* Tx Power Tracking*/
void setIqkMatrix_8723D( void setIqkMatrix_8723D(PDM_ODM_T pDM_Odm,
PDM_ODM_T pDM_Odm,
u1Byte OFDM_index, u1Byte OFDM_index,
u1Byte RFPath, u1Byte RFPath,
s4Byte IqkResult_X, s4Byte IqkResult_X,
s4Byte IqkResult_Y s4Byte IqkResult_Y)
) {
{ s4Byte ele_A = 0, ele_D = 0, ele_C = 0, value32, tmp;
s4Byte ele_A = 0, ele_D = 0, ele_C = 0, value32, tmp; s4Byte ele_A_ext = 0, ele_C_ext = 0, ele_D_ext = 0;
s4Byte ele_A_ext = 0, ele_C_ext = 0, ele_D_ext = 0;
if (OFDM_index >= OFDM_TABLE_SIZE) if (OFDM_index >= OFDM_TABLE_SIZE)
OFDM_index = OFDM_TABLE_SIZE-1; OFDM_index = OFDM_TABLE_SIZE-1;
else if (OFDM_index < 0) else if (OFDM_index < 0)
OFDM_index = 0; OFDM_index = 0;
if ((IqkResult_X != 0) && (*(pDM_Odm->pBandType) == ODM_BAND_2_4G)) {
/* new element D */
ele_D = (OFDMSwingTable_New[OFDM_index] & 0xFFC00000)>>22;
ele_D_ext = (((IqkResult_X * ele_D)>>7)&0x01);
/* new element A */
if ((IqkResult_X & 0x00000200) != 0) /* consider minus */
IqkResult_X = IqkResult_X | 0xFFFFFC00;
ele_A = ((IqkResult_X * ele_D)>>8)&0x000003FF;
ele_A_ext = ((IqkResult_X * ele_D)>>7) & 0x1;
/* new element C */
if ((IqkResult_Y & 0x00000200) != 0)
IqkResult_Y = IqkResult_Y | 0xFFFFFC00;
ele_C = ((IqkResult_Y * ele_D)>>8)&0x000003FF;
ele_C_ext = ((IqkResult_Y * ele_D)>>7) & 0x1;
switch (RFPath) {
case ODM_RF_PATH_A:
/* write new elements A, C, D to regC80, regC94, reg0xc4c, and element B is always 0 */
/* write 0xc80 */
value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A;
ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, value32);
/* write 0xc94 */
value32 = (ele_C & 0x000003C0) >> 6;
ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, value32);
/* write 0xc4c */
value32 = (ele_D_ext << 28) | (ele_A_ext << 31) | (ele_C_ext << 29);
value32 = (ODM_GetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord)&(~(BIT31|BIT29|BIT28))) | value32;
ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord, value32);
break;
case ODM_RF_PATH_B:
/*wirte new elements A, C, D to regCd0 and regCd4, element B is always 0*/
value32 = ele_D;
ODM_SetBBReg(pDM_Odm, 0xCd4, 0x007FE000, value32);
value32 = ele_C; if ((IqkResult_X != 0) && (*(pDM_Odm->pBandType) == ODM_BAND_2_4G)) {
ODM_SetBBReg(pDM_Odm, 0xCd4, 0x000007FE, value32); /* new element D */
ele_D = (OFDMSwingTable_New[OFDM_index] & 0xFFC00000)>>22;
ele_D_ext = (((IqkResult_X * ele_D)>>7)&0x01);
/* new element A */
if ((IqkResult_X & 0x00000200) != 0) /* consider minus */
IqkResult_X = IqkResult_X | 0xFFFFFC00;
ele_A = ((IqkResult_X * ele_D)>>8)&0x000003FF;
ele_A_ext = ((IqkResult_X * ele_D)>>7) & 0x1;
/* new element C */
if ((IqkResult_Y & 0x00000200) != 0)
IqkResult_Y = IqkResult_Y | 0xFFFFFC00;
ele_C = ((IqkResult_Y * ele_D)>>8)&0x000003FF;
ele_C_ext = ((IqkResult_Y * ele_D)>>7) & 0x1;
value32 = ele_A; switch (RFPath) {
ODM_SetBBReg(pDM_Odm, 0xCd0, 0x000007FE, value32); case ODM_RF_PATH_A:
/* write new elements A, C, D to regC80, regC94, reg0xc4c, and element B is always 0 */
/* write 0xc80 */
value32 = (ele_D << 22) | ((ele_C & 0x3F) << 16) | ele_A;
ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, value32);
/* write 0xc94 */
value32 = (ele_C & 0x000003C0) >> 6;
ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, value32);
/* write 0xc4c */
value32 = (ele_D_ext << 28) | (ele_A_ext << 31) | (ele_C_ext << 29);
value32 = (ODM_GetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord)&(~(BIT31|BIT29|BIT28))) | value32;
ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord, value32);
break;
case ODM_RF_PATH_B:
/*wirte new elements A, C, D to regCd0 and regCd4, element B is always 0*/
value32 = ele_D;
ODM_SetBBReg(pDM_Odm, 0xCd4, 0x007FE000, value32);
ODM_SetBBReg(pDM_Odm, 0xCd4, BIT12, ele_D_ext); value32 = ele_C;
ODM_SetBBReg(pDM_Odm, 0xCd0, BIT0, ele_A_ext); ODM_SetBBReg(pDM_Odm, 0xCd4, 0x000007FE, value32);
ODM_SetBBReg(pDM_Odm, 0xCd4, BIT0, ele_C_ext);
break;
default:
break;
}
} else {
switch (RFPath) {
case ODM_RF_PATH_A:
ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]);
ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00);
value32 = ODM_GetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord)&(~(BIT31|BIT29|BIT28));
ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord, value32);
break;
case ODM_RF_PATH_B:
/*image S1:c80 to S0:Cd0 and Cd4*/
ODM_SetBBReg(pDM_Odm, 0xcd0, 0x000007FE, OFDMSwingTable_New[OFDM_index]&0x000003FF);
ODM_SetBBReg(pDM_Odm, 0xcd0, 0x0007E000, (OFDMSwingTable_New[OFDM_index]&0x0000FC00)>>10);
ODM_SetBBReg(pDM_Odm, 0xcd4, 0x0000007E, (OFDMSwingTable_New[OFDM_index]&0x003F0000)>>16);
ODM_SetBBReg(pDM_Odm, 0xcd4, 0x007FE000, (OFDMSwingTable_New[OFDM_index]&0xFFC00000)>>22);
ODM_SetBBReg(pDM_Odm, 0xcd4, 0x00000780, 0x00);
ODM_SetBBReg(pDM_Odm, 0xcd4, BIT12, 0x0); value32 = ele_A;
ODM_SetBBReg(pDM_Odm, 0xcd4, BIT0, 0x0); ODM_SetBBReg(pDM_Odm, 0xCd0, 0x000007FE, value32);
ODM_SetBBReg(pDM_Odm, 0xcd0, BIT0, 0x0);
break; ODM_SetBBReg(pDM_Odm, 0xCd4, BIT12, ele_D_ext);
default: ODM_SetBBReg(pDM_Odm, 0xCd0, BIT0, ele_A_ext);
break; ODM_SetBBReg(pDM_Odm, 0xCd4, BIT0, ele_C_ext);
} break;
default:
break;
}
} else {
switch (RFPath) {
case ODM_RF_PATH_A:
ODM_SetBBReg(pDM_Odm, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable_New[OFDM_index]);
ODM_SetBBReg(pDM_Odm, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00);
value32 = ODM_GetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord)&(~(BIT31|BIT29|BIT28));
ODM_SetBBReg(pDM_Odm, rOFDM0_ECCAThreshold, bMaskDWord, value32);
break;
case ODM_RF_PATH_B:
/*image S1:c80 to S0:Cd0 and Cd4*/
ODM_SetBBReg(pDM_Odm, 0xcd0, 0x000007FE, OFDMSwingTable_New[OFDM_index]&0x000003FF);
ODM_SetBBReg(pDM_Odm, 0xcd0, 0x0007E000, (OFDMSwingTable_New[OFDM_index]&0x0000FC00)>>10);
ODM_SetBBReg(pDM_Odm, 0xcd4, 0x0000007E, (OFDMSwingTable_New[OFDM_index]&0x003F0000)>>16);
ODM_SetBBReg(pDM_Odm, 0xcd4, 0x007FE000, (OFDMSwingTable_New[OFDM_index]&0xFFC00000)>>22);
ODM_SetBBReg(pDM_Odm, 0xcd4, 0x00000780, 0x00);
ODM_SetBBReg(pDM_Odm, 0xcd4, BIT12, 0x0);
ODM_SetBBReg(pDM_Odm, 0xcd4, BIT0, 0x0);
ODM_SetBBReg(pDM_Odm, 0xcd0, BIT0, 0x0);
break;
default:
break;
} }
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("TxPwrTracking path %c: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x ele_A_ext = 0x%x ele_C_ext = 0x%x ele_D_ext = 0x%x\n",
(RFPath == ODM_RF_PATH_A ? 'A' : 'B'), (u4Byte)IqkResult_X, (u4Byte)IqkResult_Y, (u4Byte)ele_A, (u4Byte)ele_C, (u4Byte)ele_D, (u4Byte)ele_A_ext, (u4Byte)ele_C_ext, (u4Byte)ele_D_ext));
} }
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD,
("TxPwrTracking path %c: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x ele_A_ext = 0x%x ele_C_ext = 0x%x ele_D_ext = 0x%x\n",
(RFPath == ODM_RF_PATH_A ? 'A' : 'B'),
(u4Byte)IqkResult_X, (u4Byte)IqkResult_Y,
(u4Byte)ele_A, (u4Byte)ele_C, (u4Byte)ele_D,
(u4Byte)ele_A_ext, (u4Byte)ele_C_ext,
(u4Byte)ele_D_ext));
}
VOID VOID
setCCKFilterCoefficient_8723D( setCCKFilterCoefficient_8723D(
@ -270,7 +270,7 @@ ODM_TxPwrTrackSetPwr_8723D(
TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate); TxRate = Adapter->HalFunc.GetHwRateFromMRateHandler(pDM_Odm->TxRate);
#elif (DM_ODM_SUPPORT_TYPE & (ODM_CE)) #elif (DM_ODM_SUPPORT_TYPE & (ODM_CE))
if (pDM_Odm->number_linked_client != 0) if (pDM_Odm->number_linked_client != 0)
TxRate = HwRateToMRate(pDM_Odm->TxRate); TxRate = HwRateToMRate(pDM_Odm->TxRate);
#endif #endif
} else { /*force rate*/ } else { /*force rate*/
TxRate = (u1Byte)rate; TxRate = (u1Byte)rate;
@ -342,27 +342,27 @@ ODM_TxPwrTrackSetPwr_8723D(
if (RFPath == ODM_RF_PATH_A) { if (RFPath == ODM_RF_PATH_A) {
/*CCK Path S1*/ /*CCK Path S1*/
pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF);
pwr += pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_A]; pwr += pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_A];
PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pwr); PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pwr);
TxAGC = (pwr<<16)|(pwr<<8)|(pwr); TxAGC = (pwr<<16)|(pwr<<8)|(pwr);
PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0x00ffffff, TxAGC); PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0x00ffffff, TxAGC);
RT_DISP(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr_8723D: CCK Tx-rf(A) Power = 0x%x\n", TxAGC)); RT_DISP(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr_8723D: CCK Tx-rf(A) Power = 0x%x\n", TxAGC));
/*OFDM Path S1*/ /*OFDM Path S1*/
pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF); pwr = PHY_QueryBBReg(Adapter, rTxAGC_A_Rate18_06, 0xFF);
pwr += (pRFCalibrateInfo->BbSwingIdxOfdm[ODM_RF_PATH_A] - pRFCalibrateInfo->BbSwingIdxOfdmBase[ODM_RF_PATH_A]); pwr += (pRFCalibrateInfo->BbSwingIdxOfdm[ODM_RF_PATH_A] - pRFCalibrateInfo->BbSwingIdxOfdmBase[ODM_RF_PATH_A]);
TxAGC = ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr); TxAGC = ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr);
PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC);
PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC);
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC);
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC);
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); PHY_SetBBReg(Adapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC);
PHY_SetBBReg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); PHY_SetBBReg(Adapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC);
RT_DISP(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr_8723D: OFDM Tx-rf(A) Power = 0x%x\n", TxAGC)); RT_DISP(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr_8723D: OFDM Tx-rf(A) Power = 0x%x\n", TxAGC));
} else if (RFPath == ODM_RF_PATH_B) { } else if (RFPath == ODM_RF_PATH_B) {
pwr = PHY_QueryBBReg(Adapter, rTxAGC_B_Rate18_06, 0xFF); pwr = PHY_QueryBBReg(Adapter, rTxAGC_B_Rate18_06, 0xFF);
pwr += pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_B]; pwr += pRFCalibrateInfo->PowerIndexOffset[ODM_RF_PATH_B];
PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, bMaskByte3, pwr); PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, bMaskByte3, pwr);
PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xff000000, pwr); PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xff000000, pwr);
RT_DISP(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr_8723D: CCK Tx-rf(B) Power = 0x%x\n", pwr)); RT_DISP(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr_8723D: CCK Tx-rf(B) Power = 0x%x\n", pwr));
@ -370,13 +370,13 @@ ODM_TxPwrTrackSetPwr_8723D(
pwr = PHY_QueryBBReg(Adapter, rTxAGC_B_Rate18_06, 0xFF); pwr = PHY_QueryBBReg(Adapter, rTxAGC_B_Rate18_06, 0xFF);
pwr += (pRFCalibrateInfo->BbSwingIdxOfdm[ODM_RF_PATH_B] - pRFCalibrateInfo->BbSwingIdxOfdmBase[ODM_RF_PATH_B]); pwr += (pRFCalibrateInfo->BbSwingIdxOfdm[ODM_RF_PATH_B] - pRFCalibrateInfo->BbSwingIdxOfdmBase[ODM_RF_PATH_B]);
TxAGC = ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr); TxAGC = ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr);
PHY_SetBBReg(Adapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC); PHY_SetBBReg(Adapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC);
PHY_SetBBReg(Adapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC); PHY_SetBBReg(Adapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC);
PHY_SetBBReg(Adapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC); PHY_SetBBReg(Adapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC);
PHY_SetBBReg(Adapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC); PHY_SetBBReg(Adapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC);
PHY_SetBBReg(Adapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC); PHY_SetBBReg(Adapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC);
PHY_SetBBReg(Adapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC); PHY_SetBBReg(Adapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC);
RT_DISP(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr_8723D: OFDM Tx-rf(B) Power = 0x%x\n", TxAGC)); RT_DISP(FPHY, PHY_TXPWR, ("ODM_TxPwrTrackSetPwr_8723D: OFDM Tx-rf(B) Power = 0x%x\n", TxAGC));
} }
#endif #endif
@ -425,12 +425,12 @@ ODM_TxPwrTrackSetPwr_8723D(
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Final_CCK_Swing_Index=%d\n", Final_CCK_Swing_Index)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("Final_CCK_Swing_Index=%d\n", Final_CCK_Swing_Index));
} else if (Method == MIX_MODE) { } else if (Method == MIX_MODE) {
#if (MP_DRIVER == 1) #if (MP_DRIVER == 1)
u4Byte TxAGC = 0; /*add by Mingzhi.Guo 2015-04-10*/ u4Byte TxAGC = 0; /*add by Mingzhi.Guo 2015-04-10*/
s4Byte pwr = 0; s4Byte pwr = 0;
#endif #endif
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("pDM_Odm->DefaultOfdmIndex=%d, pDM_Odm->DefaultCCKIndex=%d, pDM_Odm->Absolute_OFDMSwingIdx[RFPath]=%d, RF_Path = %d\n", ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("pDM_Odm->DefaultOfdmIndex=%d, pDM_Odm->DefaultCCKIndex=%d, pDM_Odm->Absolute_OFDMSwingIdx[RFPath]=%d, RF_Path = %d\n",
pRFCalibrateInfo->DefaultOfdmIndex, pRFCalibrateInfo->DefaultCckIndex, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath], RFPath)); pRFCalibrateInfo->DefaultOfdmIndex, pRFCalibrateInfo->DefaultCckIndex, pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath], RFPath));
Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath]; Final_OFDM_Swing_Index = pRFCalibrateInfo->DefaultOfdmIndex + pRFCalibrateInfo->Absolute_OFDMSwingIdx[RFPath];
@ -472,7 +472,7 @@ ODM_TxPwrTrackSetPwr_8723D(
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A Lower then BBSwing lower bound 0 , Remnant TxAGC Value = %d \n", pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath])); ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A Lower then BBSwing lower bound 0 , Remnant TxAGC Value = %d \n", pRFCalibrateInfo->Remnant_OFDMSwingIdx[RFPath]));
} else { } else {
setIqkMatrix_8723D(pDM_Odm, Final_OFDM_Swing_Index, ODM_RF_PATH_A, setIqkMatrix_8723D(pDM_Odm, Final_OFDM_Swing_Index, ODM_RF_PATH_A,
pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0],
pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]); pRFCalibrateInfo->IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]);
setIqkMatrix_8723D(pDM_Odm, Final_OFDM_Swing_Index, ODM_RF_PATH_B, setIqkMatrix_8723D(pDM_Odm, Final_OFDM_Swing_Index, ODM_RF_PATH_B,
@ -500,9 +500,9 @@ ODM_TxPwrTrackSetPwr_8723D(
pwr += (pRFCalibrateInfo->Remnant_OFDMSwingIdx[ODM_RF_PATH_A] - pRFCalibrateInfo->Modify_TxAGC_Value_OFDM); pwr += (pRFCalibrateInfo->Remnant_OFDMSwingIdx[ODM_RF_PATH_A] - pRFCalibrateInfo->Modify_TxAGC_Value_OFDM);
if (pwr > 0x3F) if (pwr > 0x3F)
pwr = 0x3F; pwr = 0x3F;
else if (pwr < 0) else if (pwr < 0)
pwr = 0; pwr = 0;
TxAGC |= ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr); TxAGC |= ((pwr<<24)|(pwr<<16)|(pwr<<8)|pwr);
PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC);
@ -530,11 +530,6 @@ ODM_TxPwrTrackSetPwr_8723D(
ODM_SetBBReg(pDM_Odm, 0xab4, 0x000007FF, CCKSwingTable_Ch1_Ch14_8723D[PwrTrackingLimit_CCK]); ODM_SetBBReg(pDM_Odm, 0xab4, 0x000007FF, CCKSwingTable_Ch1_Ch14_8723D[PwrTrackingLimit_CCK]);
pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = TRUE; pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = TRUE;
/*Set TxAGC Page C{};*/
/* PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, CCK);
PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_B, pHalData->CurrentChannel, CCK);*/
} else if (Final_CCK_Swing_Index < 0) { } else if (Final_CCK_Swing_Index < 0) {
pRFCalibrateInfo->Remnant_CCKSwingIdx = Final_CCK_Swing_Index; pRFCalibrateInfo->Remnant_CCKSwingIdx = Final_CCK_Swing_Index;
@ -554,25 +549,25 @@ ODM_TxPwrTrackSetPwr_8723D(
ODM_SetBBReg(pDM_Odm, 0xab4, 0x000007FF, CCKSwingTable_Ch1_Ch14_8723D[Final_CCK_Swing_Index]); ODM_SetBBReg(pDM_Odm, 0xab4, 0x000007FF, CCKSwingTable_Ch1_Ch14_8723D[Final_CCK_Swing_Index]);
/* if (pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK) {*/ /* if (pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK) {*/
pRFCalibrateInfo->Remnant_CCKSwingIdx = 0; pRFCalibrateInfo->Remnant_CCKSwingIdx = 0;
/*PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, CCK ); /*PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_A, pHalData->CurrentChannel, CCK );
PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_B, pHalData->CurrentChannel, CCK );*/ PHY_SetTxPowerIndexByRateSection(Adapter, ODM_RF_PATH_B, pHalData->CurrentChannel, CCK );*/
pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = FALSE; pRFCalibrateInfo->Modify_TxAGC_Flag_PathA_CCK = FALSE;
ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A pDM_Odm->Modify_TxAGC_Flag_CCK = FALSE \n")); ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("******Path_A pDM_Odm->Modify_TxAGC_Flag_CCK = FALSE \n"));
} }
#if (MP_DRIVER == 1) #if (MP_DRIVER == 1)
if ((pDM_Odm->mp_mode) == 1) { if ((pDM_Odm->mp_mode) == 1) {
pwr = PHY_QueryBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte1); pwr = PHY_QueryBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte1);
pwr += pRFCalibrateInfo->Remnant_CCKSwingIdx-pRFCalibrateInfo->Modify_TxAGC_Value_CCK; pwr += pRFCalibrateInfo->Remnant_CCKSwingIdx-pRFCalibrateInfo->Modify_TxAGC_Value_CCK;
if (pwr > 0x3F) if (pwr > 0x3F)
pwr = 0x3F; pwr = 0x3F;
else if (pwr < 0) else if (pwr < 0)
pwr = 0; pwr = 0;
PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pwr); PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, pwr);
TxAGC = (pwr<<16)|(pwr<<8)|(pwr); TxAGC = (pwr<<16)|(pwr<<8)|(pwr);
@ -975,7 +970,7 @@ phy_PathS1_RxIQK_8723D(
u4Byte originalPath, originalGNT; u4Byte originalPath, originalGNT;
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
PDM_ODM_T pDM_Odm = &pHalData->odmpriv; PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
#endif #endif
@ -1331,28 +1326,25 @@ phy_PathS0_IQK_8723D(
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x1, BIT0, 0x0); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x1, BIT0, 0x0);
/* Check failed*/ /* Check failed*/
regEAC_S0 = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord); regEAC_S0 = ODM_GetBBReg(pDM_Odm, rRx_Power_After_IQK_A_2, bMaskDWord);
regE94_S0 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord); regE94_S0 = ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord);
regE9C_S0 = ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord); regE9C_S0 = ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord);
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xeac_s0 = 0x%x\n", regEAC_S0)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xeac_s0 = 0x%x\n", regEAC_S0));
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe94_s0 = 0x%x, 0xe9c_s0 = 0x%x\n", regE94_S0, regE9C_S0)); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe94_s0 = 0x%x, 0xe9c_s0 = 0x%x\n", regE94_S0, regE9C_S0));
/*monitor image power before & after IQK*/ /*monitor image power before & after IQK*/
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe90_s0(before IQK)= 0x%x, 0xe98_s0(afer IQK) = 0x%x\n", ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]0xe90_s0(before IQK)= 0x%x, 0xe98_s0(afer IQK) = 0x%x\n",
ODM_GetBBReg(pDM_Odm, 0xe90, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xe98, bMaskDWord))); ODM_GetBBReg(pDM_Odm, 0xe90, bMaskDWord), ODM_GetBBReg(pDM_Odm, 0xe98, bMaskDWord)));
if (!(regEAC_S0 & BIT28) && if (!(regEAC_S0 & BIT28) &&
(((regE94_S0 & 0x03FF0000)>>16) != 0x142) && (((regE94_S0 & 0x03FF0000)>>16) != 0x142) &&
(((regE9C_S0 & 0x03FF0000)>>16) != 0x42)) (((regE9C_S0 & 0x03FF0000)>>16) != 0x42))
result |= 0x01;
else
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("S0 TXIQK FAIL\n"));
result |= 0x01; return result;
else
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("S0 TXIQK FAIL\n"));
return result;
} }
u1Byte u1Byte
phy_PathS0_RxIQK_8723D( phy_PathS0_RxIQK_8723D(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP) #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
@ -1463,31 +1455,30 @@ phy_PathS0_RxIQK_8723D(
tmp = (regE9C_S0 & 0x03FF0000)>>16; tmp = (regE9C_S0 & 0x03FF0000)>>16;
if ((tmp & 0x200) > 0) if ((tmp & 0x200) > 0)
tmp = 0x400 - tmp; tmp = 0x400 - tmp;
if (!(regEAC_S0 & BIT28) && if (!(regEAC_S0 & BIT28) &&
(((regE94_S0 & 0x03FF0000)>>16) != 0x142) && (((regE94_S0 & 0x03FF0000)>>16) != 0x142) &&
(((regE9C_S0 & 0x03FF0000)>>16) != 0x42)) (((regE9C_S0 & 0x03FF0000)>>16) != 0x42)) {
result |= 0x01; result |= 0x01;
else { } else {
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("S0 RXIQK STEP1 FAIL\n")); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("S0 RXIQK STEP1 FAIL\n"));
#if 1 #if 1
/*Restore GNT_WL/GNT_BT and Path owner*/ /*Restore GNT_WL/GNT_BT and Path owner*/
ODM_SetBBReg(pDM_Odm, REG_LTECOEX_WRITE_DATA, bMaskDWord, originalGNT); ODM_SetBBReg(pDM_Odm, REG_LTECOEX_WRITE_DATA, bMaskDWord, originalGNT);
ODM_SetBBReg(pDM_Odm, REG_LTECOEX_CTRL, bMaskDWord, 0xc00f0038); ODM_SetBBReg(pDM_Odm, REG_LTECOEX_CTRL, bMaskDWord, 0xc00f0038);
ODM_SetMACReg(pDM_Odm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, originalPath); ODM_SetMACReg(pDM_Odm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, originalPath);
#endif #endif
/*reload RF path*/ /*reload RF path*/
ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, Path_SEL_BB); ODM_SetBBReg(pDM_Odm, 0x948, bMaskDWord, Path_SEL_BB);
ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000); ODM_SetBBReg(pDM_Odm, rFPGA0_IQK, 0xffffff00, 0x000000);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xde, 0x800, 0x0); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0xde, 0x800, 0x0);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2, BIT0, 0x0); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x2, BIT0, 0x0);
ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x1, BIT0, 0x0); ODM_SetRFReg(pDM_Odm, ODM_RF_PATH_A, 0x1, BIT0, 0x0);
return result; return result;
} }
u4tmp = 0x80007C00 | (regE94_S0&0x3FF0000) | ((regE9C_S0&0x3FF0000) >> 16); u4tmp = 0x80007C00 | (regE94_S0&0x3FF0000) | ((regE9C_S0&0x3FF0000) >> 16);
ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, u4tmp); ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, u4tmp);
@ -2126,7 +2117,6 @@ phy_SimularityCompare_8723D(
SimularityBitMap = 0; SimularityBitMap = 0;
for (i = 0; i < bound; i++) { for (i = 0; i < bound; i++) {
if ((i == 1) || (i == 3) || (i == 5) || (i == 7)) { if ((i == 1) || (i == 3) || (i == 5) || (i == 7)) {
if ((result[c1][i] & 0x00000200) != 0) if ((result[c1][i] & 0x00000200) != 0)
tmp1 = result[c1][i] | 0xFFFFFC00; tmp1 = result[c1][i] | 0xFFFFFC00;
@ -2154,8 +2144,9 @@ phy_SimularityCompare_8723D(
final_candidate[(i/4)] = c1; final_candidate[(i/4)] = c1;
else else
SimularityBitMap = SimularityBitMap|(1<<i); SimularityBitMap = SimularityBitMap|(1<<i);
} else } else {
SimularityBitMap = SimularityBitMap|(1<<i); SimularityBitMap = SimularityBitMap|(1<<i);
}
} }
} }
@ -2171,37 +2162,30 @@ phy_SimularityCompare_8723D(
} }
return bResult; return bResult;
} else { } else {
if (!(SimularityBitMap & 0x03)) {
for(i = 0; i < 2; i++)
result[3][i] = result[c1][i];
}
if (!(SimularityBitMap & 0x03)) { if (!(SimularityBitMap & 0x0c)) {
for(i = 0; i < 2; i++) for(i = 2; i < 4; i++)
result[3][i] = result[c1][i]; result[3][i] = result[c1][i];
} }
if (!(SimularityBitMap & 0x0c)) { if (!(SimularityBitMap & 0x30)) {
for(i = 2; i < 4; i++) for(i = 4; i < 6; i++)
result[3][i] = result[c1][i]; result[3][i] = result[c1][i];
} }
if (!(SimularityBitMap & 0x30)) { if (!(SimularityBitMap & 0xc0)) {
for(i = 4; i < 6; i++) for(i = 6; i < 8; i++)
result[3][i] = result[c1][i]; result[3][i] = result[c1][i];
}
}
if (!(SimularityBitMap & 0xc0)) {
for(i = 6; i < 8; i++)
result[3][i] = result[c1][i];
}
return FALSE; return FALSE;
} }
} }
VOID VOID
phy_IQCalibrate_8723D( phy_IQCalibrate_8723D(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP) #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
@ -2327,22 +2311,18 @@ phy_IQCalibrate_8723D(
ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00); ODM_SetBBReg(pDM_Odm, rTx_IQK, bMaskDWord, 0x01007c00);
ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800); ODM_SetBBReg(pDM_Odm, rRx_IQK, bMaskDWord, 0x01004800);
if (is2T) { if (is2T) {
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
_PHY_PathBStandBy_8723D(pAdapter); _PHY_PathBStandBy_8723D(pAdapter);
_PHY_PathADDAOn_8723D(pAdapter, ADDA_REG, FALSE, is2T); _PHY_PathADDAOn_8723D(pAdapter, ADDA_REG, FALSE, is2T);
#else #else
_PHY_PathBStandBy_8723D(pDM_Odm); _PHY_PathBStandBy_8723D(pDM_Odm);
_PHY_PathADDAOn_8723D(pDM_Odm, ADDA_REG, FALSE, is2T); _PHY_PathADDAOn_8723D(pDM_Odm, ADDA_REG, FALSE, is2T);
#endif #endif
} }
#if 1 #if 1
for (i = 0 ; i < retryCount ; i++) { for (i = 0 ; i < retryCount ; i++) {
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
@ -2430,52 +2410,52 @@ if (is2T) {
PathS0_OK = phy_PathS0_IQK_8723D(pDM_Odm); PathS0_OK = phy_PathS0_IQK_8723D(pDM_Odm);
#endif #endif
if (PathS0_OK == 0x01) { if (PathS0_OK == 0x01) {
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path S0 Tx IQK Success!!\n")); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path S0 Tx IQK Success!!\n"));
result[t][4] = (ODM_GetBBReg(pDM_Odm, 0xe94, bMaskDWord)&0x3FF0000)>>16; result[t][4] = (ODM_GetBBReg(pDM_Odm, 0xe94, bMaskDWord)&0x3FF0000)>>16;
result[t][5] = (ODM_GetBBReg(pDM_Odm, 0xe9c, bMaskDWord)&0x3FF0000)>>16; result[t][5] = (ODM_GetBBReg(pDM_Odm, 0xe9c, bMaskDWord)&0x3FF0000)>>16;
break; break;
} else { } else {
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path S0 Tx IQK Fail!!\n")); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path S0 Tx IQK Fail!!\n"));
result[t][4] = 0x100; result[t][4] = 0x100;
result[t][5] = 0x0; result[t][5] = 0x0;
cnt_IQKFail++; cnt_IQKFail++;
} }
#if 0 #if 0
else if (i == (retryCount-1) && PathS1_OK == 0x01) else if (i == (retryCount-1) && PathS1_OK == 0x01)
{ {
RT_DISP(FINIT, INIT_IQK, ("Path S0 IQK Only Tx Success!!\n")); RT_DISP(FINIT, INIT_IQK, ("Path S0 IQK Only Tx Success!!\n"));
result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16; result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_B, bMaskDWord)&0x3FF0000)>>16;
result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16; result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_B, bMaskDWord)&0x3FF0000)>>16;
} }
#endif #endif
} }
#endif #endif
#if 1 #if 1
for (i = 0 ; i < retryCount ; i++) { for (i = 0 ; i < retryCount ; i++) {
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
PathS0_OK = phy_PathS0_RxIQK_8723D(pAdapter, is2T); PathS0_OK = phy_PathS0_RxIQK_8723D(pAdapter, is2T);
#else #else
PathS0_OK = phy_PathS0_RxIQK_8723D(pDM_Odm, is2T); PathS0_OK = phy_PathS0_RxIQK_8723D(pDM_Odm, is2T);
#endif #endif
if (PathS0_OK == 0x03) { if (PathS0_OK == 0x03) {
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path S0 Rx IQK Success!!\n")); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path S0 Rx IQK Success!!\n"));
/* result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;*/ /* result[t][0] = (ODM_GetBBReg(pDM_Odm, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16;*/
/* result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;*/ /* result[t][1] = (ODM_GetBBReg(pDM_Odm, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16;*/
result[t][6] = (ODM_GetBBReg(pDM_Odm, 0xea4, bMaskDWord)&0x3FF0000)>>16; result[t][6] = (ODM_GetBBReg(pDM_Odm, 0xea4, bMaskDWord)&0x3FF0000)>>16;
result[t][7] = (ODM_GetBBReg(pDM_Odm, 0xeac, bMaskDWord)&0x3FF0000)>>16; result[t][7] = (ODM_GetBBReg(pDM_Odm, 0xeac, bMaskDWord)&0x3FF0000)>>16;
break; break;
} else { } else {
ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path S0 Rx IQK Fail!!\n")); ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path S0 Rx IQK Fail!!\n"));
result[t][6] = 0x100; result[t][6] = 0x100;
result[t][7] = 0x0; result[t][7] = 0x0;
cnt_IQKFail++; cnt_IQKFail++;
}
} }
}
@ -2511,18 +2491,16 @@ for (i = 0 ; i < retryCount ; i++) {
#endif #endif
ODM_SetBBReg(pDM_Odm, 0xc50, bMaskByte0, 0x50); ODM_SetBBReg(pDM_Odm, 0xc50, bMaskByte0, 0x50);
ODM_SetBBReg(pDM_Odm, 0xc50, bMaskByte0, tmp0xc50); ODM_SetBBReg(pDM_Odm, 0xc50, bMaskByte0, tmp0xc50);
if (is2T) { if (is2T) {
ODM_SetBBReg(pDM_Odm, 0xc58, bMaskByte0, 0x50); ODM_SetBBReg(pDM_Odm, 0xc58, bMaskByte0, 0x50);
ODM_SetBBReg(pDM_Odm, 0xc58, bMaskByte0, tmp0xc58); ODM_SetBBReg(pDM_Odm, 0xc58, bMaskByte0, tmp0xc58);
} }
ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00); ODM_SetBBReg(pDM_Odm, rTx_IQK_Tone_A, bMaskDWord, 0x01008c00);
ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); ODM_SetBBReg(pDM_Odm, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00);
} }
pDM_Odm->nIQK_Cnt++; pDM_Odm->nIQK_Cnt++;
@ -2534,10 +2512,8 @@ for (i = 0 ; i < retryCount ; i++) {
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_IQCalibrate_8723D() <==\n")); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_IQCalibrate_8723D() <==\n"));
} }
VOID VOID
phy_LCCalibrate_8723D( phy_LCCalibrate_8723D(
#if (DM_ODM_SUPPORT_TYPE & ODM_CE) #if (DM_ODM_SUPPORT_TYPE & ODM_CE)
@ -3097,7 +3073,7 @@ PHY_IQCalibrate_8723D(
u4Byte Path_SEL_BB_phyIQK; u4Byte Path_SEL_BB_phyIQK;
u4Byte originalPath, originalGNT, oriPathCtrl; u4Byte originalPath, originalGNT, oriPathCtrl;
#if 1 #if 1
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("================ IQK Start ===================\n")); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("================ IQK Start ===================\n"));
#if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE) ) #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE) )
@ -3134,14 +3110,14 @@ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("================ IQK
return;*/ return;*/
/*#endif*/ /*#endif*/
bSingleTone = pMptCtx->bSingleTone; bSingleTone = pMptCtx->bSingleTone;
bCarrierSuppression = pMptCtx->bCarrierSuppression; bCarrierSuppression = pMptCtx->bCarrierSuppression;
bContinousTx = pMptCtx->bStartContTx; bContinousTx = pMptCtx->bStartContTx;
#endif #endif
/* 20120213<Kordan> Turn on when continuous Tx to pass lab testing. (required by Edlu)*/ /* 20120213<Kordan> Turn on when continuous Tx to pass lab testing. (required by Edlu)*/
if (bSingleTone || bCarrierSuppression || bContinousTx) if (bSingleTone || bCarrierSuppression || bContinousTx)
return; return;
@ -3220,45 +3196,45 @@ ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("================ IQK
is23simular = FALSE; is23simular = FALSE;
is13simular = FALSE; is13simular = FALSE;
for (i = 0; i < 3; i++) { for (i = 0; i < 3; i++) {
#if 1 #if 1
/*set path control to WL*/ /*set path control to WL*/
oriPathCtrl = ODM_GetMACReg(pDM_Odm, 0x64, bMaskByte3); /*save 0x67*/ oriPathCtrl = ODM_GetMACReg(pDM_Odm, 0x64, bMaskByte3); /*save 0x67*/
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]original 0x67 = 0x%x\n", oriPathCtrl)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]original 0x67 = 0x%x\n", oriPathCtrl));
ODM_SetMACReg(pDM_Odm, 0x64, BIT31, 0x1); ODM_SetMACReg(pDM_Odm, 0x64, BIT31, 0x1);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]set 0x67 = 0x%x\n", ODM_GetMACReg(pDM_Odm, 0x64, bMaskByte3))); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]set 0x67 = 0x%x\n", ODM_GetMACReg(pDM_Odm, 0x64, bMaskByte3)));
/*backup Path & GNT value */ /*backup Path & GNT value */
originalPath = ODM_GetMACReg(pDM_Odm, REG_LTECOEX_PATH_CONTROL, bMaskDWord); /*save 0x70*/ originalPath = ODM_GetMACReg(pDM_Odm, REG_LTECOEX_PATH_CONTROL, bMaskDWord); /*save 0x70*/
ODM_SetBBReg(pDM_Odm, REG_LTECOEX_CTRL, bMaskDWord, 0x800f0038); ODM_SetBBReg(pDM_Odm, REG_LTECOEX_CTRL, bMaskDWord, 0x800f0038);
ODM_delay_ms(1); ODM_delay_ms(1);
originalGNT = ODM_GetBBReg(pDM_Odm, REG_LTECOEX_READ_DATA, bMaskDWord); /*save 0x38*/ originalGNT = ODM_GetBBReg(pDM_Odm, REG_LTECOEX_READ_DATA, bMaskDWord); /*save 0x38*/
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]OriginalGNT = 0x%x\n", originalGNT)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]OriginalGNT = 0x%x\n", originalGNT));
/*set GNT_WL=1/GNT_BT=1 and Path owner to WiFi for pause BT traffic*/ /*set GNT_WL=1/GNT_BT=1 and Path owner to WiFi for pause BT traffic*/
ODM_SetBBReg(pDM_Odm, REG_LTECOEX_WRITE_DATA, bMaskDWord, 0x0000ff00); ODM_SetBBReg(pDM_Odm, REG_LTECOEX_WRITE_DATA, bMaskDWord, 0x0000ff00);
ODM_SetBBReg(pDM_Odm, REG_LTECOEX_CTRL, bMaskDWord, 0xc0020038); /*0x38[15:8] = 0x77*/ ODM_SetBBReg(pDM_Odm, REG_LTECOEX_CTRL, bMaskDWord, 0xc0020038); /*0x38[15:8] = 0x77*/
ODM_SetMACReg(pDM_Odm, REG_LTECOEX_PATH_CONTROL, BIT26, 0x1); ODM_SetMACReg(pDM_Odm, REG_LTECOEX_PATH_CONTROL, BIT26, 0x1);
#endif #endif
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
phy_IQCalibrate_8723D(pAdapter, result, i, TRUE); phy_IQCalibrate_8723D(pAdapter, result, i, TRUE);
#else #else
phy_IQCalibrate_8723D(pDM_Odm, result, i, TRUE); phy_IQCalibrate_8723D(pDM_Odm, result, i, TRUE);
#endif #endif
#if 1 #if 1
/*Restore GNT_WL/GNT_BT and Path owner*/ /*Restore GNT_WL/GNT_BT and Path owner*/
ODM_SetBBReg(pDM_Odm, REG_LTECOEX_WRITE_DATA, bMaskDWord, originalGNT); ODM_SetBBReg(pDM_Odm, REG_LTECOEX_WRITE_DATA, bMaskDWord, originalGNT);
ODM_SetBBReg(pDM_Odm, REG_LTECOEX_CTRL, bMaskDWord, 0xc00f0038); ODM_SetBBReg(pDM_Odm, REG_LTECOEX_CTRL, bMaskDWord, 0xc00f0038);
ODM_SetMACReg(pDM_Odm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, originalPath); ODM_SetMACReg(pDM_Odm, REG_LTECOEX_PATH_CONTROL, 0xffffffff, originalPath);
/*Restore path control owner*/ /*Restore path control owner*/
ODM_SetMACReg(pDM_Odm, 0x64, bMaskByte3, oriPathCtrl); ODM_SetMACReg(pDM_Odm, 0x64, bMaskByte3, oriPathCtrl);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]restore 0x67 = 0x%x\n", ODM_GetMACReg(pDM_Odm, 0x64, bMaskByte3))); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("[IQK]restore 0x67 = 0x%x\n", ODM_GetMACReg(pDM_Odm, 0x64, bMaskByte3)));
#endif #endif
if (i == 1) { if (i == 1) {
@ -3296,7 +3272,7 @@ for (i = 0; i < 3; i++) {
if (is23simular) { if (is23simular) {
final_candidate = 1; final_candidate = 1;
ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is23simular final_candidate is %x\n",final_candidate)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is23simular final_candidate is %x\n",final_candidate));
} else { } else {
for (i = 0; i < 8; i++) for (i = 0; i < 8; i++)
RegTmp += result[3][i]; RegTmp += result[3][i];
@ -3516,13 +3492,13 @@ PHY_APCalibrate_8723D(
#endif #endif
return; return;
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
phy_APCalibrate_8723D(pAdapter, delta, FALSE); phy_APCalibrate_8723D(pAdapter, delta, FALSE);
#else #else
phy_APCalibrate_8723D(pDM_Odm, delta, FALSE); phy_APCalibrate_8723D(pDM_Odm, delta, FALSE);
#endif #endif
} }
VOID phy_SetRFPathSwitch_8723D( VOID phy_SetRFPathSwitch_8723D(
#if (DM_ODM_SUPPORT_TYPE & ODM_AP) #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
IN PDM_ODM_T pDM_Odm, IN PDM_ODM_T pDM_Odm,
@ -3561,12 +3537,12 @@ VOID PHY_SetRFPathSwitch_8723D(
IN BOOLEAN bMain IN BOOLEAN bMain
) )
{ {
HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#if (DM_ODM_SUPPORT_TYPE == ODM_CE) #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
PDM_ODM_T pDM_Odm = &pHalData->odmpriv; PDM_ODM_T pDM_Odm = &pHalData->odmpriv;
#endif #endif
#if (DM_ODM_SUPPORT_TYPE == ODM_WIN) #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc; PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
#endif #endif
#if DISABLE_BB_RF #if DISABLE_BB_RF
@ -3574,7 +3550,7 @@ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter);
#endif #endif
#if !(DM_ODM_SUPPORT_TYPE & ODM_AP) #if !(DM_ODM_SUPPORT_TYPE & ODM_AP)
phy_SetRFPathSwitch_8723D(pAdapter, bMain, TRUE); phy_SetRFPathSwitch_8723D(pAdapter, bMain, TRUE);
#endif #endif
} }

View File

@ -59,9 +59,9 @@ odm_ConfigRF_RadioA_8723D(
u4Byte content = 0x1000; // RF_Content: radioa_txt u4Byte content = 0x1000; // RF_Content: radioa_txt
u4Byte maskforPhySet= (u4Byte)(content&0xE000); u4Byte maskforPhySet= (u4Byte)(content&0xE000);
odm_ConfigRFReg_8723D(pDM_Odm, Addr, Data, ODM_RF_PATH_A, Addr|maskforPhySet); odm_ConfigRFReg_8723D(pDM_Odm, Addr, Data, ODM_RF_PATH_A, Addr|maskforPhySet);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", Addr, Data));
} }
void void
@ -74,7 +74,7 @@ odm_ConfigRF_RadioB_8723D(
u4Byte content = 0x1001; // RF_Content: radiob_txt u4Byte content = 0x1001; // RF_Content: radiob_txt
u4Byte maskforPhySet= (u4Byte)(content&0xE000); u4Byte maskforPhySet= (u4Byte)(content&0xE000);
odm_ConfigRFReg_8723D(pDM_Odm, Addr, Data, ODM_RF_PATH_B, Addr|maskforPhySet); odm_ConfigRFReg_8723D(pDM_Odm, Addr, Data, ODM_RF_PATH_B, Addr|maskforPhySet);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigRFWithHeaderFile: [RadioB] %08X %08X\n", Addr, Data));
@ -88,7 +88,7 @@ odm_ConfigMAC_8723D(
) )
{ {
ODM_Write1Byte(pDM_Odm, Addr, Data); ODM_Write1Byte(pDM_Odm, Addr, Data);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", Addr, Data));
} }
void void
@ -103,7 +103,7 @@ odm_ConfigBB_AGC_8723D(
// Add 1us delay between BB/RF register setting. // Add 1us delay between BB/RF register setting.
ODM_delay_us(1); ODM_delay_us(1);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n", Addr, Data)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n", Addr, Data));
} }
void void
@ -164,7 +164,7 @@ odm_ConfigBB_PHY_8723D(
// Add 1us delay between BB/RF register setting. // Add 1us delay between BB/RF register setting.
ODM_delay_us(1); ODM_delay_us(1);
ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data)); ODM_RT_TRACE(pDM_Odm,ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data));
} }
void void

View File

@ -27,10 +27,6 @@
#ifndef __DRV_TYPES_H__ #ifndef __DRV_TYPES_H__
#define __DRV_TYPES_H__ #define __DRV_TYPES_H__
#ifndef is_compat_task
#define is_compat_task() 0
#endif
#include <drv_conf.h> #include <drv_conf.h>
#include <basic_types.h> #include <basic_types.h>
#include <osdep_service.h> #include <osdep_service.h>
@ -55,6 +51,10 @@
#include <drv_types_linux.h> #include <drv_types_linux.h>
#endif #endif
#ifndef is_compat_task
#define is_compat_task() 0
#endif
enum _NIC_VERSION { enum _NIC_VERSION {
RTL8711_NIC, RTL8711_NIC,

View File

@ -57,6 +57,8 @@
#include <linux/kthread.h> #include <linux/kthread.h>
#include <linux/list.h> #include <linux/list.h>
#include <linux/vmalloc.h> #include <linux/vmalloc.h>
#include <linux/signal.h>
#include <linux/sched/signal.h>
#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 5, 41)) #if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 5, 41))
#include <linux/tqueue.h> #include <linux/tqueue.h>

View File

@ -669,6 +669,10 @@ void rtw_cfg80211_indicate_connect(_adapter *padapter)
#endif #endif
struct cfg80211_bss *bss = NULL; struct cfg80211_bss *bss = NULL;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0)
struct cfg80211_roam_info roam_info ={};
#endif
RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter)); RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
if (pwdev->iftype != NL80211_IFTYPE_STATION if (pwdev->iftype != NL80211_IFTYPE_STATION
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE) #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) || defined(COMPAT_KERNEL_RELEASE)
@ -736,7 +740,15 @@ check_bss:
notify_channel = ieee80211_get_channel(wiphy, freq); notify_channel = ieee80211_get_channel(wiphy, freq);
#endif #endif
RTW_INFO(FUNC_ADPT_FMT" call cfg80211_roamed\n", FUNC_ADPT_ARG(padapter)); #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0)
roam_info.bssid = cur_network->network.MacAddress;
roam_info.req_ie = pmlmepriv->assoc_req + sizeof(struct rtw_ieee80211_hdr_3addr) + 2;
roam_info.req_ie_len = pmlmepriv->assoc_req_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 2;
roam_info.resp_ie = pmlmepriv->assoc_rsp + sizeof(struct rtw_ieee80211_hdr_3addr) + 6;
roam_info.resp_ie_len = pmlmepriv->assoc_rsp_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 6;
cfg80211_roamed(padapter->pnetdev, &roam_info, GFP_ATOMIC);
#else
cfg80211_roamed(padapter->pnetdev cfg80211_roamed(padapter->pnetdev
#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) || defined(COMPAT_KERNEL_RELEASE) #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) || defined(COMPAT_KERNEL_RELEASE)
, notify_channel , notify_channel
@ -747,6 +759,10 @@ check_bss:
, pmlmepriv->assoc_rsp + sizeof(struct rtw_ieee80211_hdr_3addr) + 6 , pmlmepriv->assoc_rsp + sizeof(struct rtw_ieee80211_hdr_3addr) + 6
, pmlmepriv->assoc_rsp_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 6 , pmlmepriv->assoc_rsp_len - sizeof(struct rtw_ieee80211_hdr_3addr) - 6
, GFP_ATOMIC); , GFP_ATOMIC);
#endif /*LINUX_VERSION_CODE >= KERNEL_VERSION(4, 12, 0)*/
RTW_INFO(FUNC_ADPT_FMT" call cfg80211_roamed\n", FUNC_ADPT_ARG(padapter));
#ifdef CONFIG_RTW_80211R #ifdef CONFIG_RTW_80211R
if ((rtw_to_roam(padapter) > 0) && rtw_chk_ft_flags(padapter, RTW_FT_SUPPORTED)) if ((rtw_to_roam(padapter) > 0) && rtw_chk_ft_flags(padapter, RTW_FT_SUPPORTED))
rtw_set_ft_status(padapter, RTW_FT_ASSOCIATED_STA); rtw_set_ft_status(padapter, RTW_FT_ASSOCIATED_STA);
@ -1728,7 +1744,10 @@ enum nl80211_iftype {
#endif #endif
static int cfg80211_rtw_change_iface(struct wiphy *wiphy, static int cfg80211_rtw_change_iface(struct wiphy *wiphy,
struct net_device *ndev, struct net_device *ndev,
enum nl80211_iftype type, u32 *flags, enum nl80211_iftype type,
#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 12, 0))
u32 *flags,
#endif
struct vif_params *params) struct vif_params *params)
{ {
enum nl80211_iftype old_type; enum nl80211_iftype old_type;
@ -3783,7 +3802,11 @@ static int rtw_cfg80211_add_monitor_if(_adapter *padapter, char *name, struct ne
mon_ndev->type = ARPHRD_IEEE80211_RADIOTAP; mon_ndev->type = ARPHRD_IEEE80211_RADIOTAP;
strncpy(mon_ndev->name, name, IFNAMSIZ); strncpy(mon_ndev->name, name, IFNAMSIZ);
mon_ndev->name[IFNAMSIZ - 1] = 0; mon_ndev->name[IFNAMSIZ - 1] = 0;
#if (LINUX_VERSION_CODE > KERNEL_VERSION(4, 11, 8))
mon_ndev->priv_destructor = rtw_ndev_destructor;
#else
mon_ndev->destructor = rtw_ndev_destructor; mon_ndev->destructor = rtw_ndev_destructor;
#endif
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29)) #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29))
mon_ndev->netdev_ops = &rtw_cfg80211_monitor_if_ops; mon_ndev->netdev_ops = &rtw_cfg80211_monitor_if_ops;
@ -3849,7 +3872,11 @@ static int
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0))
unsigned char name_assign_type, unsigned char name_assign_type,
#endif #endif
enum nl80211_iftype type, u32 *flags, struct vif_params *params) enum nl80211_iftype type,
#if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 12, 0))
u32 *flags,
#endif
struct vif_params *params)
{ {
int ret = 0; int ret = 0;
struct wireless_dev *wdev = NULL; struct wireless_dev *wdev = NULL;
@ -6718,7 +6745,8 @@ static void rtw_cfg80211_preinit_wiphy(_adapter *adapter, struct wiphy *wiphy)
/* wiphy->flags |= WIPHY_FLAG_OFFCHAN_TX | WIPHY_FLAG_HAVE_AP_SME; */ /* wiphy->flags |= WIPHY_FLAG_OFFCHAN_TX | WIPHY_FLAG_HAVE_AP_SME; */
#endif #endif
#if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0)) #if defined(CONFIG_PM) && (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0) && \
LINUX_VERSION_CODE < KERNEL_VERSION(4, 12, 0))
wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN; wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN;
#ifdef CONFIG_PNO_SUPPORT #ifdef CONFIG_PNO_SUPPORT
wiphy->max_sched_scan_ssids = MAX_PNO_LIST_COUNT; wiphy->max_sched_scan_ssids = MAX_PNO_LIST_COUNT;

View File

@ -552,6 +552,7 @@ static inline char *iwe_stream_rate_process(_adapter *padapter,
max_rate = vht_data_rate; max_rate = vht_data_rate;
else else
#endif #endif
{
if (ht_cap == _TRUE) { if (ht_cap == _TRUE) {
if (mcs_rate & 0x8000) /* MCS15 */ if (mcs_rate & 0x8000) /* MCS15 */
max_rate = (bw_40MHz) ? ((short_GI) ? 300 : 270) : ((short_GI) ? 144 : 130); max_rate = (bw_40MHz) ? ((short_GI) ? 300 : 270) : ((short_GI) ? 144 : 130);
@ -565,12 +566,12 @@ static inline char *iwe_stream_rate_process(_adapter *padapter,
max_rate = max_rate * 2; /* Mbps/2; */ max_rate = max_rate * 2; /* Mbps/2; */
} }
}
iwe->cmd = SIOCGIWRATE; iwe->cmd = SIOCGIWRATE;
iwe->u.bitrate.fixed = iwe->u.bitrate.disabled = 0; iwe->u.bitrate.fixed = iwe->u.bitrate.disabled = 0;
iwe->u.bitrate.value = max_rate * 500000; iwe->u.bitrate.value = max_rate * 500000;
start = iwe_stream_add_event(info, start, stop, iwe, IW_EV_PARAM_LEN); start = iwe_stream_add_event(info, start, stop, iwe, IW_EV_PARAM_LEN);
return start ; return start;
} }
static inline char *iwe_stream_wpa_wpa2_process(_adapter *padapter, static inline char *iwe_stream_wpa_wpa2_process(_adapter *padapter,
@ -6539,96 +6540,86 @@ static int rtw_dbg_port(struct net_device *dev,
} }
break; break;
case 0x78: /* IOL test */ case 0x78: /* IOL test */
switch (minor_cmd) {
#ifdef CONFIG_IOL #ifdef CONFIG_IOL
switch (minor_cmd) {
case 0x04: { /* LLT table initialization test */ case 0x04: { /* LLT table initialization test */
u8 page_boundary = 0xf9; u8 page_boundary = 0xf9;
{ struct xmit_frame *xmit_frame;
struct xmit_frame *xmit_frame;
xmit_frame = rtw_IOL_accquire_xmit_frame(padapter); xmit_frame = rtw_IOL_accquire_xmit_frame(padapter);
if (xmit_frame == NULL) { if (xmit_frame == NULL) {
ret = -ENOMEM; ret = -ENOMEM;
break; break;
}
rtw_IOL_append_LLT_cmd(xmit_frame, page_boundary);
if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 500, 0))
ret = -EPERM;
} }
rtw_IOL_append_LLT_cmd(xmit_frame, page_boundary);
if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 500, 0))
ret = -EPERM;
} }
break; break;
case 0x05: { /* blink LED test */ case 0x05: { /* blink LED test */
u16 reg = 0x4c; u16 reg = 0x4c;
u32 blink_num = 50; u32 blink_num = 50;
u32 blink_delay_ms = 200; u32 blink_delay_ms = 200;
int i; int i;
struct xmit_frame *xmit_frame;
{ xmit_frame = rtw_IOL_accquire_xmit_frame(padapter);
struct xmit_frame *xmit_frame; if (xmit_frame == NULL) {
ret = -ENOMEM;
xmit_frame = rtw_IOL_accquire_xmit_frame(padapter); break;
if (xmit_frame == NULL) {
ret = -ENOMEM;
break;
}
for (i = 0; i < blink_num; i++) {
#ifdef CONFIG_IOL_NEW_GENERATION
rtw_IOL_append_WB_cmd(xmit_frame, reg, 0x00, 0xff);
rtw_IOL_append_DELAY_MS_cmd(xmit_frame, blink_delay_ms);
rtw_IOL_append_WB_cmd(xmit_frame, reg, 0x08, 0xff);
rtw_IOL_append_DELAY_MS_cmd(xmit_frame, blink_delay_ms);
#else
rtw_IOL_append_WB_cmd(xmit_frame, reg, 0x00);
rtw_IOL_append_DELAY_MS_cmd(xmit_frame, blink_delay_ms);
rtw_IOL_append_WB_cmd(xmit_frame, reg, 0x08);
rtw_IOL_append_DELAY_MS_cmd(xmit_frame, blink_delay_ms);
#endif
}
if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, (blink_delay_ms * blink_num * 2) + 200, 0))
ret = -EPERM;
} }
}
break;
for (i = 0; i < blink_num; i++) {
#ifdef CONFIG_IOL_NEW_GENERATION
rtw_IOL_append_WB_cmd(xmit_frame, reg, 0x00, 0xff);
rtw_IOL_append_DELAY_MS_cmd(xmit_frame, blink_delay_ms);
rtw_IOL_append_WB_cmd(xmit_frame, reg, 0x08, 0xff);
rtw_IOL_append_DELAY_MS_cmd(xmit_frame, blink_delay_ms);
#else
rtw_IOL_append_WB_cmd(xmit_frame, reg, 0x00);
rtw_IOL_append_DELAY_MS_cmd(xmit_frame, blink_delay_ms);
rtw_IOL_append_WB_cmd(xmit_frame, reg, 0x08);
rtw_IOL_append_DELAY_MS_cmd(xmit_frame, blink_delay_ms);
#endif
}
if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, (blink_delay_ms * blink_num * 2) + 200, 0))
ret = -EPERM;
}
break;
case 0x06: { /* continuous wirte byte test */ case 0x06: { /* continuous wirte byte test */
u16 reg = arg; u16 reg = arg;
u16 start_value = 0; u16 start_value = 0;
u32 write_num = extra_arg; u32 write_num = extra_arg;
int i; int i;
u8 final; u8 final;
struct xmit_frame *xmit_frame;
{ xmit_frame = rtw_IOL_accquire_xmit_frame(padapter);
struct xmit_frame *xmit_frame; if (xmit_frame == NULL) {
ret = -ENOMEM;
xmit_frame = rtw_IOL_accquire_xmit_frame(padapter); break;
if (xmit_frame == NULL) {
ret = -ENOMEM;
break;
}
for (i = 0; i < write_num; i++) {
#ifdef CONFIG_IOL_NEW_GENERATION
rtw_IOL_append_WB_cmd(xmit_frame, reg, i + start_value, 0xFF);
#else
rtw_IOL_append_WB_cmd(xmit_frame, reg, i + start_value);
#endif
}
if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 5000, 0))
ret = -EPERM;
} }
for (i = 0; i < write_num; i++) {
#ifdef CONFIG_IOL_NEW_GENERATION
rtw_IOL_append_WB_cmd(xmit_frame, reg, i + start_value, 0xFF);
#else
rtw_IOL_append_WB_cmd(xmit_frame, reg, i + start_value);
#endif
}
if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 5000, 0))
ret = -EPERM;
final = rtw_read8(padapter, reg); final = rtw_read8(padapter, reg);
if (start_value + write_num - 1 == final) if (start_value + write_num - 1 == final)
RTW_INFO("continuous IOL_CMD_WB_REG to 0x%x %u times Success, start:%u, final:%u\n", reg, write_num, start_value, final); RTW_INFO("continuous IOL_CMD_WB_REG to 0x%x %u times Success, start:%u, final:%u\n", reg, write_num, start_value, final);
else else
RTW_INFO("continuous IOL_CMD_WB_REG to 0x%x %u times Fail, start:%u, final:%u\n", reg, write_num, start_value, final); RTW_INFO("continuous IOL_CMD_WB_REG to 0x%x %u times Fail, start:%u, final:%u\n", reg, write_num, start_value, final);
} }
break; break;
case 0x07: { /* continuous wirte word test */ case 0x07: { /* continuous wirte word test */
u16 reg = arg; u16 reg = arg;
u16 start_value = 200; u16 start_value = 200;
@ -6636,35 +6627,31 @@ static int rtw_dbg_port(struct net_device *dev,
int i; int i;
u16 final; u16 final;
struct xmit_frame *xmit_frame;
{ xmit_frame = rtw_IOL_accquire_xmit_frame(padapter);
struct xmit_frame *xmit_frame; if (xmit_frame == NULL) {
ret = -ENOMEM;
xmit_frame = rtw_IOL_accquire_xmit_frame(padapter); break;
if (xmit_frame == NULL) {
ret = -ENOMEM;
break;
}
for (i = 0; i < write_num; i++) {
#ifdef CONFIG_IOL_NEW_GENERATION
rtw_IOL_append_WW_cmd(xmit_frame, reg, i + start_value, 0xFFFF);
#else
rtw_IOL_append_WW_cmd(xmit_frame, reg, i + start_value);
#endif
}
if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 5000, 0))
ret = -EPERM;
} }
for (i = 0; i < write_num; i++) {
#ifdef CONFIG_IOL_NEW_GENERATION
rtw_IOL_append_WW_cmd(xmit_frame, reg, i + start_value, 0xFFFF);
#else
rtw_IOL_append_WW_cmd(xmit_frame, reg, i + start_value);
#endif
}
if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 5000, 0))
ret = -EPERM;
final = rtw_read16(padapter, reg); final = rtw_read16(padapter, reg);
if (start_value + write_num - 1 == final) if (start_value + write_num - 1 == final)
RTW_INFO("continuous IOL_CMD_WW_REG to 0x%x %u times Success, start:%u, final:%u\n", reg, write_num, start_value, final); RTW_INFO("continuous IOL_CMD_WW_REG to 0x%x %u times Success, start:%u, final:%u\n", reg, write_num, start_value, final);
else else
RTW_INFO("continuous IOL_CMD_WW_REG to 0x%x %u times Fail, start:%u, final:%u\n", reg, write_num, start_value, final); RTW_INFO("continuous IOL_CMD_WW_REG to 0x%x %u times Fail, start:%u, final:%u\n", reg, write_num, start_value, final);
} }
break; break;
case 0x08: { /* continuous wirte dword test */ case 0x08: { /* continuous wirte dword test */
u16 reg = arg; u16 reg = arg;
u32 start_value = 0x110000c7; u32 start_value = 0x110000c7;
@ -6672,37 +6659,33 @@ static int rtw_dbg_port(struct net_device *dev,
int i; int i;
u32 final; u32 final;
struct xmit_frame *xmit_frame;
{ xmit_frame = rtw_IOL_accquire_xmit_frame(padapter);
struct xmit_frame *xmit_frame; if (xmit_frame == NULL) {
ret = -ENOMEM;
xmit_frame = rtw_IOL_accquire_xmit_frame(padapter); break;
if (xmit_frame == NULL) {
ret = -ENOMEM;
break;
}
for (i = 0; i < write_num; i++) {
#ifdef CONFIG_IOL_NEW_GENERATION
rtw_IOL_append_WD_cmd(xmit_frame, reg, i + start_value, 0xFFFFFFFF);
#else
rtw_IOL_append_WD_cmd(xmit_frame, reg, i + start_value);
#endif
}
if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 5000, 0))
ret = -EPERM;
} }
for (i = 0; i < write_num; i++) {
#ifdef CONFIG_IOL_NEW_GENERATION
rtw_IOL_append_WD_cmd(xmit_frame, reg, i + start_value, 0xFFFFFFFF);
#else
rtw_IOL_append_WD_cmd(xmit_frame, reg, i + start_value);
#endif
}
if (_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 5000, 0))
ret = -EPERM;
final = rtw_read32(padapter, reg); final = rtw_read32(padapter, reg);
if (start_value + write_num - 1 == final) if (start_value + write_num - 1 == final)
RTW_INFO("continuous IOL_CMD_WD_REG to 0x%x %u times Success, start:%u, final:%u\n", reg, write_num, start_value, final); RTW_INFO("continuous IOL_CMD_WD_REG to 0x%x %u times Success, start:%u, final:%u\n", reg, write_num, start_value, final);
else else
RTW_INFO("continuous IOL_CMD_WD_REG to 0x%x %u times Fail, start:%u, final:%u\n", reg, write_num, start_value, final); RTW_INFO("continuous IOL_CMD_WD_REG to 0x%x %u times Fail, start:%u, final:%u\n", reg, write_num, start_value, final);
} }
break; break;
#endif /* CONFIG_IOL */
} }
#endif /* CONFIG_IOL */
break; break;
case 0x79: { case 0x79: {
/* /*
@ -6939,31 +6922,34 @@ static int rtw_dbg_port(struct net_device *dev,
struct registry_priv *pregpriv = &padapter->registrypriv; struct registry_priv *pregpriv = &padapter->registrypriv;
/* 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, 0x3: enable both 2.4g and 5g */ /* 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, 0x3: enable both 2.4g and 5g */
/* default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ */ /* default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ */
if (pregpriv && (extra_arg == 0 || extra_arg == 1 || extra_arg == 2 || extra_arg == 3)) { if (!pregpriv)
break;
if (extra_arg == 0 || extra_arg == 1 || extra_arg == 2 || extra_arg == 3) {
pregpriv->rx_stbc = extra_arg; pregpriv->rx_stbc = extra_arg;
RTW_INFO("set rx_stbc=%d\n", pregpriv->rx_stbc); RTW_INFO("set rx_stbc=%d\n", pregpriv->rx_stbc);
} else } else {
RTW_INFO("get rx_stbc=%d\n", pregpriv->rx_stbc); RTW_INFO("get rx_stbc=%d\n", pregpriv->rx_stbc);
}
} }
break; break;
case 0x13: { /* set ampdu_enable */ case 0x13: { /* set ampdu_enable */
struct registry_priv *pregpriv = &padapter->registrypriv; struct registry_priv *pregpriv = &padapter->registrypriv;
/* 0: disable, 0x1:enable */ /* 0: disable, 0x1:enable */
if (pregpriv && extra_arg < 2) { if (!pregpriv)
break;
if (extra_arg < 2) {
pregpriv->ampdu_enable = extra_arg; pregpriv->ampdu_enable = extra_arg;
RTW_INFO("set ampdu_enable=%d\n", pregpriv->ampdu_enable); RTW_INFO("set ampdu_enable=%d\n", pregpriv->ampdu_enable);
} else } else {
RTW_INFO("get ampdu_enable=%d\n", pregpriv->ampdu_enable); RTW_INFO("get ampdu_enable=%d\n", pregpriv->ampdu_enable);
}
} }
break; break;
#endif #endif
case 0x14: { /* get wifi_spec */ case 0x14: { /* get wifi_spec */
struct registry_priv *pregpriv = &padapter->registrypriv; struct registry_priv *pregpriv = &padapter->registrypriv;
RTW_INFO("get wifi_spec=%d\n", pregpriv->wifi_spec); RTW_INFO("get wifi_spec=%d\n", pregpriv->wifi_spec);
}
}
break; break;
case 0x16: { case 0x16: {
if (arg == 0xff) if (arg == 0xff)

View File

@ -1987,7 +1987,9 @@ static int readFile(struct file *fp, char *buf, int len)
return -EPERM; return -EPERM;
while (sum < len) { while (sum < len) {
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0)) #if (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0))
rlen = kernel_read(fp, buf + sum, len - sum, &fp->f_pos);
#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(4, 1, 0))
rlen = __vfs_read(fp, buf + sum, len - sum, &fp->f_pos); rlen = __vfs_read(fp, buf + sum, len - sum, &fp->f_pos);
#else #else
rlen = fp->f_op->read(fp, buf + sum, len - sum, &fp->f_pos); rlen = fp->f_op->read(fp, buf + sum, len - sum, &fp->f_pos);