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# MangoPI MQ Pro (single core allwinner D1 risc-v based Pi Zero clone)
Investigating the MangoPi MQ pro's IO capabilities when running Ubuntu 24.4.
- This is using the 'AllWinner Nezha' image (compatible with the MQ pro) from here: https://ubuntu.com/download/risc-v
- Using the 'AllWinner Nezha' Ubuntu image (compatible with the MQ pro) from: https://ubuntu.com/download/risc-v
My MQ PRO is connected to a Waveshare LORA hat, I want to make it work but the default Nezha device tree conflicts with some of the pins my HAT uses. So I decided to 'fix' this be putting a better device tree on my MQ PRO
@ -10,7 +10,9 @@ The **D1** SOC runs at 3v3, and you must not exceed this on any of the GPIO pins
Pins are organised into 7 'banks' (*PA*, *PB*, etc to *PG*) of up to 32 pins, but most banks have fewer pins.
## Default MQ-Pro mappings (as described in the schematic and other docs) looks like this:
This is derived from the schematics; showing the specific GPIO pin assignments on the MQ Pro GPIO connector
This is derived from the schematics; showing the specific GPIO pin assignments envisioned by MangoPI on the MQ Pro GPIO connector.
TODO: *I will use this as a basis for my 'general' DeviceTree I make for connecting to the LoRA HAT.*
```text
3v3 - 1 o o 2 - 5v
@ -35,7 +37,6 @@ This is derived from the schematics; showing the specific GPIO pin assignments o
GND - 39 o o 40 -- PB4 i2s DO
Notes:
- Device names can be aliased to logical names in the tree, eg 'uart2' can be mapped as 'serial1', and will use '/dev/ttyS1' as it's device
- I2C pins 2,5,27 and 28 (PG13, PG12, PE17 and PE16) have 10K pullup resistors to 3v3
- The onboard blue status LED is on `PD18` [pwm2]
```
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## GPIO Pin Muxing
The **D1** SOC itself has 88 GPIO pins.
In the MQ PRO some of these GPIO pins are wired directly to peripherals on the board (eg SD card, Wifi chip, etc.) but that still leaves many free lines. The 'standard' PI GPIO connector on it has 40 pins, but 12 are reserved for Power lines, leaving 28 GPIO pins for the user.
In the MQ PRO some of these GPIO pins are wired directly to peripherals on the board (eg SD card, Wifi chip, etc.) but that still leaves many free lines.
The board has a 'standard' Raspberry Pi compatible 40 pin GPIO connector; 12 are reserved for Power lines, leaving 28 GPIO pins available for the user.
Internally, the **D1** has a number of internal hardware interfaces for different signal types; 6xUART for serial, 2xSPI, 4xI2C(TWI), 3xI2Si/PCM (audio), 8xPWM, and some additional units for USB, HDMI, Audio, and more (see the Data sheet)
The chip has an internal 'pin muxer' to connect pins to signals. Each pin can connect to a (predefined) set of signals, which allows you to map each pin on the GPIO header to multiple possible functions. You can browse the full range of mappings in the Allwinner D1 datasheet, Table 4-3 (see the 'references' folder in this repo for a copy)
The chip has an internal 'pin muxer' to connect pins to signals. Each pin can connect to a (predefined) set of signals, which allows you to map each pin on the GPIO header to multiple possible functions. You can browse the full range of mappings in the Allwinner D1 datasheet, Table 4-3 (see the 'references' folder in this repo for a copy).
Additionally all pins are high-impedance by default and can be set to a HIGH or LOW digital output. They can all work as digital inputs, and all have configurable pull-up and pull down resistors, and can generate interrupts. ADC input capable pins are limited, see the datasheet for more.
### In-Use interfaces
The MQ Pro uses several of the **D1**s interfaces on-board, specifically:
`UART1` is used to connect to the the bluetooth device by default (with flow control) using `PG6`, `PG7`, `PG8` and `PG9`. It can be reconfigured onto GPIO pins if bluetooth is not required.
`TWI2` (`I2C2`) can be mapped to the DVP connector (for touchscreen interfaces) via pins `PE12` and `PE13`.
`TWI3` (`I2C3`) can be mapped to the DSI/LVDS connector via pins `PE16` and `PE17`; which also appear on the GPIO connector.
`SPI0` is mapped to the optional SPI flash chip (not fitted on consumer units)
### Example; mapping uart pins:
The D1 has 6 internal UARTs, and many pin mappings are possible on the GPIO connector:
```text
@ -76,9 +91,8 @@ UART2-TX,UART0-TX PB0 ------ o o ------ PB1 UART0-RX,UART2-RX
GND -- o o ------ PB4 UART5-TX
```
Notes:
- UART0 maps by default to gpio pins 8 and 10 (*PB8* and *PB9*) is the used for the system console by default at boot and you should expect data on it during boot even if you disable it in the device tree as the kernel starts.
- UART1 is connected to the bluetooth device by default, it can be reconfigured onto GPIO pins if bluetooth is not required.
- UART1 and UART3 have flow control lines (rts and cts) available
- `UART0` maps by default to gpio pins 8 and 10 (*PB8* and *PB9*) is the used for the system console by default at boot and you should expect data on it during boot even if you disable it in the device tree as the kernel starts.
- `UART1` and `UART3` have flow control lines (rts and cts) available
- some pins do not map to any UART devices
## References