diff --git a/device-tree/6.8.0-41-generic/sun20i-common-regulators.dtsi b/device-tree/6.8.0-41-generic/sun20i-common-regulators.dtsi deleted file mode 100644 index 2a6f5df..0000000 --- a/device-tree/6.8.0-41-generic/sun20i-common-regulators.dtsi +++ /dev/null @@ -1,32 +0,0 @@ -# 0 "sun20i-common-regulators.dtsi" -# 0 "" -# 0 "" -# 1 "sun20i-common-regulators.dtsi" - - - -/ { - reg_vcc: vcc { - compatible = "regulator-fixed"; - regulator-name = "vcc"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - reg_vcc_3v3: vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "vcc-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <®_vcc>; - }; -}; - -&pio { - vcc-pb-supply = <®_vcc_3v3>; - vcc-pc-supply = <®_vcc_3v3>; - vcc-pd-supply = <®_vcc_3v3>; - vcc-pe-supply = <®_vcc_3v3>; - vcc-pf-supply = <®_vcc_3v3>; - vcc-pg-supply = <®_vcc_3v3>; -}; diff --git a/device-tree/6.8.0-41-generic/sun20i-d1-mangopi-mq-pro.dts b/device-tree/6.8.0-41-generic/sun20i-d1-mangopi-mq-pro.dts deleted file mode 100644 index bc7c4f2..0000000 --- a/device-tree/6.8.0-41-generic/sun20i-d1-mangopi-mq-pro.dts +++ /dev/null @@ -1,1583 +0,0 @@ -# 0 "sun20i-d1-mangopi-mq-pro.dts" -# 0 "" -# 0 "" -# 1 "sun20i-d1-mangopi-mq-pro.dts" - - - -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/gpio/gpio.h" 1 -# 5 "sun20i-d1-mangopi-mq-pro.dts" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/leds/common.h" 1 -# 6 "sun20i-d1-mangopi-mq-pro.dts" 2 - -/dts-v1/; - -# 1 "sun20i-d1.dtsi" 1 - - - -# 1 "sun20i-d1s.dtsi" 1 - - - - - -# 1 "sunxi-d1s-t113.dtsi" 1 - - - -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun6i-rtc.h" 1 -# 5 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun8i-de2.h" 1 -# 6 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun8i-tcon-top.h" 1 -# 7 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun20i-d1-ccu.h" 1 -# 8 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun20i-d1-r-ccu.h" 1 -# 9 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/interrupt-controller/irq.h" 1 -# 10 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/reset/sun8i-de2.h" 1 -# 11 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/reset/sun20i-d1-ccu.h" 1 -# 12 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/reset/sun20i-d1-r-ccu.h" 1 -# 13 "sunxi-d1s-t113.dtsi" 2 - -/ { - #address-cells = <1>; - #size-cells = <1>; - - dcxo: dcxo-clk { - compatible = "fixed-clock"; - clock-output-names = "dcxo"; - #clock-cells = <0>; - }; - - de: display-engine { - compatible = "allwinner,sun20i-d1-display-engine"; - allwinner,pipelines = <&mixer0>, <&mixer1>; - status = "disabled"; - }; - - soc { - compatible = "simple-bus"; - ranges; - dma-noncoherent; - #address-cells = <1>; - #size-cells = <1>; - - pio: pinctrl@2000000 { - compatible = "allwinner,sun20i-d1-pinctrl"; - reg = <0x2000000 0x800>; - interrupts = <(69 + 16) 4>, - <(71 + 16) 4>, - <(73 + 16) 4>, - <(75 + 16) 4>, - <(77 + 16) 4>, - <(79 + 16) 4>; - clocks = <&ccu 24>, - <&dcxo>, - <&rtc 0>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - interrupt-controller; - #gpio-cells = <3>; - #interrupt-cells = <3>; - - /omit-if-no-ref/ - can0_pins: can0-pins { - pins = "PB2", "PB3"; - function = "can0"; - }; - - /omit-if-no-ref/ - can1_pins: can1-pins { - pins = "PB4", "PB5"; - function = "can1"; - }; - - /omit-if-no-ref/ - clk_pg11_pin: clk-pg11-pin { - pins = "PG11"; - function = "clk"; - }; - - /omit-if-no-ref/ - dsi_4lane_pins: dsi-4lane-pins { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", - "PD6", "PD7", "PD8", "PD9"; - drive-strength = <30>; - function = "dsi"; - }; - - /omit-if-no-ref/ - lcd_rgb666_pins: lcd-rgb666-pins { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", - "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", - "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", - "PD18", "PD19", "PD20", "PD21"; - function = "lcd0"; - }; - - /omit-if-no-ref/ - mmc0_pins: mmc0-pins { - pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; - function = "mmc0"; - }; - - /omit-if-no-ref/ - mmc1_pins: mmc1-pins { - pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; - function = "mmc1"; - }; - - /omit-if-no-ref/ - mmc2_pins: mmc2-pins { - pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; - function = "mmc2"; - }; - - /omit-if-no-ref/ - pwm0_pd16_pin: pwm0-pd16-pin { - pins = "PD16"; - function = "pwm0"; - }; - - /omit-if-no-ref/ - pwm2_pd18_pin: pwm2-pd18-pin { - pins = "PD18"; - function = "pwm2"; - }; - - /omit-if-no-ref/ - pwm4_pd20_pin: pwm4-pd20-pin { - pins = "PD20"; - function = "pwm4"; - }; - - /omit-if-no-ref/ - pwm7_pd22_pin: pwm7-pd22-pin { - pins = "PD22"; - function = "pwm7"; - }; - - /omit-if-no-ref/ - rgmii_pe_pins: rgmii-pe-pins { - pins = "PE0", "PE1", "PE2", "PE3", "PE4", - "PE5", "PE6", "PE7", "PE8", "PE9", - "PE11", "PE12", "PE13", "PE14", "PE15"; - function = "emac"; - }; - - /omit-if-no-ref/ - rmii_pe_pins: rmii-pe-pins { - pins = "PE0", "PE1", "PE2", "PE3", "PE4", - "PE5", "PE6", "PE7", "PE8", "PE9"; - function = "emac"; - }; - - /omit-if-no-ref/ - spi0_pins: spi0-pins { - pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; - function = "spi0"; - }; - - /omit-if-no-ref/ - spi1_pb_pins: spi1-pb-pins { - pins = "PB0", "PB8", "PB9", "PB10", "PB11", "PB12"; - function = "spi1"; - }; - - /omit-if-no-ref/ - spi1_pd_pins: spi1-pd-pins { - pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15"; - function = "spi1"; - }; - - /omit-if-no-ref/ - uart1_pg6_pins: uart1-pg6-pins { - pins = "PG6", "PG7"; - function = "uart1"; - }; - - /omit-if-no-ref/ - uart1_pg8_rts_cts_pins: uart1-pg8-rts-cts-pins { - pins = "PG8", "PG9"; - function = "uart1"; - }; - - /omit-if-no-ref/ - uart3_pb_pins: uart3-pb-pins { - pins = "PB6", "PB7"; - function = "uart3"; - }; - }; - - pwm: pwm@2000c00 { - compatible = "allwinner,sun20i-d1-pwm"; - reg = <0x02000c00 0x400>; - clocks = <&ccu 45>, - <&dcxo>, - <&ccu 24>; - clock-names = "bus", "hosc", "apb0"; - resets = <&ccu 13>; - status = "disabled"; - #pwm-cells = <0x3>; - }; - - ccu: clock-controller@2001000 { - compatible = "allwinner,sun20i-d1-ccu"; - reg = <0x2001000 0x1000>; - clocks = <&dcxo>, - <&rtc 0>, - <&rtc 2>; - clock-names = "hosc", "losc", "iosc"; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - gpadc: adc@2009000 { - compatible = "allwinner,sun20i-d1-gpadc"; - reg = <0x2009000 0x400>; - clocks = <&ccu 80>; - resets = <&ccu 32>; - interrupts = <(57 + 16) 4>; - status = "disabled"; - #io-channel-cells = <1>; - }; - - dmic: dmic@2031000 { - compatible = "allwinner,sun20i-d1-dmic", - "allwinner,sun50i-h6-dmic"; - reg = <0x2031000 0x400>; - interrupts = <(24 + 16) 4>; - clocks = <&ccu 93>, - <&ccu 92>; - clock-names = "bus", "mod"; - resets = <&ccu 38>; - dmas = <&dma 8>; - dma-names = "rx"; - status = "disabled"; - #sound-dai-cells = <0>; - }; - - i2s1: i2s@2033000 { - compatible = "allwinner,sun20i-d1-i2s", - "allwinner,sun50i-r329-i2s"; - reg = <0x2033000 0x1000>; - interrupts = <(27 + 16) 4>; - clocks = <&ccu 87>, - <&ccu 83>; - clock-names = "apb", "mod"; - resets = <&ccu 35>; - dmas = <&dma 4>, <&dma 4>; - dma-names = "rx", "tx"; - status = "disabled"; - #sound-dai-cells = <0>; - }; - - i2s2: i2s@2034000 { - compatible = "allwinner,sun20i-d1-i2s", - "allwinner,sun50i-r329-i2s"; - reg = <0x2034000 0x1000>; - interrupts = <(28 + 16) 4>; - clocks = <&ccu 88>, - <&ccu 84>; - clock-names = "apb", "mod"; - resets = <&ccu 36>; - dmas = <&dma 5>, <&dma 5>; - dma-names = "rx", "tx"; - status = "disabled"; - #sound-dai-cells = <0>; - }; - - timer: timer@2050000 { - compatible = "allwinner,sun20i-d1-timer", - "allwinner,sun8i-a23-timer"; - reg = <0x2050000 0xa0>; - interrupts = <(59 + 16) 4>, - <(60 + 16) 4>; - clocks = <&dcxo>; - }; - - wdt: watchdog@20500a0 { - compatible = "allwinner,sun20i-d1-wdt-reset", - "allwinner,sun20i-d1-wdt"; - reg = <0x20500a0 0x20>; - interrupts = <(63 + 16) 4>; - clocks = <&dcxo>, <&rtc 0>; - clock-names = "hosc", "losc"; - status = "reserved"; - }; - - uart0: serial@2500000 { - compatible = "snps,dw-apb-uart"; - reg = <0x2500000 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(2 + 16) 4>; - clocks = <&ccu 62>; - resets = <&ccu 18>; - dmas = <&dma 14>, <&dma 14>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart1: serial@2500400 { - compatible = "snps,dw-apb-uart"; - reg = <0x2500400 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(3 + 16) 4>; - clocks = <&ccu 63>; - resets = <&ccu 19>; - dmas = <&dma 15>, <&dma 15>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart2: serial@2500800 { - compatible = "snps,dw-apb-uart"; - reg = <0x2500800 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(4 + 16) 4>; - clocks = <&ccu 64>; - resets = <&ccu 20>; - dmas = <&dma 16>, <&dma 16>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart3: serial@2500c00 { - compatible = "snps,dw-apb-uart"; - reg = <0x2500c00 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(5 + 16) 4>; - clocks = <&ccu 65>; - resets = <&ccu 21>; - dmas = <&dma 17>, <&dma 17>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart4: serial@2501000 { - compatible = "snps,dw-apb-uart"; - reg = <0x2501000 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(6 + 16) 4>; - clocks = <&ccu 66>; - resets = <&ccu 22>; - dmas = <&dma 18>, <&dma 18>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart5: serial@2501400 { - compatible = "snps,dw-apb-uart"; - reg = <0x2501400 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(7 + 16) 4>; - clocks = <&ccu 67>; - resets = <&ccu 23>; - dmas = <&dma 19>, <&dma 19>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - i2c0: i2c@2502000 { - compatible = "allwinner,sun20i-d1-i2c", - "allwinner,sun8i-v536-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x2502000 0x400>; - interrupts = <(9 + 16) 4>; - clocks = <&ccu 68>; - resets = <&ccu 24>; - dmas = <&dma 43>, <&dma 43>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c1: i2c@2502400 { - compatible = "allwinner,sun20i-d1-i2c", - "allwinner,sun8i-v536-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x2502400 0x400>; - interrupts = <(10 + 16) 4>; - clocks = <&ccu 69>; - resets = <&ccu 25>; - dmas = <&dma 44>, <&dma 44>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c2: i2c@2502800 { - compatible = "allwinner,sun20i-d1-i2c", - "allwinner,sun8i-v536-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x2502800 0x400>; - interrupts = <(11 + 16) 4>; - clocks = <&ccu 70>; - resets = <&ccu 26>; - dmas = <&dma 45>, <&dma 45>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c3: i2c@2502c00 { - compatible = "allwinner,sun20i-d1-i2c", - "allwinner,sun8i-v536-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x2502c00 0x400>; - interrupts = <(12 + 16) 4>; - clocks = <&ccu 71>; - resets = <&ccu 27>; - dmas = <&dma 46>, <&dma 46>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - can0: can@2504000 { - compatible = "allwinner,sun20i-d1-can"; - reg = <0x02504000 0x400>; - interrupts = <(21 + 16) 4>; - clocks = <&ccu 145>; - resets = <&ccu 66>; - pinctrl-names = "default"; - pinctrl-0 = <&can0_pins>; - status = "disabled"; - }; - - can1: can@2504400 { - compatible = "allwinner,sun20i-d1-can"; - reg = <0x02504400 0x400>; - interrupts = <(22 + 16) 4>; - clocks = <&ccu 146>; - resets = <&ccu 67>; - pinctrl-names = "default"; - pinctrl-0 = <&can1_pins>; - status = "disabled"; - }; - - syscon: syscon@3000000 { - compatible = "allwinner,sun20i-d1-system-control"; - reg = <0x3000000 0x1000>; - ranges; - #address-cells = <1>; - #size-cells = <1>; - }; - - dma: dma-controller@3002000 { - compatible = "allwinner,sun20i-d1-dma"; - reg = <0x3002000 0x1000>; - interrupts = <(50 + 16) 4>; - clocks = <&ccu 37>, <&ccu 48>; - clock-names = "bus", "mbus"; - resets = <&ccu 6>; - dma-channels = <16>; - dma-requests = <48>; - #dma-cells = <1>; - }; - - sid: efuse@3006000 { - compatible = "allwinner,sun20i-d1-sid"; - reg = <0x3006000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - }; - - crypto: crypto@3040000 { - compatible = "allwinner,sun20i-d1-crypto"; - reg = <0x3040000 0x800>; - interrupts = <(52 + 16) 4>; - clocks = <&ccu 34>, - <&ccu 33>, - <&ccu 50>, - <&rtc 2>; - clock-names = "bus", "mod", "ram", "trng"; - resets = <&ccu 4>; - }; - - mbus: dram-controller@3102000 { - compatible = "allwinner,sun20i-d1-mbus"; - reg = <0x3102000 0x1000>, - <0x3103000 0x1000>; - reg-names = "mbus", "dram"; - interrupts = <(43 + 16) 4>; - clocks = <&ccu 26>, - <&ccu 47>, - <&ccu 55>; - clock-names = "mbus", "dram", "bus"; - dma-ranges = <0 0x40000000 0x80000000>; - #address-cells = <1>; - #size-cells = <1>; - #interconnect-cells = <1>; - }; - - mmc0: mmc@4020000 { - compatible = "allwinner,sun20i-d1-mmc"; - reg = <0x4020000 0x1000>; - interrupts = <(40 + 16) 4>; - clocks = <&ccu 59>, <&ccu 56>; - clock-names = "ahb", "mmc"; - resets = <&ccu 15>; - reset-names = "ahb"; - cap-sd-highspeed; - max-frequency = <150000000>; - no-mmc; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc1: mmc@4021000 { - compatible = "allwinner,sun20i-d1-mmc"; - reg = <0x4021000 0x1000>; - interrupts = <(41 + 16) 4>; - clocks = <&ccu 60>, <&ccu 57>; - clock-names = "ahb", "mmc"; - resets = <&ccu 16>; - reset-names = "ahb"; - cap-sd-highspeed; - max-frequency = <150000000>; - no-mmc; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc2: mmc@4022000 { - compatible = "allwinner,sun20i-d1-emmc", - "allwinner,sun50i-a100-emmc"; - reg = <0x4022000 0x1000>; - interrupts = <(42 + 16) 4>; - clocks = <&ccu 61>, <&ccu 58>; - clock-names = "ahb", "mmc"; - resets = <&ccu 17>; - reset-names = "ahb"; - cap-mmc-highspeed; - max-frequency = <150000000>; - mmc-ddr-1_8v; - mmc-ddr-3_3v; - no-sd; - no-sdio; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi0: spi@4025000 { - compatible = "allwinner,sun20i-d1-spi", - "allwinner,sun50i-r329-spi"; - reg = <0x04025000 0x1000>; - interrupts = <(15 + 16) 4>; - clocks = <&ccu 74>, <&ccu 72>; - clock-names = "ahb", "mod"; - dmas = <&dma 22>, <&dma 22>; - dma-names = "rx", "tx"; - resets = <&ccu 28>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi1: spi@4026000 { - compatible = "allwinner,sun20i-d1-spi-dbi", - "allwinner,sun50i-r329-spi-dbi", - "allwinner,sun50i-r329-spi"; - reg = <0x04026000 0x1000>; - interrupts = <(16 + 16) 4>; - clocks = <&ccu 75>, <&ccu 73>; - clock-names = "ahb", "mod"; - dmas = <&dma 23>, <&dma 23>; - dma-names = "rx", "tx"; - resets = <&ccu 29>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - usb_otg: usb@4100000 { - compatible = "allwinner,sun20i-d1-musb", - "allwinner,sun8i-a33-musb"; - reg = <0x4100000 0x400>; - interrupts = <(29 + 16) 4>; - interrupt-names = "mc"; - clocks = <&ccu 103>; - resets = <&ccu 46>; - extcon = <&usbphy 0>; - phys = <&usbphy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - usbphy: phy@4100400 { - compatible = "allwinner,sun20i-d1-usb-phy"; - reg = <0x4100400 0x100>, - <0x4101800 0x100>, - <0x4200800 0x100>; - reg-names = "phy_ctrl", - "pmu0", - "pmu1"; - clocks = <&dcxo>, - <&dcxo>; - clock-names = "usb0_phy", - "usb1_phy"; - resets = <&ccu 40>, - <&ccu 41>; - reset-names = "usb0_reset", - "usb1_reset"; - status = "disabled"; - #phy-cells = <1>; - }; - - ehci0: usb@4101000 { - compatible = "allwinner,sun20i-d1-ehci", - "generic-ehci"; - reg = <0x4101000 0x100>; - interrupts = <(30 + 16) 4>; - clocks = <&ccu 99>, - <&ccu 101>, - <&ccu 97>; - resets = <&ccu 42>, - <&ccu 44>; - phys = <&usbphy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci0: usb@4101400 { - compatible = "allwinner,sun20i-d1-ohci", - "generic-ohci"; - reg = <0x4101400 0x100>; - interrupts = <(31 + 16) 4>; - clocks = <&ccu 99>, - <&ccu 97>; - resets = <&ccu 42>; - phys = <&usbphy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - ehci1: usb@4200000 { - compatible = "allwinner,sun20i-d1-ehci", - "generic-ehci"; - reg = <0x4200000 0x100>; - interrupts = <(33 + 16) 4>; - clocks = <&ccu 100>, - <&ccu 102>, - <&ccu 98>; - resets = <&ccu 43>, - <&ccu 45>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci1: usb@4200400 { - compatible = "allwinner,sun20i-d1-ohci", - "generic-ohci"; - reg = <0x4200400 0x100>; - interrupts = <(34 + 16) 4>; - clocks = <&ccu 100>, - <&ccu 98>; - resets = <&ccu 43>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; - }; - - emac: ethernet@4500000 { - compatible = "allwinner,sun20i-d1-emac", - "allwinner,sun50i-a64-emac"; - reg = <0x4500000 0x10000>; - interrupts = <(46 + 16) 4>; - interrupt-names = "macirq"; - clocks = <&ccu 77>; - clock-names = "stmmaceth"; - resets = <&ccu 30>; - reset-names = "stmmaceth"; - syscon = <&syscon>; - status = "disabled"; - - mdio: mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - display_clocks: clock-controller@5000000 { - compatible = "allwinner,sun20i-d1-de2-clk", - "allwinner,sun50i-h5-de2-clk"; - reg = <0x5000000 0x10000>; - clocks = <&ccu 28>, <&ccu 27>; - clock-names = "bus", "mod"; - resets = <&ccu 1>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - mixer0: mixer@5100000 { - compatible = "allwinner,sun20i-d1-de2-mixer-0"; - reg = <0x5100000 0x100000>; - clocks = <&display_clocks 0>, - <&display_clocks 6>; - clock-names = "bus", "mod"; - resets = <&display_clocks 0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - mixer0_out: port@1 { - reg = <1>; - - mixer0_out_tcon_top_mixer0: endpoint { - remote-endpoint = <&tcon_top_mixer0_in_mixer0>; - }; - }; - }; - }; - - mixer1: mixer@5200000 { - compatible = "allwinner,sun20i-d1-de2-mixer-1"; - reg = <0x5200000 0x100000>; - clocks = <&display_clocks 1>, - <&display_clocks 7>; - clock-names = "bus", "mod"; - resets = <&display_clocks 1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - mixer1_out: port@1 { - reg = <1>; - - mixer1_out_tcon_top_mixer1: endpoint { - remote-endpoint = <&tcon_top_mixer1_in_mixer1>; - }; - }; - }; - }; - - dsi: dsi@5450000 { - compatible = "allwinner,sun20i-d1-mipi-dsi", - "allwinner,sun50i-a100-mipi-dsi"; - reg = <0x5450000 0x1000>; - interrupts = <(92 + 16) 4>; - clocks = <&ccu 111>, - <&tcon_top 2>; - clock-names = "bus", "mod"; - resets = <&ccu 51>; - phys = <&dphy>; - phy-names = "dphy"; - status = "disabled"; - - port { - dsi_in_tcon_lcd0: endpoint { - remote-endpoint = <&tcon_lcd0_out_dsi>; - }; - }; - }; - - dphy: phy@5451000 { - compatible = "allwinner,sun20i-d1-mipi-dphy", - "allwinner,sun50i-a100-mipi-dphy"; - reg = <0x5451000 0x1000>; - interrupts = <(92 + 16) 4>; - clocks = <&ccu 111>, - <&ccu 110>; - clock-names = "bus", "mod"; - resets = <&ccu 51>; - #phy-cells = <0>; - }; - - tcon_top: tcon-top@5460000 { - compatible = "allwinner,sun20i-d1-tcon-top"; - reg = <0x5460000 0x1000>; - clocks = <&ccu 105>, - <&ccu 114>, - <&ccu 116>, - <&ccu 112>; - clock-names = "bus", "tcon-tv0", "tve0", "dsi"; - clock-output-names = "tcon-top-tv0", "tcon-top-dsi"; - resets = <&ccu 48>; - #clock-cells = <1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer0_in: port@0 { - reg = <0>; - - tcon_top_mixer0_in_mixer0: endpoint { - remote-endpoint = <&mixer0_out_tcon_top_mixer0>; - }; - }; - - tcon_top_mixer0_out: port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer0_out_tcon_lcd0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer0>; - }; - - tcon_top_mixer0_out_tcon_tv0: endpoint@2 { - reg = <2>; - remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>; - }; - }; - - tcon_top_mixer1_in: port@2 { - reg = <2>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer1_in_mixer1: endpoint@1 { - reg = <1>; - remote-endpoint = <&mixer1_out_tcon_top_mixer1>; - }; - }; - - tcon_top_mixer1_out: port@3 { - reg = <3>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer1_out_tcon_lcd0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer1>; - }; - - tcon_top_mixer1_out_tcon_tv0: endpoint@2 { - reg = <2>; - remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>; - }; - }; - - tcon_top_hdmi_in: port@4 { - reg = <4>; - - tcon_top_hdmi_in_tcon_tv0: endpoint { - remote-endpoint = <&tcon_tv0_out_tcon_top_hdmi>; - }; - }; - - tcon_top_hdmi_out: port@5 { - reg = <5>; - }; - }; - }; - - tcon_lcd0: lcd-controller@5461000 { - compatible = "allwinner,sun20i-d1-tcon-lcd"; - reg = <0x5461000 0x1000>; - interrupts = <(90 + 16) 4>; - clocks = <&ccu 113>, - <&ccu 112>; - clock-names = "ahb", "tcon-ch0"; - clock-output-names = "tcon-pixel-clock"; - resets = <&ccu 52>, - <&ccu 54>; - reset-names = "lcd", "lvds"; - phys = <&dphy>; - phy-names = "lvds0"; - #clock-cells = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon_lcd0_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_lcd0_in_tcon_top_mixer0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_top_mixer0_out_tcon_lcd0>; - }; - - tcon_lcd0_in_tcon_top_mixer1: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon_top_mixer1_out_tcon_lcd0>; - }; - }; - - tcon_lcd0_out: port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_lcd0_out_dsi: endpoint@1 { - reg = <1>; - remote-endpoint = <&dsi_in_tcon_lcd0>; - }; - }; - }; - }; - - tcon_tv0: lcd-controller@5470000 { - compatible = "allwinner,sun20i-d1-tcon-tv"; - reg = <0x5470000 0x1000>; - interrupts = <(91 + 16) 4>; - clocks = <&ccu 115>, - <&tcon_top 0>; - clock-names = "ahb", "tcon-ch1"; - resets = <&ccu 53>; - reset-names = "lcd"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon_tv0_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_tv0_in_tcon_top_mixer0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>; - }; - - tcon_tv0_in_tcon_top_mixer1: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>; - }; - }; - - tcon_tv0_out: port@1 { - reg = <1>; - - tcon_tv0_out_tcon_top_hdmi: endpoint { - remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>; - }; - }; - }; - }; - - ppu: power-controller@7001000 { - compatible = "allwinner,sun20i-d1-ppu"; - reg = <0x7001000 0x1000>; - clocks = <&r_ccu 4>; - resets = <&r_ccu 2>; - #power-domain-cells = <1>; - }; - - r_ccu: clock-controller@7010000 { - compatible = "allwinner,sun20i-d1-r-ccu"; - reg = <0x7010000 0x400>; - clocks = <&dcxo>, - <&rtc 0>, - <&rtc 2>, - <&ccu 6>; - clock-names = "hosc", "losc", "iosc", "pll-periph"; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - rtc: rtc@7090000 { - compatible = "allwinner,sun20i-d1-rtc", - "allwinner,sun50i-r329-rtc"; - reg = <0x7090000 0x400>; - interrupts = <(144 + 16) 4>; - clocks = <&r_ccu 7>, - <&dcxo>, - <&r_ccu 0>; - clock-names = "bus", "hosc", "ahb"; - #clock-cells = <1>; - }; - }; -}; -# 7 "sun20i-d1s.dtsi" 2 - -/ { - cpus { - timebase-frequency = <24000000>; - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - compatible = "thead,c906", "riscv"; - device_type = "cpu"; - reg = <0>; - clocks = <&ccu 132>; - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <32768>; - i-cache-block-size = <64>; - i-cache-sets = <128>; - i-cache-size = <32768>; - mmu-type = "riscv,sv39"; - operating-points-v2 = <&opp_table_cpu>; - riscv,isa = "rv64imafdc"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; - #cooling-cells = <2>; - - cpu0_intc: interrupt-controller { - compatible = "riscv,cpu-intc"; - interrupt-controller; - #interrupt-cells = <1>; - }; - }; - }; - - opp_table_cpu: opp-table-cpu { - compatible = "operating-points-v2"; - - opp-408000000 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <900000 900000 1100000>; - }; - - opp-1080000000 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <900000 900000 1100000>; - }; - }; - - soc { - interrupt-parent = <&plic>; - - riscv_wdt: watchdog@6011000 { - compatible = "allwinner,sun20i-d1-wdt"; - reg = <0x6011000 0x20>; - interrupts = <(131 + 16) 4>; - clocks = <&dcxo>, <&rtc 0>; - clock-names = "hosc", "losc"; - }; - - plic: interrupt-controller@10000000 { - compatible = "allwinner,sun20i-d1-plic", - "thead,c900-plic"; - reg = <0x10000000 0x4000000>; - interrupts-extended = <&cpu0_intc 11>, - <&cpu0_intc 9>; - interrupt-controller; - riscv,ndev = <175>; - #address-cells = <0>; - #interrupt-cells = <2>; - }; - }; - - pmu { - compatible = "riscv,pmu"; - riscv,event-to-mhpmcounters = - <0x00003 0x00003 0x00000008>, - <0x00004 0x00004 0x00000010>, - <0x00005 0x00005 0x00000200>, - <0x00006 0x00006 0x00000100>, - <0x10000 0x10000 0x00004000>, - <0x10001 0x10001 0x00008000>, - <0x10002 0x10002 0x00010000>, - <0x10003 0x10003 0x00020000>, - <0x10019 0x10019 0x00000040>, - <0x10021 0x10021 0x00000020>; - riscv,event-to-mhpmevent = - <0x00003 0x00000000 0x00000001>, - <0x00004 0x00000000 0x00000002>, - <0x00005 0x00000000 0x00000007>, - <0x00006 0x00000000 0x00000006>, - <0x10000 0x00000000 0x0000000c>, - <0x10001 0x00000000 0x0000000d>, - <0x10002 0x00000000 0x0000000e>, - <0x10003 0x00000000 0x0000000f>, - <0x10019 0x00000000 0x00000004>, - <0x10021 0x00000000 0x00000003>; - riscv,raw-event-to-mhpmcounters = - <0x00000000 0x00000001 0xffffffff 0xffffffff 0x00000008>, - <0x00000000 0x00000002 0xffffffff 0xffffffff 0x00000010>, - <0x00000000 0x00000003 0xffffffff 0xffffffff 0x00000020>, - <0x00000000 0x00000004 0xffffffff 0xffffffff 0x00000040>, - <0x00000000 0x00000005 0xffffffff 0xffffffff 0x00000080>, - <0x00000000 0x00000006 0xffffffff 0xffffffff 0x00000100>, - <0x00000000 0x00000007 0xffffffff 0xffffffff 0x00000200>, - <0x00000000 0x0000000b 0xffffffff 0xffffffff 0x00002000>, - <0x00000000 0x0000000c 0xffffffff 0xffffffff 0x00004000>, - <0x00000000 0x0000000d 0xffffffff 0xffffffff 0x00008000>, - <0x00000000 0x0000000e 0xffffffff 0xffffffff 0x00010000>, - <0x00000000 0x0000000f 0xffffffff 0xffffffff 0x00020000>; - }; -}; - -&sid { - ths_calib: ths-calib@14 { - reg = <0x14 0x4>; - }; - - bg_trim: bg-trim@28 { - reg = <0x28 0x4>; - bits = <16 8>; - }; -}; -# 5 "sun20i-d1.dtsi" 2 -# 1 "sunxi-d1-t113.dtsi" 1 - - - -/ { - soc { - dsp_wdt: watchdog@1700400 { - compatible = "allwinner,sun20i-d1-wdt"; - reg = <0x1700400 0x20>; - interrupts = <(122 + 16) 4>; - clocks = <&dcxo>, <&rtc 0>; - clock-names = "hosc", "losc"; - status = "reserved"; - }; - - hdmi: hdmi@5500000 { - compatible = "allwinner,sun20i-d1-dw-hdmi"; - reg = <0x5500000 0x10000>; - reg-io-width = <1>; - interrupts = <(93 + 16) 4>; - clocks = <&ccu 109>, - <&ccu 106>, - <&ccu 108>; - clock-names = "iahb", "isfr", "cec"; - resets = <&ccu 49>; - reset-names = "ctrl"; - phys = <&hdmi_phy>; - phy-names = "phy"; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - hdmi_in_tcon_top: endpoint { - remote-endpoint = <&tcon_top_hdmi_out_hdmi>; - }; - }; - - hdmi_out: port@1 { - reg = <1>; - }; - }; - }; - - hdmi_phy: phy@5510000 { - compatible = "allwinner,sun20i-d1-hdmi-phy"; - reg = <0x5510000 0x10000>; - clocks = <&ccu 109>, <&ccu 106>; - clock-names = "bus", "mod"; - resets = <&ccu 50>; - reset-names = "phy"; - status = "disabled"; - #phy-cells = <0>; - }; - }; -}; - -&tcon_top_hdmi_out { - tcon_top_hdmi_out_hdmi: endpoint { - remote-endpoint = <&hdmi_in_tcon_top>; - }; -}; -# 6 "sun20i-d1.dtsi" 2 - -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/thermal/thermal.h" 1 -# 8 "sun20i-d1.dtsi" 2 - -/ { - thermal-zones { - cpu-thermal { - polling-delay = <0>; - polling-delay-passive = <0>; - thermal-sensors = <&ths>; - - trips { - cpu_target: cpu-target { - hysteresis = <3000>; - temperature = <85000>; - type = "passive"; - }; - - cpu-crit { - hysteresis = <0>; - temperature = <110000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu_target>; - cooling-device = <&cpu0 (~0) (~0)>; - }; - }; - }; - }; - - soc { - ledc: led-controller@2008000 { - compatible = "allwinner,sun20i-d1-ledc", - "allwinner,sun50i-a100-ledc"; - reg = <0x2008000 0x400>; - interrupts = <(20 + 16) 4>; - clocks = <&ccu 123>, <&ccu 122>; - clock-names = "bus", "mod"; - resets = <&ccu 59>; - dmas = <&dma 42>; - dma-names = "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - ths: temperature-sensor@2009400 { - compatible = "allwinner,sun20i-d1-ths"; - reg = <0x2009400 0x400>; - interrupts = <74 4>; - clocks = <&ccu 81>, <&dcxo>; - clock-names = "bus", "mod"; - resets = <&ccu 33>; - nvmem-cells = <&ths_calib>; - nvmem-cell-names = "calibration"; - #thermal-sensor-cells = <0>; - vref-supply = <®_aldo>; - }; - - lradc: keys@2009800 { - compatible = "allwinner,sun20i-d1-lradc", - "allwinner,sun50i-r329-lradc"; - reg = <0x2009800 0x400>; - interrupts = <(61 + 16) 4>; - clocks = <&ccu 104>; - resets = <&ccu 47>; - vref-supply = <®_aldo>; - status = "disabled"; - }; - - codec: audio-codec@2030000 { - compatible = "allwinner,sun20i-d1-codec", "simple-mfd", "syscon"; - reg = <0x2030000 0x1000>; - interrupts = <(25 + 16) 4>; - clocks = <&ccu 96>, - <&ccu 95>, - <&ccu 94>, - <&dcxo>, - <&rtc 0>; - clock-names = "bus", "adc", "dac", "hosc", "losc"; - resets = <&ccu 39>; - dmas = <&dma 7>, <&dma 7>; - dma-names = "rx", "tx"; - avcc-supply = <®_aldo>; - hpvcc-supply = <®_hpldo>; - #address-cells = <1>; - #size-cells = <1>; - #sound-dai-cells = <0>; - - regulators@2030348 { - compatible = "allwinner,sun20i-d1-analog-ldos"; - reg = <0x2030348 0x4>; - nvmem-cells = <&bg_trim>; - nvmem-cell-names = "bg_trim"; - - reg_aldo: aldo { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - vdd33-supply = <®_vcc_3v3>; - }; - - reg_hpldo: hpldo { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - hpldoin-supply = <®_vcc_3v3>; - }; - }; - }; - - i2s0: i2s@2032000 { - compatible = "allwinner,sun20i-d1-i2s", - "allwinner,sun50i-r329-i2s"; - reg = <0x2032000 0x1000>; - interrupts = <(26 + 16) 4>; - clocks = <&ccu 86>, - <&ccu 82>; - clock-names = "apb", "mod"; - resets = <&ccu 34>; - dmas = <&dma 3>, <&dma 3>; - dma-names = "rx", "tx"; - status = "disabled"; - #sound-dai-cells = <0>; - }; - }; -}; - -&hdmi { - hvcc-supply = <®_ldoa>; -}; - -&pio { - /omit-if-no-ref/ - dmic_pb11_d0_pin: dmic-pb11-d0-pin { - pins = "PB11"; - function = "dmic"; - }; - - /omit-if-no-ref/ - dmic_pe17_clk_pin: dmic-pe17-clk-pin { - pins = "PE17"; - function = "dmic"; - }; - - /omit-if-no-ref/ - i2c0_pb10_pins: i2c0-pb10-pins { - pins = "PB10", "PB11"; - function = "i2c0"; - }; - - /omit-if-no-ref/ - i2c2_pb0_pins: i2c2-pb0-pins { - pins = "PB0", "PB1"; - function = "i2c2"; - }; - - /omit-if-no-ref/ - ledc_pc0_pin: ledc-pc0-pin { - pins = "PC0"; - function = "ledc"; - }; - - /omit-if-no-ref/ - uart0_pb8_pins: uart0-pb8-pins { - pins = "PB8", "PB9"; - function = "uart0"; - }; -}; - -&syscon { - regulators@3000150 { - compatible = "allwinner,sun20i-d1-system-ldos"; - reg = <0x3000150 0x4>; - - reg_ldoa: ldoa { - regulator-always-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - ldo-in-supply = <®_vcc_3v3>; - }; - - reg_ldob: ldob { - }; - }; -}; -# 10 "sun20i-d1-mangopi-mq-pro.dts" 2 -# 1 "sun20i-common-regulators.dtsi" 1 - - - -/ { - reg_vcc: vcc { - compatible = "regulator-fixed"; - regulator-name = "vcc"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - reg_vcc_3v3: vcc-3v3 { - compatible = "regulator-fixed"; - regulator-name = "vcc-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <®_vcc>; - }; -}; - -&pio { - vcc-pb-supply = <®_vcc_3v3>; - vcc-pc-supply = <®_vcc_3v3>; - vcc-pd-supply = <®_vcc_3v3>; - vcc-pe-supply = <®_vcc_3v3>; - vcc-pf-supply = <®_vcc_3v3>; - vcc-pg-supply = <®_vcc_3v3>; -}; -# 11 "sun20i-d1-mangopi-mq-pro.dts" 2 - -/ { - model = "MangoPi MQ Pro"; - compatible = "widora,mangopi-mq-pro", "allwinner,sun20i-d1"; - - aliases { - ethernet0 = &rtl8723ds; - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - - hdmi_connector: connector { - compatible = "hdmi-connector"; - type = "c"; - - port { - hdmi_connector_in: endpoint { - remote-endpoint = <&hdmi_out_connector>; - }; - }; - }; - - leds { - compatible = "gpio-leds"; - - led-0 { - color = <3>; - function = "status"; - gpios = <&pio 3 18 0>; - }; - }; - - reg_avdd2v8: avdd2v8 { - compatible = "regulator-fixed"; - regulator-name = "avdd2v8"; - regulator-min-microvolt = <2800000>; - regulator-max-microvolt = <2800000>; - vin-supply = <®_vcc_3v3>; - }; - - reg_dvdd: dvdd { - compatible = "regulator-fixed"; - regulator-name = "dvdd"; - regulator-min-microvolt = <1200000>; - regulator-max-microvolt = <1200000>; - vin-supply = <®_vcc_3v3>; - }; - - reg_vdd_cpu: vdd-cpu { - compatible = "regulator-fixed"; - regulator-name = "vdd-cpu"; - regulator-min-microvolt = <1100000>; - regulator-max-microvolt = <1100000>; - vin-supply = <®_vcc>; - }; - - wifi_pwrseq: wifi-pwrseq { - compatible = "mmc-pwrseq-simple"; - reset-gpios = <&pio 6 17 1>; - }; -}; - -&cpu0 { - cpu-supply = <®_vdd_cpu>; -}; - -&dcxo { - clock-frequency = <24000000>; -}; - -&de { - status = "okay"; -}; - -&ehci1 { - status = "okay"; -}; - -&hdmi { - status = "okay"; -}; - -&hdmi_out { - hdmi_out_connector: endpoint { - remote-endpoint = <&hdmi_connector_in>; - }; -}; - -&hdmi_phy { - status = "okay"; -}; - -&mmc0 { - bus-width = <4>; - cd-gpios = <&pio 5 6 0>; - disable-wp; - vmmc-supply = <®_vcc_3v3>; - vqmmc-supply = <®_vcc_3v3>; - pinctrl-0 = <&mmc0_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&mmc1 { - bus-width = <4>; - mmc-pwrseq = <&wifi_pwrseq>; - non-removable; - vmmc-supply = <®_vcc_3v3>; - vqmmc-supply = <®_vcc_3v3>; - pinctrl-0 = <&mmc1_pins>; - pinctrl-names = "default"; - status = "okay"; - - rtl8723ds: wifi@1 { - reg = <1>; - interrupt-parent = <&pio>; - interrupts = <6 10 8>; - interrupt-names = "host-wake"; - }; -}; - -&ohci1 { - status = "okay"; -}; - -&pio { - vcc-pe-supply = <®_avdd2v8>; -}; - -&uart0 { - pinctrl-0 = <&uart0_pb8_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&uart1 { - uart-has-rtscts; - pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>; - pinctrl-names = "default"; - status = "okay"; - - bluetooth { - compatible = "realtek,rtl8723ds-bt"; - device-wake-gpios = <&pio 6 18 0>; - enable-gpios = <&pio 6 15 0>; - host-wake-gpios = <&pio 6 14 0>; - }; -}; - -&usb_otg { - dr_mode = "peripheral"; - status = "okay"; -}; - -&usbphy { - usb1_vbus-supply = <®_vcc>; - status = "okay"; -}; diff --git a/device-tree/6.8.0-41-generic/sun20i-d1.dtsi b/device-tree/6.8.0-41-generic/sun20i-d1.dtsi deleted file mode 100644 index 49cc260..0000000 --- a/device-tree/6.8.0-41-generic/sun20i-d1.dtsi +++ /dev/null @@ -1,1380 +0,0 @@ -# 0 "sun20i-d1.dtsi" -# 0 "" -# 0 "" -# 1 "sun20i-d1.dtsi" - - - -# 1 "sun20i-d1s.dtsi" 1 - - - - - -# 1 "sunxi-d1s-t113.dtsi" 1 - - - -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun6i-rtc.h" 1 -# 5 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun8i-de2.h" 1 -# 6 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun8i-tcon-top.h" 1 -# 7 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun20i-d1-ccu.h" 1 -# 8 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun20i-d1-r-ccu.h" 1 -# 9 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/interrupt-controller/irq.h" 1 -# 10 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/reset/sun8i-de2.h" 1 -# 11 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/reset/sun20i-d1-ccu.h" 1 -# 12 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/reset/sun20i-d1-r-ccu.h" 1 -# 13 "sunxi-d1s-t113.dtsi" 2 - -/ { - #address-cells = <1>; - #size-cells = <1>; - - dcxo: dcxo-clk { - compatible = "fixed-clock"; - clock-output-names = "dcxo"; - #clock-cells = <0>; - }; - - de: display-engine { - compatible = "allwinner,sun20i-d1-display-engine"; - allwinner,pipelines = <&mixer0>, <&mixer1>; - status = "disabled"; - }; - - soc { - compatible = "simple-bus"; - ranges; - dma-noncoherent; - #address-cells = <1>; - #size-cells = <1>; - - pio: pinctrl@2000000 { - compatible = "allwinner,sun20i-d1-pinctrl"; - reg = <0x2000000 0x800>; - interrupts = <(69 + 16) 4>, - <(71 + 16) 4>, - <(73 + 16) 4>, - <(75 + 16) 4>, - <(77 + 16) 4>, - <(79 + 16) 4>; - clocks = <&ccu 24>, - <&dcxo>, - <&rtc 0>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - interrupt-controller; - #gpio-cells = <3>; - #interrupt-cells = <3>; - - /omit-if-no-ref/ - can0_pins: can0-pins { - pins = "PB2", "PB3"; - function = "can0"; - }; - - /omit-if-no-ref/ - can1_pins: can1-pins { - pins = "PB4", "PB5"; - function = "can1"; - }; - - /omit-if-no-ref/ - clk_pg11_pin: clk-pg11-pin { - pins = "PG11"; - function = "clk"; - }; - - /omit-if-no-ref/ - dsi_4lane_pins: dsi-4lane-pins { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", - "PD6", "PD7", "PD8", "PD9"; - drive-strength = <30>; - function = "dsi"; - }; - - /omit-if-no-ref/ - lcd_rgb666_pins: lcd-rgb666-pins { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", - "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", - "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", - "PD18", "PD19", "PD20", "PD21"; - function = "lcd0"; - }; - - /omit-if-no-ref/ - mmc0_pins: mmc0-pins { - pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; - function = "mmc0"; - }; - - /omit-if-no-ref/ - mmc1_pins: mmc1-pins { - pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; - function = "mmc1"; - }; - - /omit-if-no-ref/ - mmc2_pins: mmc2-pins { - pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; - function = "mmc2"; - }; - - /omit-if-no-ref/ - pwm0_pd16_pin: pwm0-pd16-pin { - pins = "PD16"; - function = "pwm0"; - }; - - /omit-if-no-ref/ - pwm2_pd18_pin: pwm2-pd18-pin { - pins = "PD18"; - function = "pwm2"; - }; - - /omit-if-no-ref/ - pwm4_pd20_pin: pwm4-pd20-pin { - pins = "PD20"; - function = "pwm4"; - }; - - /omit-if-no-ref/ - pwm7_pd22_pin: pwm7-pd22-pin { - pins = "PD22"; - function = "pwm7"; - }; - - /omit-if-no-ref/ - rgmii_pe_pins: rgmii-pe-pins { - pins = "PE0", "PE1", "PE2", "PE3", "PE4", - "PE5", "PE6", "PE7", "PE8", "PE9", - "PE11", "PE12", "PE13", "PE14", "PE15"; - function = "emac"; - }; - - /omit-if-no-ref/ - rmii_pe_pins: rmii-pe-pins { - pins = "PE0", "PE1", "PE2", "PE3", "PE4", - "PE5", "PE6", "PE7", "PE8", "PE9"; - function = "emac"; - }; - - /omit-if-no-ref/ - spi0_pins: spi0-pins { - pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; - function = "spi0"; - }; - - /omit-if-no-ref/ - spi1_pb_pins: spi1-pb-pins { - pins = "PB0", "PB8", "PB9", "PB10", "PB11", "PB12"; - function = "spi1"; - }; - - /omit-if-no-ref/ - spi1_pd_pins: spi1-pd-pins { - pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15"; - function = "spi1"; - }; - - /omit-if-no-ref/ - uart1_pg6_pins: uart1-pg6-pins { - pins = "PG6", "PG7"; - function = "uart1"; - }; - - /omit-if-no-ref/ - uart1_pg8_rts_cts_pins: uart1-pg8-rts-cts-pins { - pins = "PG8", "PG9"; - function = "uart1"; - }; - - /omit-if-no-ref/ - uart3_pb_pins: uart3-pb-pins { - pins = "PB6", "PB7"; - function = "uart3"; - }; - }; - - pwm: pwm@2000c00 { - compatible = "allwinner,sun20i-d1-pwm"; - reg = <0x02000c00 0x400>; - clocks = <&ccu 45>, - <&dcxo>, - <&ccu 24>; - clock-names = "bus", "hosc", "apb0"; - resets = <&ccu 13>; - status = "disabled"; - #pwm-cells = <0x3>; - }; - - ccu: clock-controller@2001000 { - compatible = "allwinner,sun20i-d1-ccu"; - reg = <0x2001000 0x1000>; - clocks = <&dcxo>, - <&rtc 0>, - <&rtc 2>; - clock-names = "hosc", "losc", "iosc"; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - gpadc: adc@2009000 { - compatible = "allwinner,sun20i-d1-gpadc"; - reg = <0x2009000 0x400>; - clocks = <&ccu 80>; - resets = <&ccu 32>; - interrupts = <(57 + 16) 4>; - status = "disabled"; - #io-channel-cells = <1>; - }; - - dmic: dmic@2031000 { - compatible = "allwinner,sun20i-d1-dmic", - "allwinner,sun50i-h6-dmic"; - reg = <0x2031000 0x400>; - interrupts = <(24 + 16) 4>; - clocks = <&ccu 93>, - <&ccu 92>; - clock-names = "bus", "mod"; - resets = <&ccu 38>; - dmas = <&dma 8>; - dma-names = "rx"; - status = "disabled"; - #sound-dai-cells = <0>; - }; - - i2s1: i2s@2033000 { - compatible = "allwinner,sun20i-d1-i2s", - "allwinner,sun50i-r329-i2s"; - reg = <0x2033000 0x1000>; - interrupts = <(27 + 16) 4>; - clocks = <&ccu 87>, - <&ccu 83>; - clock-names = "apb", "mod"; - resets = <&ccu 35>; - dmas = <&dma 4>, <&dma 4>; - dma-names = "rx", "tx"; - status = "disabled"; - #sound-dai-cells = <0>; - }; - - i2s2: i2s@2034000 { - compatible = "allwinner,sun20i-d1-i2s", - "allwinner,sun50i-r329-i2s"; - reg = <0x2034000 0x1000>; - interrupts = <(28 + 16) 4>; - clocks = <&ccu 88>, - <&ccu 84>; - clock-names = "apb", "mod"; - resets = <&ccu 36>; - dmas = <&dma 5>, <&dma 5>; - dma-names = "rx", "tx"; - status = "disabled"; - #sound-dai-cells = <0>; - }; - - timer: timer@2050000 { - compatible = "allwinner,sun20i-d1-timer", - "allwinner,sun8i-a23-timer"; - reg = <0x2050000 0xa0>; - interrupts = <(59 + 16) 4>, - <(60 + 16) 4>; - clocks = <&dcxo>; - }; - - wdt: watchdog@20500a0 { - compatible = "allwinner,sun20i-d1-wdt-reset", - "allwinner,sun20i-d1-wdt"; - reg = <0x20500a0 0x20>; - interrupts = <(63 + 16) 4>; - clocks = <&dcxo>, <&rtc 0>; - clock-names = "hosc", "losc"; - status = "reserved"; - }; - - uart0: serial@2500000 { - compatible = "snps,dw-apb-uart"; - reg = <0x2500000 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(2 + 16) 4>; - clocks = <&ccu 62>; - resets = <&ccu 18>; - dmas = <&dma 14>, <&dma 14>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart1: serial@2500400 { - compatible = "snps,dw-apb-uart"; - reg = <0x2500400 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(3 + 16) 4>; - clocks = <&ccu 63>; - resets = <&ccu 19>; - dmas = <&dma 15>, <&dma 15>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart2: serial@2500800 { - compatible = "snps,dw-apb-uart"; - reg = <0x2500800 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(4 + 16) 4>; - clocks = <&ccu 64>; - resets = <&ccu 20>; - dmas = <&dma 16>, <&dma 16>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart3: serial@2500c00 { - compatible = "snps,dw-apb-uart"; - reg = <0x2500c00 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(5 + 16) 4>; - clocks = <&ccu 65>; - resets = <&ccu 21>; - dmas = <&dma 17>, <&dma 17>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart4: serial@2501000 { - compatible = "snps,dw-apb-uart"; - reg = <0x2501000 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(6 + 16) 4>; - clocks = <&ccu 66>; - resets = <&ccu 22>; - dmas = <&dma 18>, <&dma 18>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart5: serial@2501400 { - compatible = "snps,dw-apb-uart"; - reg = <0x2501400 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(7 + 16) 4>; - clocks = <&ccu 67>; - resets = <&ccu 23>; - dmas = <&dma 19>, <&dma 19>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - i2c0: i2c@2502000 { - compatible = "allwinner,sun20i-d1-i2c", - "allwinner,sun8i-v536-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x2502000 0x400>; - interrupts = <(9 + 16) 4>; - clocks = <&ccu 68>; - resets = <&ccu 24>; - dmas = <&dma 43>, <&dma 43>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c1: i2c@2502400 { - compatible = "allwinner,sun20i-d1-i2c", - "allwinner,sun8i-v536-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x2502400 0x400>; - interrupts = <(10 + 16) 4>; - clocks = <&ccu 69>; - resets = <&ccu 25>; - dmas = <&dma 44>, <&dma 44>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c2: i2c@2502800 { - compatible = "allwinner,sun20i-d1-i2c", - "allwinner,sun8i-v536-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x2502800 0x400>; - interrupts = <(11 + 16) 4>; - clocks = <&ccu 70>; - resets = <&ccu 26>; - dmas = <&dma 45>, <&dma 45>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c3: i2c@2502c00 { - compatible = "allwinner,sun20i-d1-i2c", - "allwinner,sun8i-v536-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x2502c00 0x400>; - interrupts = <(12 + 16) 4>; - clocks = <&ccu 71>; - resets = <&ccu 27>; - dmas = <&dma 46>, <&dma 46>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - can0: can@2504000 { - compatible = "allwinner,sun20i-d1-can"; - reg = <0x02504000 0x400>; - interrupts = <(21 + 16) 4>; - clocks = <&ccu 145>; - resets = <&ccu 66>; - pinctrl-names = "default"; - pinctrl-0 = <&can0_pins>; - status = "disabled"; - }; - - can1: can@2504400 { - compatible = "allwinner,sun20i-d1-can"; - reg = <0x02504400 0x400>; - interrupts = <(22 + 16) 4>; - clocks = <&ccu 146>; - resets = <&ccu 67>; - pinctrl-names = "default"; - pinctrl-0 = <&can1_pins>; - status = "disabled"; - }; - - syscon: syscon@3000000 { - compatible = "allwinner,sun20i-d1-system-control"; - reg = <0x3000000 0x1000>; - ranges; - #address-cells = <1>; - #size-cells = <1>; - }; - - dma: dma-controller@3002000 { - compatible = "allwinner,sun20i-d1-dma"; - reg = <0x3002000 0x1000>; - interrupts = <(50 + 16) 4>; - clocks = <&ccu 37>, <&ccu 48>; - clock-names = "bus", "mbus"; - resets = <&ccu 6>; - dma-channels = <16>; - dma-requests = <48>; - #dma-cells = <1>; - }; - - sid: efuse@3006000 { - compatible = "allwinner,sun20i-d1-sid"; - reg = <0x3006000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - }; - - crypto: crypto@3040000 { - compatible = "allwinner,sun20i-d1-crypto"; - reg = <0x3040000 0x800>; - interrupts = <(52 + 16) 4>; - clocks = <&ccu 34>, - <&ccu 33>, - <&ccu 50>, - <&rtc 2>; - clock-names = "bus", "mod", "ram", "trng"; - resets = <&ccu 4>; - }; - - mbus: dram-controller@3102000 { - compatible = "allwinner,sun20i-d1-mbus"; - reg = <0x3102000 0x1000>, - <0x3103000 0x1000>; - reg-names = "mbus", "dram"; - interrupts = <(43 + 16) 4>; - clocks = <&ccu 26>, - <&ccu 47>, - <&ccu 55>; - clock-names = "mbus", "dram", "bus"; - dma-ranges = <0 0x40000000 0x80000000>; - #address-cells = <1>; - #size-cells = <1>; - #interconnect-cells = <1>; - }; - - mmc0: mmc@4020000 { - compatible = "allwinner,sun20i-d1-mmc"; - reg = <0x4020000 0x1000>; - interrupts = <(40 + 16) 4>; - clocks = <&ccu 59>, <&ccu 56>; - clock-names = "ahb", "mmc"; - resets = <&ccu 15>; - reset-names = "ahb"; - cap-sd-highspeed; - max-frequency = <150000000>; - no-mmc; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc1: mmc@4021000 { - compatible = "allwinner,sun20i-d1-mmc"; - reg = <0x4021000 0x1000>; - interrupts = <(41 + 16) 4>; - clocks = <&ccu 60>, <&ccu 57>; - clock-names = "ahb", "mmc"; - resets = <&ccu 16>; - reset-names = "ahb"; - cap-sd-highspeed; - max-frequency = <150000000>; - no-mmc; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc2: mmc@4022000 { - compatible = "allwinner,sun20i-d1-emmc", - "allwinner,sun50i-a100-emmc"; - reg = <0x4022000 0x1000>; - interrupts = <(42 + 16) 4>; - clocks = <&ccu 61>, <&ccu 58>; - clock-names = "ahb", "mmc"; - resets = <&ccu 17>; - reset-names = "ahb"; - cap-mmc-highspeed; - max-frequency = <150000000>; - mmc-ddr-1_8v; - mmc-ddr-3_3v; - no-sd; - no-sdio; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi0: spi@4025000 { - compatible = "allwinner,sun20i-d1-spi", - "allwinner,sun50i-r329-spi"; - reg = <0x04025000 0x1000>; - interrupts = <(15 + 16) 4>; - clocks = <&ccu 74>, <&ccu 72>; - clock-names = "ahb", "mod"; - dmas = <&dma 22>, <&dma 22>; - dma-names = "rx", "tx"; - resets = <&ccu 28>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi1: spi@4026000 { - compatible = "allwinner,sun20i-d1-spi-dbi", - "allwinner,sun50i-r329-spi-dbi", - "allwinner,sun50i-r329-spi"; - reg = <0x04026000 0x1000>; - interrupts = <(16 + 16) 4>; - clocks = <&ccu 75>, <&ccu 73>; - clock-names = "ahb", "mod"; - dmas = <&dma 23>, <&dma 23>; - dma-names = "rx", "tx"; - resets = <&ccu 29>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - usb_otg: usb@4100000 { - compatible = "allwinner,sun20i-d1-musb", - "allwinner,sun8i-a33-musb"; - reg = <0x4100000 0x400>; - interrupts = <(29 + 16) 4>; - interrupt-names = "mc"; - clocks = <&ccu 103>; - resets = <&ccu 46>; - extcon = <&usbphy 0>; - phys = <&usbphy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - usbphy: phy@4100400 { - compatible = "allwinner,sun20i-d1-usb-phy"; - reg = <0x4100400 0x100>, - <0x4101800 0x100>, - <0x4200800 0x100>; - reg-names = "phy_ctrl", - "pmu0", - "pmu1"; - clocks = <&dcxo>, - <&dcxo>; - clock-names = "usb0_phy", - "usb1_phy"; - resets = <&ccu 40>, - <&ccu 41>; - reset-names = "usb0_reset", - "usb1_reset"; - status = "disabled"; - #phy-cells = <1>; - }; - - ehci0: usb@4101000 { - compatible = "allwinner,sun20i-d1-ehci", - "generic-ehci"; - reg = <0x4101000 0x100>; - interrupts = <(30 + 16) 4>; - clocks = <&ccu 99>, - <&ccu 101>, - <&ccu 97>; - resets = <&ccu 42>, - <&ccu 44>; - phys = <&usbphy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci0: usb@4101400 { - compatible = "allwinner,sun20i-d1-ohci", - "generic-ohci"; - reg = <0x4101400 0x100>; - interrupts = <(31 + 16) 4>; - clocks = <&ccu 99>, - <&ccu 97>; - resets = <&ccu 42>; - phys = <&usbphy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - ehci1: usb@4200000 { - compatible = "allwinner,sun20i-d1-ehci", - "generic-ehci"; - reg = <0x4200000 0x100>; - interrupts = <(33 + 16) 4>; - clocks = <&ccu 100>, - <&ccu 102>, - <&ccu 98>; - resets = <&ccu 43>, - <&ccu 45>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci1: usb@4200400 { - compatible = "allwinner,sun20i-d1-ohci", - "generic-ohci"; - reg = <0x4200400 0x100>; - interrupts = <(34 + 16) 4>; - clocks = <&ccu 100>, - <&ccu 98>; - resets = <&ccu 43>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; - }; - - emac: ethernet@4500000 { - compatible = "allwinner,sun20i-d1-emac", - "allwinner,sun50i-a64-emac"; - reg = <0x4500000 0x10000>; - interrupts = <(46 + 16) 4>; - interrupt-names = "macirq"; - clocks = <&ccu 77>; - clock-names = "stmmaceth"; - resets = <&ccu 30>; - reset-names = "stmmaceth"; - syscon = <&syscon>; - status = "disabled"; - - mdio: mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - display_clocks: clock-controller@5000000 { - compatible = "allwinner,sun20i-d1-de2-clk", - "allwinner,sun50i-h5-de2-clk"; - reg = <0x5000000 0x10000>; - clocks = <&ccu 28>, <&ccu 27>; - clock-names = "bus", "mod"; - resets = <&ccu 1>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - mixer0: mixer@5100000 { - compatible = "allwinner,sun20i-d1-de2-mixer-0"; - reg = <0x5100000 0x100000>; - clocks = <&display_clocks 0>, - <&display_clocks 6>; - clock-names = "bus", "mod"; - resets = <&display_clocks 0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - mixer0_out: port@1 { - reg = <1>; - - mixer0_out_tcon_top_mixer0: endpoint { - remote-endpoint = <&tcon_top_mixer0_in_mixer0>; - }; - }; - }; - }; - - mixer1: mixer@5200000 { - compatible = "allwinner,sun20i-d1-de2-mixer-1"; - reg = <0x5200000 0x100000>; - clocks = <&display_clocks 1>, - <&display_clocks 7>; - clock-names = "bus", "mod"; - resets = <&display_clocks 1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - mixer1_out: port@1 { - reg = <1>; - - mixer1_out_tcon_top_mixer1: endpoint { - remote-endpoint = <&tcon_top_mixer1_in_mixer1>; - }; - }; - }; - }; - - dsi: dsi@5450000 { - compatible = "allwinner,sun20i-d1-mipi-dsi", - "allwinner,sun50i-a100-mipi-dsi"; - reg = <0x5450000 0x1000>; - interrupts = <(92 + 16) 4>; - clocks = <&ccu 111>, - <&tcon_top 2>; - clock-names = "bus", "mod"; - resets = <&ccu 51>; - phys = <&dphy>; - phy-names = "dphy"; - status = "disabled"; - - port { - dsi_in_tcon_lcd0: endpoint { - remote-endpoint = <&tcon_lcd0_out_dsi>; - }; - }; - }; - - dphy: phy@5451000 { - compatible = "allwinner,sun20i-d1-mipi-dphy", - "allwinner,sun50i-a100-mipi-dphy"; - reg = <0x5451000 0x1000>; - interrupts = <(92 + 16) 4>; - clocks = <&ccu 111>, - <&ccu 110>; - clock-names = "bus", "mod"; - resets = <&ccu 51>; - #phy-cells = <0>; - }; - - tcon_top: tcon-top@5460000 { - compatible = "allwinner,sun20i-d1-tcon-top"; - reg = <0x5460000 0x1000>; - clocks = <&ccu 105>, - <&ccu 114>, - <&ccu 116>, - <&ccu 112>; - clock-names = "bus", "tcon-tv0", "tve0", "dsi"; - clock-output-names = "tcon-top-tv0", "tcon-top-dsi"; - resets = <&ccu 48>; - #clock-cells = <1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer0_in: port@0 { - reg = <0>; - - tcon_top_mixer0_in_mixer0: endpoint { - remote-endpoint = <&mixer0_out_tcon_top_mixer0>; - }; - }; - - tcon_top_mixer0_out: port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer0_out_tcon_lcd0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer0>; - }; - - tcon_top_mixer0_out_tcon_tv0: endpoint@2 { - reg = <2>; - remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>; - }; - }; - - tcon_top_mixer1_in: port@2 { - reg = <2>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer1_in_mixer1: endpoint@1 { - reg = <1>; - remote-endpoint = <&mixer1_out_tcon_top_mixer1>; - }; - }; - - tcon_top_mixer1_out: port@3 { - reg = <3>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer1_out_tcon_lcd0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer1>; - }; - - tcon_top_mixer1_out_tcon_tv0: endpoint@2 { - reg = <2>; - remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>; - }; - }; - - tcon_top_hdmi_in: port@4 { - reg = <4>; - - tcon_top_hdmi_in_tcon_tv0: endpoint { - remote-endpoint = <&tcon_tv0_out_tcon_top_hdmi>; - }; - }; - - tcon_top_hdmi_out: port@5 { - reg = <5>; - }; - }; - }; - - tcon_lcd0: lcd-controller@5461000 { - compatible = "allwinner,sun20i-d1-tcon-lcd"; - reg = <0x5461000 0x1000>; - interrupts = <(90 + 16) 4>; - clocks = <&ccu 113>, - <&ccu 112>; - clock-names = "ahb", "tcon-ch0"; - clock-output-names = "tcon-pixel-clock"; - resets = <&ccu 52>, - <&ccu 54>; - reset-names = "lcd", "lvds"; - phys = <&dphy>; - phy-names = "lvds0"; - #clock-cells = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon_lcd0_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_lcd0_in_tcon_top_mixer0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_top_mixer0_out_tcon_lcd0>; - }; - - tcon_lcd0_in_tcon_top_mixer1: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon_top_mixer1_out_tcon_lcd0>; - }; - }; - - tcon_lcd0_out: port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_lcd0_out_dsi: endpoint@1 { - reg = <1>; - remote-endpoint = <&dsi_in_tcon_lcd0>; - }; - }; - }; - }; - - tcon_tv0: lcd-controller@5470000 { - compatible = "allwinner,sun20i-d1-tcon-tv"; - reg = <0x5470000 0x1000>; - interrupts = <(91 + 16) 4>; - clocks = <&ccu 115>, - <&tcon_top 0>; - clock-names = "ahb", "tcon-ch1"; - resets = <&ccu 53>; - reset-names = "lcd"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon_tv0_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_tv0_in_tcon_top_mixer0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>; - }; - - tcon_tv0_in_tcon_top_mixer1: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>; - }; - }; - - tcon_tv0_out: port@1 { - reg = <1>; - - tcon_tv0_out_tcon_top_hdmi: endpoint { - remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>; - }; - }; - }; - }; - - ppu: power-controller@7001000 { - compatible = "allwinner,sun20i-d1-ppu"; - reg = <0x7001000 0x1000>; - clocks = <&r_ccu 4>; - resets = <&r_ccu 2>; - #power-domain-cells = <1>; - }; - - r_ccu: clock-controller@7010000 { - compatible = "allwinner,sun20i-d1-r-ccu"; - reg = <0x7010000 0x400>; - clocks = <&dcxo>, - <&rtc 0>, - <&rtc 2>, - <&ccu 6>; - clock-names = "hosc", "losc", "iosc", "pll-periph"; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - rtc: rtc@7090000 { - compatible = "allwinner,sun20i-d1-rtc", - "allwinner,sun50i-r329-rtc"; - reg = <0x7090000 0x400>; - interrupts = <(144 + 16) 4>; - clocks = <&r_ccu 7>, - <&dcxo>, - <&r_ccu 0>; - clock-names = "bus", "hosc", "ahb"; - #clock-cells = <1>; - }; - }; -}; -# 7 "sun20i-d1s.dtsi" 2 - -/ { - cpus { - timebase-frequency = <24000000>; - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - compatible = "thead,c906", "riscv"; - device_type = "cpu"; - reg = <0>; - clocks = <&ccu 132>; - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <32768>; - i-cache-block-size = <64>; - i-cache-sets = <128>; - i-cache-size = <32768>; - mmu-type = "riscv,sv39"; - operating-points-v2 = <&opp_table_cpu>; - riscv,isa = "rv64imafdc"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; - #cooling-cells = <2>; - - cpu0_intc: interrupt-controller { - compatible = "riscv,cpu-intc"; - interrupt-controller; - #interrupt-cells = <1>; - }; - }; - }; - - opp_table_cpu: opp-table-cpu { - compatible = "operating-points-v2"; - - opp-408000000 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <900000 900000 1100000>; - }; - - opp-1080000000 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <900000 900000 1100000>; - }; - }; - - soc { - interrupt-parent = <&plic>; - - riscv_wdt: watchdog@6011000 { - compatible = "allwinner,sun20i-d1-wdt"; - reg = <0x6011000 0x20>; - interrupts = <(131 + 16) 4>; - clocks = <&dcxo>, <&rtc 0>; - clock-names = "hosc", "losc"; - }; - - plic: interrupt-controller@10000000 { - compatible = "allwinner,sun20i-d1-plic", - "thead,c900-plic"; - reg = <0x10000000 0x4000000>; - interrupts-extended = <&cpu0_intc 11>, - <&cpu0_intc 9>; - interrupt-controller; - riscv,ndev = <175>; - #address-cells = <0>; - #interrupt-cells = <2>; - }; - }; - - pmu { - compatible = "riscv,pmu"; - riscv,event-to-mhpmcounters = - <0x00003 0x00003 0x00000008>, - <0x00004 0x00004 0x00000010>, - <0x00005 0x00005 0x00000200>, - <0x00006 0x00006 0x00000100>, - <0x10000 0x10000 0x00004000>, - <0x10001 0x10001 0x00008000>, - <0x10002 0x10002 0x00010000>, - <0x10003 0x10003 0x00020000>, - <0x10019 0x10019 0x00000040>, - <0x10021 0x10021 0x00000020>; - riscv,event-to-mhpmevent = - <0x00003 0x00000000 0x00000001>, - <0x00004 0x00000000 0x00000002>, - <0x00005 0x00000000 0x00000007>, - <0x00006 0x00000000 0x00000006>, - <0x10000 0x00000000 0x0000000c>, - <0x10001 0x00000000 0x0000000d>, - <0x10002 0x00000000 0x0000000e>, - <0x10003 0x00000000 0x0000000f>, - <0x10019 0x00000000 0x00000004>, - <0x10021 0x00000000 0x00000003>; - riscv,raw-event-to-mhpmcounters = - <0x00000000 0x00000001 0xffffffff 0xffffffff 0x00000008>, - <0x00000000 0x00000002 0xffffffff 0xffffffff 0x00000010>, - <0x00000000 0x00000003 0xffffffff 0xffffffff 0x00000020>, - <0x00000000 0x00000004 0xffffffff 0xffffffff 0x00000040>, - <0x00000000 0x00000005 0xffffffff 0xffffffff 0x00000080>, - <0x00000000 0x00000006 0xffffffff 0xffffffff 0x00000100>, - <0x00000000 0x00000007 0xffffffff 0xffffffff 0x00000200>, - <0x00000000 0x0000000b 0xffffffff 0xffffffff 0x00002000>, - <0x00000000 0x0000000c 0xffffffff 0xffffffff 0x00004000>, - <0x00000000 0x0000000d 0xffffffff 0xffffffff 0x00008000>, - <0x00000000 0x0000000e 0xffffffff 0xffffffff 0x00010000>, - <0x00000000 0x0000000f 0xffffffff 0xffffffff 0x00020000>; - }; -}; - -&sid { - ths_calib: ths-calib@14 { - reg = <0x14 0x4>; - }; - - bg_trim: bg-trim@28 { - reg = <0x28 0x4>; - bits = <16 8>; - }; -}; -# 5 "sun20i-d1.dtsi" 2 -# 1 "sunxi-d1-t113.dtsi" 1 - - - -/ { - soc { - dsp_wdt: watchdog@1700400 { - compatible = "allwinner,sun20i-d1-wdt"; - reg = <0x1700400 0x20>; - interrupts = <(122 + 16) 4>; - clocks = <&dcxo>, <&rtc 0>; - clock-names = "hosc", "losc"; - status = "reserved"; - }; - - hdmi: hdmi@5500000 { - compatible = "allwinner,sun20i-d1-dw-hdmi"; - reg = <0x5500000 0x10000>; - reg-io-width = <1>; - interrupts = <(93 + 16) 4>; - clocks = <&ccu 109>, - <&ccu 106>, - <&ccu 108>; - clock-names = "iahb", "isfr", "cec"; - resets = <&ccu 49>; - reset-names = "ctrl"; - phys = <&hdmi_phy>; - phy-names = "phy"; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - hdmi_in_tcon_top: endpoint { - remote-endpoint = <&tcon_top_hdmi_out_hdmi>; - }; - }; - - hdmi_out: port@1 { - reg = <1>; - }; - }; - }; - - hdmi_phy: phy@5510000 { - compatible = "allwinner,sun20i-d1-hdmi-phy"; - reg = <0x5510000 0x10000>; - clocks = <&ccu 109>, <&ccu 106>; - clock-names = "bus", "mod"; - resets = <&ccu 50>; - reset-names = "phy"; - status = "disabled"; - #phy-cells = <0>; - }; - }; -}; - -&tcon_top_hdmi_out { - tcon_top_hdmi_out_hdmi: endpoint { - remote-endpoint = <&hdmi_in_tcon_top>; - }; -}; -# 6 "sun20i-d1.dtsi" 2 - -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/thermal/thermal.h" 1 -# 8 "sun20i-d1.dtsi" 2 - -/ { - thermal-zones { - cpu-thermal { - polling-delay = <0>; - polling-delay-passive = <0>; - thermal-sensors = <&ths>; - - trips { - cpu_target: cpu-target { - hysteresis = <3000>; - temperature = <85000>; - type = "passive"; - }; - - cpu-crit { - hysteresis = <0>; - temperature = <110000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu_target>; - cooling-device = <&cpu0 (~0) (~0)>; - }; - }; - }; - }; - - soc { - ledc: led-controller@2008000 { - compatible = "allwinner,sun20i-d1-ledc", - "allwinner,sun50i-a100-ledc"; - reg = <0x2008000 0x400>; - interrupts = <(20 + 16) 4>; - clocks = <&ccu 123>, <&ccu 122>; - clock-names = "bus", "mod"; - resets = <&ccu 59>; - dmas = <&dma 42>; - dma-names = "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - ths: temperature-sensor@2009400 { - compatible = "allwinner,sun20i-d1-ths"; - reg = <0x2009400 0x400>; - interrupts = <74 4>; - clocks = <&ccu 81>, <&dcxo>; - clock-names = "bus", "mod"; - resets = <&ccu 33>; - nvmem-cells = <&ths_calib>; - nvmem-cell-names = "calibration"; - #thermal-sensor-cells = <0>; - vref-supply = <®_aldo>; - }; - - lradc: keys@2009800 { - compatible = "allwinner,sun20i-d1-lradc", - "allwinner,sun50i-r329-lradc"; - reg = <0x2009800 0x400>; - interrupts = <(61 + 16) 4>; - clocks = <&ccu 104>; - resets = <&ccu 47>; - vref-supply = <®_aldo>; - status = "disabled"; - }; - - codec: audio-codec@2030000 { - compatible = "allwinner,sun20i-d1-codec", "simple-mfd", "syscon"; - reg = <0x2030000 0x1000>; - interrupts = <(25 + 16) 4>; - clocks = <&ccu 96>, - <&ccu 95>, - <&ccu 94>, - <&dcxo>, - <&rtc 0>; - clock-names = "bus", "adc", "dac", "hosc", "losc"; - resets = <&ccu 39>; - dmas = <&dma 7>, <&dma 7>; - dma-names = "rx", "tx"; - avcc-supply = <®_aldo>; - hpvcc-supply = <®_hpldo>; - #address-cells = <1>; - #size-cells = <1>; - #sound-dai-cells = <0>; - - regulators@2030348 { - compatible = "allwinner,sun20i-d1-analog-ldos"; - reg = <0x2030348 0x4>; - nvmem-cells = <&bg_trim>; - nvmem-cell-names = "bg_trim"; - - reg_aldo: aldo { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - vdd33-supply = <®_vcc_3v3>; - }; - - reg_hpldo: hpldo { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - hpldoin-supply = <®_vcc_3v3>; - }; - }; - }; - - i2s0: i2s@2032000 { - compatible = "allwinner,sun20i-d1-i2s", - "allwinner,sun50i-r329-i2s"; - reg = <0x2032000 0x1000>; - interrupts = <(26 + 16) 4>; - clocks = <&ccu 86>, - <&ccu 82>; - clock-names = "apb", "mod"; - resets = <&ccu 34>; - dmas = <&dma 3>, <&dma 3>; - dma-names = "rx", "tx"; - status = "disabled"; - #sound-dai-cells = <0>; - }; - }; -}; - -&hdmi { - hvcc-supply = <®_ldoa>; -}; - -&pio { - /omit-if-no-ref/ - dmic_pb11_d0_pin: dmic-pb11-d0-pin { - pins = "PB11"; - function = "dmic"; - }; - - /omit-if-no-ref/ - dmic_pe17_clk_pin: dmic-pe17-clk-pin { - pins = "PE17"; - function = "dmic"; - }; - - /omit-if-no-ref/ - i2c0_pb10_pins: i2c0-pb10-pins { - pins = "PB10", "PB11"; - function = "i2c0"; - }; - - /omit-if-no-ref/ - i2c2_pb0_pins: i2c2-pb0-pins { - pins = "PB0", "PB1"; - function = "i2c2"; - }; - - /omit-if-no-ref/ - ledc_pc0_pin: ledc-pc0-pin { - pins = "PC0"; - function = "ledc"; - }; - - /omit-if-no-ref/ - uart0_pb8_pins: uart0-pb8-pins { - pins = "PB8", "PB9"; - function = "uart0"; - }; -}; - -&syscon { - regulators@3000150 { - compatible = "allwinner,sun20i-d1-system-ldos"; - reg = <0x3000150 0x4>; - - reg_ldoa: ldoa { - regulator-always-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - ldo-in-supply = <®_vcc_3v3>; - }; - - reg_ldob: ldob { - }; - }; -}; diff --git a/device-tree/6.8.0-41-generic/sun20i-d1s.dtsi b/device-tree/6.8.0-41-generic/sun20i-d1s.dtsi deleted file mode 100644 index 17d1c07..0000000 --- a/device-tree/6.8.0-41-generic/sun20i-d1s.dtsi +++ /dev/null @@ -1,1119 +0,0 @@ -# 0 "sun20i-d1s.dtsi" -# 0 "" -# 0 "" -# 1 "sun20i-d1s.dtsi" - - - - - -# 1 "sunxi-d1s-t113.dtsi" 1 - - - -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun6i-rtc.h" 1 -# 5 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun8i-de2.h" 1 -# 6 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun8i-tcon-top.h" 1 -# 7 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun20i-d1-ccu.h" 1 -# 8 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun20i-d1-r-ccu.h" 1 -# 9 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/interrupt-controller/irq.h" 1 -# 10 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/reset/sun8i-de2.h" 1 -# 11 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/reset/sun20i-d1-ccu.h" 1 -# 12 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/reset/sun20i-d1-r-ccu.h" 1 -# 13 "sunxi-d1s-t113.dtsi" 2 - -/ { - #address-cells = <1>; - #size-cells = <1>; - - dcxo: dcxo-clk { - compatible = "fixed-clock"; - clock-output-names = "dcxo"; - #clock-cells = <0>; - }; - - de: display-engine { - compatible = "allwinner,sun20i-d1-display-engine"; - allwinner,pipelines = <&mixer0>, <&mixer1>; - status = "disabled"; - }; - - soc { - compatible = "simple-bus"; - ranges; - dma-noncoherent; - #address-cells = <1>; - #size-cells = <1>; - - pio: pinctrl@2000000 { - compatible = "allwinner,sun20i-d1-pinctrl"; - reg = <0x2000000 0x800>; - interrupts = <(69 + 16) 4>, - <(71 + 16) 4>, - <(73 + 16) 4>, - <(75 + 16) 4>, - <(77 + 16) 4>, - <(79 + 16) 4>; - clocks = <&ccu 24>, - <&dcxo>, - <&rtc 0>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - interrupt-controller; - #gpio-cells = <3>; - #interrupt-cells = <3>; - - /omit-if-no-ref/ - can0_pins: can0-pins { - pins = "PB2", "PB3"; - function = "can0"; - }; - - /omit-if-no-ref/ - can1_pins: can1-pins { - pins = "PB4", "PB5"; - function = "can1"; - }; - - /omit-if-no-ref/ - clk_pg11_pin: clk-pg11-pin { - pins = "PG11"; - function = "clk"; - }; - - /omit-if-no-ref/ - dsi_4lane_pins: dsi-4lane-pins { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", - "PD6", "PD7", "PD8", "PD9"; - drive-strength = <30>; - function = "dsi"; - }; - - /omit-if-no-ref/ - lcd_rgb666_pins: lcd-rgb666-pins { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", - "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", - "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", - "PD18", "PD19", "PD20", "PD21"; - function = "lcd0"; - }; - - /omit-if-no-ref/ - mmc0_pins: mmc0-pins { - pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; - function = "mmc0"; - }; - - /omit-if-no-ref/ - mmc1_pins: mmc1-pins { - pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; - function = "mmc1"; - }; - - /omit-if-no-ref/ - mmc2_pins: mmc2-pins { - pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; - function = "mmc2"; - }; - - /omit-if-no-ref/ - pwm0_pd16_pin: pwm0-pd16-pin { - pins = "PD16"; - function = "pwm0"; - }; - - /omit-if-no-ref/ - pwm2_pd18_pin: pwm2-pd18-pin { - pins = "PD18"; - function = "pwm2"; - }; - - /omit-if-no-ref/ - pwm4_pd20_pin: pwm4-pd20-pin { - pins = "PD20"; - function = "pwm4"; - }; - - /omit-if-no-ref/ - pwm7_pd22_pin: pwm7-pd22-pin { - pins = "PD22"; - function = "pwm7"; - }; - - /omit-if-no-ref/ - rgmii_pe_pins: rgmii-pe-pins { - pins = "PE0", "PE1", "PE2", "PE3", "PE4", - "PE5", "PE6", "PE7", "PE8", "PE9", - "PE11", "PE12", "PE13", "PE14", "PE15"; - function = "emac"; - }; - - /omit-if-no-ref/ - rmii_pe_pins: rmii-pe-pins { - pins = "PE0", "PE1", "PE2", "PE3", "PE4", - "PE5", "PE6", "PE7", "PE8", "PE9"; - function = "emac"; - }; - - /omit-if-no-ref/ - spi0_pins: spi0-pins { - pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; - function = "spi0"; - }; - - /omit-if-no-ref/ - spi1_pb_pins: spi1-pb-pins { - pins = "PB0", "PB8", "PB9", "PB10", "PB11", "PB12"; - function = "spi1"; - }; - - /omit-if-no-ref/ - spi1_pd_pins: spi1-pd-pins { - pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15"; - function = "spi1"; - }; - - /omit-if-no-ref/ - uart1_pg6_pins: uart1-pg6-pins { - pins = "PG6", "PG7"; - function = "uart1"; - }; - - /omit-if-no-ref/ - uart1_pg8_rts_cts_pins: uart1-pg8-rts-cts-pins { - pins = "PG8", "PG9"; - function = "uart1"; - }; - - /omit-if-no-ref/ - uart3_pb_pins: uart3-pb-pins { - pins = "PB6", "PB7"; - function = "uart3"; - }; - }; - - pwm: pwm@2000c00 { - compatible = "allwinner,sun20i-d1-pwm"; - reg = <0x02000c00 0x400>; - clocks = <&ccu 45>, - <&dcxo>, - <&ccu 24>; - clock-names = "bus", "hosc", "apb0"; - resets = <&ccu 13>; - status = "disabled"; - #pwm-cells = <0x3>; - }; - - ccu: clock-controller@2001000 { - compatible = "allwinner,sun20i-d1-ccu"; - reg = <0x2001000 0x1000>; - clocks = <&dcxo>, - <&rtc 0>, - <&rtc 2>; - clock-names = "hosc", "losc", "iosc"; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - gpadc: adc@2009000 { - compatible = "allwinner,sun20i-d1-gpadc"; - reg = <0x2009000 0x400>; - clocks = <&ccu 80>; - resets = <&ccu 32>; - interrupts = <(57 + 16) 4>; - status = "disabled"; - #io-channel-cells = <1>; - }; - - dmic: dmic@2031000 { - compatible = "allwinner,sun20i-d1-dmic", - "allwinner,sun50i-h6-dmic"; - reg = <0x2031000 0x400>; - interrupts = <(24 + 16) 4>; - clocks = <&ccu 93>, - <&ccu 92>; - clock-names = "bus", "mod"; - resets = <&ccu 38>; - dmas = <&dma 8>; - dma-names = "rx"; - status = "disabled"; - #sound-dai-cells = <0>; - }; - - i2s1: i2s@2033000 { - compatible = "allwinner,sun20i-d1-i2s", - "allwinner,sun50i-r329-i2s"; - reg = <0x2033000 0x1000>; - interrupts = <(27 + 16) 4>; - clocks = <&ccu 87>, - <&ccu 83>; - clock-names = "apb", "mod"; - resets = <&ccu 35>; - dmas = <&dma 4>, <&dma 4>; - dma-names = "rx", "tx"; - status = "disabled"; - #sound-dai-cells = <0>; - }; - - i2s2: i2s@2034000 { - compatible = "allwinner,sun20i-d1-i2s", - "allwinner,sun50i-r329-i2s"; - reg = <0x2034000 0x1000>; - interrupts = <(28 + 16) 4>; - clocks = <&ccu 88>, - <&ccu 84>; - clock-names = "apb", "mod"; - resets = <&ccu 36>; - dmas = <&dma 5>, <&dma 5>; - dma-names = "rx", "tx"; - status = "disabled"; - #sound-dai-cells = <0>; - }; - - timer: timer@2050000 { - compatible = "allwinner,sun20i-d1-timer", - "allwinner,sun8i-a23-timer"; - reg = <0x2050000 0xa0>; - interrupts = <(59 + 16) 4>, - <(60 + 16) 4>; - clocks = <&dcxo>; - }; - - wdt: watchdog@20500a0 { - compatible = "allwinner,sun20i-d1-wdt-reset", - "allwinner,sun20i-d1-wdt"; - reg = <0x20500a0 0x20>; - interrupts = <(63 + 16) 4>; - clocks = <&dcxo>, <&rtc 0>; - clock-names = "hosc", "losc"; - status = "reserved"; - }; - - uart0: serial@2500000 { - compatible = "snps,dw-apb-uart"; - reg = <0x2500000 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(2 + 16) 4>; - clocks = <&ccu 62>; - resets = <&ccu 18>; - dmas = <&dma 14>, <&dma 14>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart1: serial@2500400 { - compatible = "snps,dw-apb-uart"; - reg = <0x2500400 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(3 + 16) 4>; - clocks = <&ccu 63>; - resets = <&ccu 19>; - dmas = <&dma 15>, <&dma 15>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart2: serial@2500800 { - compatible = "snps,dw-apb-uart"; - reg = <0x2500800 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(4 + 16) 4>; - clocks = <&ccu 64>; - resets = <&ccu 20>; - dmas = <&dma 16>, <&dma 16>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart3: serial@2500c00 { - compatible = "snps,dw-apb-uart"; - reg = <0x2500c00 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(5 + 16) 4>; - clocks = <&ccu 65>; - resets = <&ccu 21>; - dmas = <&dma 17>, <&dma 17>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart4: serial@2501000 { - compatible = "snps,dw-apb-uart"; - reg = <0x2501000 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(6 + 16) 4>; - clocks = <&ccu 66>; - resets = <&ccu 22>; - dmas = <&dma 18>, <&dma 18>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart5: serial@2501400 { - compatible = "snps,dw-apb-uart"; - reg = <0x2501400 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = <(7 + 16) 4>; - clocks = <&ccu 67>; - resets = <&ccu 23>; - dmas = <&dma 19>, <&dma 19>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - i2c0: i2c@2502000 { - compatible = "allwinner,sun20i-d1-i2c", - "allwinner,sun8i-v536-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x2502000 0x400>; - interrupts = <(9 + 16) 4>; - clocks = <&ccu 68>; - resets = <&ccu 24>; - dmas = <&dma 43>, <&dma 43>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c1: i2c@2502400 { - compatible = "allwinner,sun20i-d1-i2c", - "allwinner,sun8i-v536-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x2502400 0x400>; - interrupts = <(10 + 16) 4>; - clocks = <&ccu 69>; - resets = <&ccu 25>; - dmas = <&dma 44>, <&dma 44>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c2: i2c@2502800 { - compatible = "allwinner,sun20i-d1-i2c", - "allwinner,sun8i-v536-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x2502800 0x400>; - interrupts = <(11 + 16) 4>; - clocks = <&ccu 70>; - resets = <&ccu 26>; - dmas = <&dma 45>, <&dma 45>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c3: i2c@2502c00 { - compatible = "allwinner,sun20i-d1-i2c", - "allwinner,sun8i-v536-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x2502c00 0x400>; - interrupts = <(12 + 16) 4>; - clocks = <&ccu 71>; - resets = <&ccu 27>; - dmas = <&dma 46>, <&dma 46>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - can0: can@2504000 { - compatible = "allwinner,sun20i-d1-can"; - reg = <0x02504000 0x400>; - interrupts = <(21 + 16) 4>; - clocks = <&ccu 145>; - resets = <&ccu 66>; - pinctrl-names = "default"; - pinctrl-0 = <&can0_pins>; - status = "disabled"; - }; - - can1: can@2504400 { - compatible = "allwinner,sun20i-d1-can"; - reg = <0x02504400 0x400>; - interrupts = <(22 + 16) 4>; - clocks = <&ccu 146>; - resets = <&ccu 67>; - pinctrl-names = "default"; - pinctrl-0 = <&can1_pins>; - status = "disabled"; - }; - - syscon: syscon@3000000 { - compatible = "allwinner,sun20i-d1-system-control"; - reg = <0x3000000 0x1000>; - ranges; - #address-cells = <1>; - #size-cells = <1>; - }; - - dma: dma-controller@3002000 { - compatible = "allwinner,sun20i-d1-dma"; - reg = <0x3002000 0x1000>; - interrupts = <(50 + 16) 4>; - clocks = <&ccu 37>, <&ccu 48>; - clock-names = "bus", "mbus"; - resets = <&ccu 6>; - dma-channels = <16>; - dma-requests = <48>; - #dma-cells = <1>; - }; - - sid: efuse@3006000 { - compatible = "allwinner,sun20i-d1-sid"; - reg = <0x3006000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - }; - - crypto: crypto@3040000 { - compatible = "allwinner,sun20i-d1-crypto"; - reg = <0x3040000 0x800>; - interrupts = <(52 + 16) 4>; - clocks = <&ccu 34>, - <&ccu 33>, - <&ccu 50>, - <&rtc 2>; - clock-names = "bus", "mod", "ram", "trng"; - resets = <&ccu 4>; - }; - - mbus: dram-controller@3102000 { - compatible = "allwinner,sun20i-d1-mbus"; - reg = <0x3102000 0x1000>, - <0x3103000 0x1000>; - reg-names = "mbus", "dram"; - interrupts = <(43 + 16) 4>; - clocks = <&ccu 26>, - <&ccu 47>, - <&ccu 55>; - clock-names = "mbus", "dram", "bus"; - dma-ranges = <0 0x40000000 0x80000000>; - #address-cells = <1>; - #size-cells = <1>; - #interconnect-cells = <1>; - }; - - mmc0: mmc@4020000 { - compatible = "allwinner,sun20i-d1-mmc"; - reg = <0x4020000 0x1000>; - interrupts = <(40 + 16) 4>; - clocks = <&ccu 59>, <&ccu 56>; - clock-names = "ahb", "mmc"; - resets = <&ccu 15>; - reset-names = "ahb"; - cap-sd-highspeed; - max-frequency = <150000000>; - no-mmc; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc1: mmc@4021000 { - compatible = "allwinner,sun20i-d1-mmc"; - reg = <0x4021000 0x1000>; - interrupts = <(41 + 16) 4>; - clocks = <&ccu 60>, <&ccu 57>; - clock-names = "ahb", "mmc"; - resets = <&ccu 16>; - reset-names = "ahb"; - cap-sd-highspeed; - max-frequency = <150000000>; - no-mmc; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc2: mmc@4022000 { - compatible = "allwinner,sun20i-d1-emmc", - "allwinner,sun50i-a100-emmc"; - reg = <0x4022000 0x1000>; - interrupts = <(42 + 16) 4>; - clocks = <&ccu 61>, <&ccu 58>; - clock-names = "ahb", "mmc"; - resets = <&ccu 17>; - reset-names = "ahb"; - cap-mmc-highspeed; - max-frequency = <150000000>; - mmc-ddr-1_8v; - mmc-ddr-3_3v; - no-sd; - no-sdio; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi0: spi@4025000 { - compatible = "allwinner,sun20i-d1-spi", - "allwinner,sun50i-r329-spi"; - reg = <0x04025000 0x1000>; - interrupts = <(15 + 16) 4>; - clocks = <&ccu 74>, <&ccu 72>; - clock-names = "ahb", "mod"; - dmas = <&dma 22>, <&dma 22>; - dma-names = "rx", "tx"; - resets = <&ccu 28>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi1: spi@4026000 { - compatible = "allwinner,sun20i-d1-spi-dbi", - "allwinner,sun50i-r329-spi-dbi", - "allwinner,sun50i-r329-spi"; - reg = <0x04026000 0x1000>; - interrupts = <(16 + 16) 4>; - clocks = <&ccu 75>, <&ccu 73>; - clock-names = "ahb", "mod"; - dmas = <&dma 23>, <&dma 23>; - dma-names = "rx", "tx"; - resets = <&ccu 29>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - usb_otg: usb@4100000 { - compatible = "allwinner,sun20i-d1-musb", - "allwinner,sun8i-a33-musb"; - reg = <0x4100000 0x400>; - interrupts = <(29 + 16) 4>; - interrupt-names = "mc"; - clocks = <&ccu 103>; - resets = <&ccu 46>; - extcon = <&usbphy 0>; - phys = <&usbphy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - usbphy: phy@4100400 { - compatible = "allwinner,sun20i-d1-usb-phy"; - reg = <0x4100400 0x100>, - <0x4101800 0x100>, - <0x4200800 0x100>; - reg-names = "phy_ctrl", - "pmu0", - "pmu1"; - clocks = <&dcxo>, - <&dcxo>; - clock-names = "usb0_phy", - "usb1_phy"; - resets = <&ccu 40>, - <&ccu 41>; - reset-names = "usb0_reset", - "usb1_reset"; - status = "disabled"; - #phy-cells = <1>; - }; - - ehci0: usb@4101000 { - compatible = "allwinner,sun20i-d1-ehci", - "generic-ehci"; - reg = <0x4101000 0x100>; - interrupts = <(30 + 16) 4>; - clocks = <&ccu 99>, - <&ccu 101>, - <&ccu 97>; - resets = <&ccu 42>, - <&ccu 44>; - phys = <&usbphy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci0: usb@4101400 { - compatible = "allwinner,sun20i-d1-ohci", - "generic-ohci"; - reg = <0x4101400 0x100>; - interrupts = <(31 + 16) 4>; - clocks = <&ccu 99>, - <&ccu 97>; - resets = <&ccu 42>; - phys = <&usbphy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - ehci1: usb@4200000 { - compatible = "allwinner,sun20i-d1-ehci", - "generic-ehci"; - reg = <0x4200000 0x100>; - interrupts = <(33 + 16) 4>; - clocks = <&ccu 100>, - <&ccu 102>, - <&ccu 98>; - resets = <&ccu 43>, - <&ccu 45>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci1: usb@4200400 { - compatible = "allwinner,sun20i-d1-ohci", - "generic-ohci"; - reg = <0x4200400 0x100>; - interrupts = <(34 + 16) 4>; - clocks = <&ccu 100>, - <&ccu 98>; - resets = <&ccu 43>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; - }; - - emac: ethernet@4500000 { - compatible = "allwinner,sun20i-d1-emac", - "allwinner,sun50i-a64-emac"; - reg = <0x4500000 0x10000>; - interrupts = <(46 + 16) 4>; - interrupt-names = "macirq"; - clocks = <&ccu 77>; - clock-names = "stmmaceth"; - resets = <&ccu 30>; - reset-names = "stmmaceth"; - syscon = <&syscon>; - status = "disabled"; - - mdio: mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - display_clocks: clock-controller@5000000 { - compatible = "allwinner,sun20i-d1-de2-clk", - "allwinner,sun50i-h5-de2-clk"; - reg = <0x5000000 0x10000>; - clocks = <&ccu 28>, <&ccu 27>; - clock-names = "bus", "mod"; - resets = <&ccu 1>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - mixer0: mixer@5100000 { - compatible = "allwinner,sun20i-d1-de2-mixer-0"; - reg = <0x5100000 0x100000>; - clocks = <&display_clocks 0>, - <&display_clocks 6>; - clock-names = "bus", "mod"; - resets = <&display_clocks 0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - mixer0_out: port@1 { - reg = <1>; - - mixer0_out_tcon_top_mixer0: endpoint { - remote-endpoint = <&tcon_top_mixer0_in_mixer0>; - }; - }; - }; - }; - - mixer1: mixer@5200000 { - compatible = "allwinner,sun20i-d1-de2-mixer-1"; - reg = <0x5200000 0x100000>; - clocks = <&display_clocks 1>, - <&display_clocks 7>; - clock-names = "bus", "mod"; - resets = <&display_clocks 1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - mixer1_out: port@1 { - reg = <1>; - - mixer1_out_tcon_top_mixer1: endpoint { - remote-endpoint = <&tcon_top_mixer1_in_mixer1>; - }; - }; - }; - }; - - dsi: dsi@5450000 { - compatible = "allwinner,sun20i-d1-mipi-dsi", - "allwinner,sun50i-a100-mipi-dsi"; - reg = <0x5450000 0x1000>; - interrupts = <(92 + 16) 4>; - clocks = <&ccu 111>, - <&tcon_top 2>; - clock-names = "bus", "mod"; - resets = <&ccu 51>; - phys = <&dphy>; - phy-names = "dphy"; - status = "disabled"; - - port { - dsi_in_tcon_lcd0: endpoint { - remote-endpoint = <&tcon_lcd0_out_dsi>; - }; - }; - }; - - dphy: phy@5451000 { - compatible = "allwinner,sun20i-d1-mipi-dphy", - "allwinner,sun50i-a100-mipi-dphy"; - reg = <0x5451000 0x1000>; - interrupts = <(92 + 16) 4>; - clocks = <&ccu 111>, - <&ccu 110>; - clock-names = "bus", "mod"; - resets = <&ccu 51>; - #phy-cells = <0>; - }; - - tcon_top: tcon-top@5460000 { - compatible = "allwinner,sun20i-d1-tcon-top"; - reg = <0x5460000 0x1000>; - clocks = <&ccu 105>, - <&ccu 114>, - <&ccu 116>, - <&ccu 112>; - clock-names = "bus", "tcon-tv0", "tve0", "dsi"; - clock-output-names = "tcon-top-tv0", "tcon-top-dsi"; - resets = <&ccu 48>; - #clock-cells = <1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer0_in: port@0 { - reg = <0>; - - tcon_top_mixer0_in_mixer0: endpoint { - remote-endpoint = <&mixer0_out_tcon_top_mixer0>; - }; - }; - - tcon_top_mixer0_out: port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer0_out_tcon_lcd0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer0>; - }; - - tcon_top_mixer0_out_tcon_tv0: endpoint@2 { - reg = <2>; - remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>; - }; - }; - - tcon_top_mixer1_in: port@2 { - reg = <2>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer1_in_mixer1: endpoint@1 { - reg = <1>; - remote-endpoint = <&mixer1_out_tcon_top_mixer1>; - }; - }; - - tcon_top_mixer1_out: port@3 { - reg = <3>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer1_out_tcon_lcd0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer1>; - }; - - tcon_top_mixer1_out_tcon_tv0: endpoint@2 { - reg = <2>; - remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>; - }; - }; - - tcon_top_hdmi_in: port@4 { - reg = <4>; - - tcon_top_hdmi_in_tcon_tv0: endpoint { - remote-endpoint = <&tcon_tv0_out_tcon_top_hdmi>; - }; - }; - - tcon_top_hdmi_out: port@5 { - reg = <5>; - }; - }; - }; - - tcon_lcd0: lcd-controller@5461000 { - compatible = "allwinner,sun20i-d1-tcon-lcd"; - reg = <0x5461000 0x1000>; - interrupts = <(90 + 16) 4>; - clocks = <&ccu 113>, - <&ccu 112>; - clock-names = "ahb", "tcon-ch0"; - clock-output-names = "tcon-pixel-clock"; - resets = <&ccu 52>, - <&ccu 54>; - reset-names = "lcd", "lvds"; - phys = <&dphy>; - phy-names = "lvds0"; - #clock-cells = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon_lcd0_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_lcd0_in_tcon_top_mixer0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_top_mixer0_out_tcon_lcd0>; - }; - - tcon_lcd0_in_tcon_top_mixer1: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon_top_mixer1_out_tcon_lcd0>; - }; - }; - - tcon_lcd0_out: port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_lcd0_out_dsi: endpoint@1 { - reg = <1>; - remote-endpoint = <&dsi_in_tcon_lcd0>; - }; - }; - }; - }; - - tcon_tv0: lcd-controller@5470000 { - compatible = "allwinner,sun20i-d1-tcon-tv"; - reg = <0x5470000 0x1000>; - interrupts = <(91 + 16) 4>; - clocks = <&ccu 115>, - <&tcon_top 0>; - clock-names = "ahb", "tcon-ch1"; - resets = <&ccu 53>; - reset-names = "lcd"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon_tv0_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_tv0_in_tcon_top_mixer0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>; - }; - - tcon_tv0_in_tcon_top_mixer1: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>; - }; - }; - - tcon_tv0_out: port@1 { - reg = <1>; - - tcon_tv0_out_tcon_top_hdmi: endpoint { - remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>; - }; - }; - }; - }; - - ppu: power-controller@7001000 { - compatible = "allwinner,sun20i-d1-ppu"; - reg = <0x7001000 0x1000>; - clocks = <&r_ccu 4>; - resets = <&r_ccu 2>; - #power-domain-cells = <1>; - }; - - r_ccu: clock-controller@7010000 { - compatible = "allwinner,sun20i-d1-r-ccu"; - reg = <0x7010000 0x400>; - clocks = <&dcxo>, - <&rtc 0>, - <&rtc 2>, - <&ccu 6>; - clock-names = "hosc", "losc", "iosc", "pll-periph"; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - rtc: rtc@7090000 { - compatible = "allwinner,sun20i-d1-rtc", - "allwinner,sun50i-r329-rtc"; - reg = <0x7090000 0x400>; - interrupts = <(144 + 16) 4>; - clocks = <&r_ccu 7>, - <&dcxo>, - <&r_ccu 0>; - clock-names = "bus", "hosc", "ahb"; - #clock-cells = <1>; - }; - }; -}; -# 7 "sun20i-d1s.dtsi" 2 - -/ { - cpus { - timebase-frequency = <24000000>; - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - compatible = "thead,c906", "riscv"; - device_type = "cpu"; - reg = <0>; - clocks = <&ccu 132>; - d-cache-block-size = <64>; - d-cache-sets = <256>; - d-cache-size = <32768>; - i-cache-block-size = <64>; - i-cache-sets = <128>; - i-cache-size = <32768>; - mmu-type = "riscv,sv39"; - operating-points-v2 = <&opp_table_cpu>; - riscv,isa = "rv64imafdc"; - riscv,isa-base = "rv64i"; - riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", - "zifencei", "zihpm"; - #cooling-cells = <2>; - - cpu0_intc: interrupt-controller { - compatible = "riscv,cpu-intc"; - interrupt-controller; - #interrupt-cells = <1>; - }; - }; - }; - - opp_table_cpu: opp-table-cpu { - compatible = "operating-points-v2"; - - opp-408000000 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <900000 900000 1100000>; - }; - - opp-1080000000 { - opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <900000 900000 1100000>; - }; - }; - - soc { - interrupt-parent = <&plic>; - - riscv_wdt: watchdog@6011000 { - compatible = "allwinner,sun20i-d1-wdt"; - reg = <0x6011000 0x20>; - interrupts = <(131 + 16) 4>; - clocks = <&dcxo>, <&rtc 0>; - clock-names = "hosc", "losc"; - }; - - plic: interrupt-controller@10000000 { - compatible = "allwinner,sun20i-d1-plic", - "thead,c900-plic"; - reg = <0x10000000 0x4000000>; - interrupts-extended = <&cpu0_intc 11>, - <&cpu0_intc 9>; - interrupt-controller; - riscv,ndev = <175>; - #address-cells = <0>; - #interrupt-cells = <2>; - }; - }; - - pmu { - compatible = "riscv,pmu"; - riscv,event-to-mhpmcounters = - <0x00003 0x00003 0x00000008>, - <0x00004 0x00004 0x00000010>, - <0x00005 0x00005 0x00000200>, - <0x00006 0x00006 0x00000100>, - <0x10000 0x10000 0x00004000>, - <0x10001 0x10001 0x00008000>, - <0x10002 0x10002 0x00010000>, - <0x10003 0x10003 0x00020000>, - <0x10019 0x10019 0x00000040>, - <0x10021 0x10021 0x00000020>; - riscv,event-to-mhpmevent = - <0x00003 0x00000000 0x00000001>, - <0x00004 0x00000000 0x00000002>, - <0x00005 0x00000000 0x00000007>, - <0x00006 0x00000000 0x00000006>, - <0x10000 0x00000000 0x0000000c>, - <0x10001 0x00000000 0x0000000d>, - <0x10002 0x00000000 0x0000000e>, - <0x10003 0x00000000 0x0000000f>, - <0x10019 0x00000000 0x00000004>, - <0x10021 0x00000000 0x00000003>; - riscv,raw-event-to-mhpmcounters = - <0x00000000 0x00000001 0xffffffff 0xffffffff 0x00000008>, - <0x00000000 0x00000002 0xffffffff 0xffffffff 0x00000010>, - <0x00000000 0x00000003 0xffffffff 0xffffffff 0x00000020>, - <0x00000000 0x00000004 0xffffffff 0xffffffff 0x00000040>, - <0x00000000 0x00000005 0xffffffff 0xffffffff 0x00000080>, - <0x00000000 0x00000006 0xffffffff 0xffffffff 0x00000100>, - <0x00000000 0x00000007 0xffffffff 0xffffffff 0x00000200>, - <0x00000000 0x0000000b 0xffffffff 0xffffffff 0x00002000>, - <0x00000000 0x0000000c 0xffffffff 0xffffffff 0x00004000>, - <0x00000000 0x0000000d 0xffffffff 0xffffffff 0x00008000>, - <0x00000000 0x0000000e 0xffffffff 0xffffffff 0x00010000>, - <0x00000000 0x0000000f 0xffffffff 0xffffffff 0x00020000>; - }; -}; - -&sid { - ths_calib: ths-calib@14 { - reg = <0x14 0x4>; - }; - - bg_trim: bg-trim@28 { - reg = <0x28 0x4>; - bits = <16 8>; - }; -}; diff --git a/device-tree/6.8.0-41-generic/sunxi-d1-t113.dtsi b/device-tree/6.8.0-41-generic/sunxi-d1-t113.dtsi deleted file mode 100644 index 2463986..0000000 --- a/device-tree/6.8.0-41-generic/sunxi-d1-t113.dtsi +++ /dev/null @@ -1,69 +0,0 @@ -# 0 "sunxi-d1-t113.dtsi" -# 0 "" -# 0 "" -# 1 "sunxi-d1-t113.dtsi" - - - -/ { - soc { - dsp_wdt: watchdog@1700400 { - compatible = "allwinner,sun20i-d1-wdt"; - reg = <0x1700400 0x20>; - interrupts = ; - clocks = <&dcxo>, <&rtc CLK_OSC32K>; - clock-names = "hosc", "losc"; - status = "reserved"; - }; - - hdmi: hdmi@5500000 { - compatible = "allwinner,sun20i-d1-dw-hdmi"; - reg = <0x5500000 0x10000>; - reg-io-width = <1>; - interrupts = ; - clocks = <&ccu CLK_BUS_HDMI>, - <&ccu CLK_HDMI_24M>, - <&ccu CLK_HDMI_CEC>; - clock-names = "iahb", "isfr", "cec"; - resets = <&ccu RST_BUS_HDMI_SUB>; - reset-names = "ctrl"; - phys = <&hdmi_phy>; - phy-names = "phy"; - status = "disabled"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - - hdmi_in_tcon_top: endpoint { - remote-endpoint = <&tcon_top_hdmi_out_hdmi>; - }; - }; - - hdmi_out: port@1 { - reg = <1>; - }; - }; - }; - - hdmi_phy: phy@5510000 { - compatible = "allwinner,sun20i-d1-hdmi-phy"; - reg = <0x5510000 0x10000>; - clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_24M>; - clock-names = "bus", "mod"; - resets = <&ccu RST_BUS_HDMI_MAIN>; - reset-names = "phy"; - status = "disabled"; - #phy-cells = <0>; - }; - }; -}; - -&tcon_top_hdmi_out { - tcon_top_hdmi_out_hdmi: endpoint { - remote-endpoint = <&hdmi_in_tcon_top>; - }; -}; diff --git a/device-tree/6.8.0-41-generic/sunxi-d1s-t113.dtsi b/device-tree/6.8.0-41-generic/sunxi-d1s-t113.dtsi deleted file mode 100644 index 22cae8c..0000000 --- a/device-tree/6.8.0-41-generic/sunxi-d1s-t113.dtsi +++ /dev/null @@ -1,990 +0,0 @@ -# 0 "sunxi-d1s-t113.dtsi" -# 0 "" -# 0 "" -# 1 "sunxi-d1s-t113.dtsi" - - - -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun6i-rtc.h" 1 -# 5 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun8i-de2.h" 1 -# 6 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun8i-tcon-top.h" 1 -# 7 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun20i-d1-ccu.h" 1 -# 8 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/clock/sun20i-d1-r-ccu.h" 1 -# 9 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/interrupt-controller/irq.h" 1 -# 10 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/reset/sun8i-de2.h" 1 -# 11 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/reset/sun20i-d1-ccu.h" 1 -# 12 "sunxi-d1s-t113.dtsi" 2 -# 1 "/usr/src/linux-headers-6.8.0-41-generic/include/dt-bindings/reset/sun20i-d1-r-ccu.h" 1 -# 13 "sunxi-d1s-t113.dtsi" 2 - -/ { - #address-cells = <1>; - #size-cells = <1>; - - dcxo: dcxo-clk { - compatible = "fixed-clock"; - clock-output-names = "dcxo"; - #clock-cells = <0>; - }; - - de: display-engine { - compatible = "allwinner,sun20i-d1-display-engine"; - allwinner,pipelines = <&mixer0>, <&mixer1>; - status = "disabled"; - }; - - soc { - compatible = "simple-bus"; - ranges; - dma-noncoherent; - #address-cells = <1>; - #size-cells = <1>; - - pio: pinctrl@2000000 { - compatible = "allwinner,sun20i-d1-pinctrl"; - reg = <0x2000000 0x800>; - interrupts = , - , - , - , - , - ; - clocks = <&ccu 24>, - <&dcxo>, - <&rtc 0>; - clock-names = "apb", "hosc", "losc"; - gpio-controller; - interrupt-controller; - #gpio-cells = <3>; - #interrupt-cells = <3>; - - /omit-if-no-ref/ - can0_pins: can0-pins { - pins = "PB2", "PB3"; - function = "can0"; - }; - - /omit-if-no-ref/ - can1_pins: can1-pins { - pins = "PB4", "PB5"; - function = "can1"; - }; - - /omit-if-no-ref/ - clk_pg11_pin: clk-pg11-pin { - pins = "PG11"; - function = "clk"; - }; - - /omit-if-no-ref/ - dsi_4lane_pins: dsi-4lane-pins { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", - "PD6", "PD7", "PD8", "PD9"; - drive-strength = <30>; - function = "dsi"; - }; - - /omit-if-no-ref/ - lcd_rgb666_pins: lcd-rgb666-pins { - pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", - "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", - "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", - "PD18", "PD19", "PD20", "PD21"; - function = "lcd0"; - }; - - /omit-if-no-ref/ - mmc0_pins: mmc0-pins { - pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; - function = "mmc0"; - }; - - /omit-if-no-ref/ - mmc1_pins: mmc1-pins { - pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; - function = "mmc1"; - }; - - /omit-if-no-ref/ - mmc2_pins: mmc2-pins { - pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; - function = "mmc2"; - }; - - /omit-if-no-ref/ - pwm0_pd16_pin: pwm0-pd16-pin { - pins = "PD16"; - function = "pwm0"; - }; - - /omit-if-no-ref/ - pwm2_pd18_pin: pwm2-pd18-pin { - pins = "PD18"; - function = "pwm2"; - }; - - /omit-if-no-ref/ - pwm4_pd20_pin: pwm4-pd20-pin { - pins = "PD20"; - function = "pwm4"; - }; - - /omit-if-no-ref/ - pwm7_pd22_pin: pwm7-pd22-pin { - pins = "PD22"; - function = "pwm7"; - }; - - /omit-if-no-ref/ - rgmii_pe_pins: rgmii-pe-pins { - pins = "PE0", "PE1", "PE2", "PE3", "PE4", - "PE5", "PE6", "PE7", "PE8", "PE9", - "PE11", "PE12", "PE13", "PE14", "PE15"; - function = "emac"; - }; - - /omit-if-no-ref/ - rmii_pe_pins: rmii-pe-pins { - pins = "PE0", "PE1", "PE2", "PE3", "PE4", - "PE5", "PE6", "PE7", "PE8", "PE9"; - function = "emac"; - }; - - /omit-if-no-ref/ - spi0_pins: spi0-pins { - pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; - function = "spi0"; - }; - - /omit-if-no-ref/ - spi1_pb_pins: spi1-pb-pins { - pins = "PB0", "PB8", "PB9", "PB10", "PB11", "PB12"; - function = "spi1"; - }; - - /omit-if-no-ref/ - spi1_pd_pins: spi1-pd-pins { - pins = "PD10", "PD11", "PD12", "PD13", "PD14", "PD15"; - function = "spi1"; - }; - - /omit-if-no-ref/ - uart1_pg6_pins: uart1-pg6-pins { - pins = "PG6", "PG7"; - function = "uart1"; - }; - - /omit-if-no-ref/ - uart1_pg8_rts_cts_pins: uart1-pg8-rts-cts-pins { - pins = "PG8", "PG9"; - function = "uart1"; - }; - - /omit-if-no-ref/ - uart3_pb_pins: uart3-pb-pins { - pins = "PB6", "PB7"; - function = "uart3"; - }; - }; - - pwm: pwm@2000c00 { - compatible = "allwinner,sun20i-d1-pwm"; - reg = <0x02000c00 0x400>; - clocks = <&ccu 45>, - <&dcxo>, - <&ccu 24>; - clock-names = "bus", "hosc", "apb0"; - resets = <&ccu 13>; - status = "disabled"; - #pwm-cells = <0x3>; - }; - - ccu: clock-controller@2001000 { - compatible = "allwinner,sun20i-d1-ccu"; - reg = <0x2001000 0x1000>; - clocks = <&dcxo>, - <&rtc 0>, - <&rtc 2>; - clock-names = "hosc", "losc", "iosc"; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - gpadc: adc@2009000 { - compatible = "allwinner,sun20i-d1-gpadc"; - reg = <0x2009000 0x400>; - clocks = <&ccu 80>; - resets = <&ccu 32>; - interrupts = ; - status = "disabled"; - #io-channel-cells = <1>; - }; - - dmic: dmic@2031000 { - compatible = "allwinner,sun20i-d1-dmic", - "allwinner,sun50i-h6-dmic"; - reg = <0x2031000 0x400>; - interrupts = ; - clocks = <&ccu 93>, - <&ccu 92>; - clock-names = "bus", "mod"; - resets = <&ccu 38>; - dmas = <&dma 8>; - dma-names = "rx"; - status = "disabled"; - #sound-dai-cells = <0>; - }; - - i2s1: i2s@2033000 { - compatible = "allwinner,sun20i-d1-i2s", - "allwinner,sun50i-r329-i2s"; - reg = <0x2033000 0x1000>; - interrupts = ; - clocks = <&ccu 87>, - <&ccu 83>; - clock-names = "apb", "mod"; - resets = <&ccu 35>; - dmas = <&dma 4>, <&dma 4>; - dma-names = "rx", "tx"; - status = "disabled"; - #sound-dai-cells = <0>; - }; - - i2s2: i2s@2034000 { - compatible = "allwinner,sun20i-d1-i2s", - "allwinner,sun50i-r329-i2s"; - reg = <0x2034000 0x1000>; - interrupts = ; - clocks = <&ccu 88>, - <&ccu 84>; - clock-names = "apb", "mod"; - resets = <&ccu 36>; - dmas = <&dma 5>, <&dma 5>; - dma-names = "rx", "tx"; - status = "disabled"; - #sound-dai-cells = <0>; - }; - - timer: timer@2050000 { - compatible = "allwinner,sun20i-d1-timer", - "allwinner,sun8i-a23-timer"; - reg = <0x2050000 0xa0>; - interrupts = , - ; - clocks = <&dcxo>; - }; - - wdt: watchdog@20500a0 { - compatible = "allwinner,sun20i-d1-wdt-reset", - "allwinner,sun20i-d1-wdt"; - reg = <0x20500a0 0x20>; - interrupts = ; - clocks = <&dcxo>, <&rtc 0>; - clock-names = "hosc", "losc"; - status = "reserved"; - }; - - uart0: serial@2500000 { - compatible = "snps,dw-apb-uart"; - reg = <0x2500000 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = ; - clocks = <&ccu 62>; - resets = <&ccu 18>; - dmas = <&dma 14>, <&dma 14>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart1: serial@2500400 { - compatible = "snps,dw-apb-uart"; - reg = <0x2500400 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = ; - clocks = <&ccu 63>; - resets = <&ccu 19>; - dmas = <&dma 15>, <&dma 15>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart2: serial@2500800 { - compatible = "snps,dw-apb-uart"; - reg = <0x2500800 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = ; - clocks = <&ccu 64>; - resets = <&ccu 20>; - dmas = <&dma 16>, <&dma 16>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart3: serial@2500c00 { - compatible = "snps,dw-apb-uart"; - reg = <0x2500c00 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = ; - clocks = <&ccu 65>; - resets = <&ccu 21>; - dmas = <&dma 17>, <&dma 17>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart4: serial@2501000 { - compatible = "snps,dw-apb-uart"; - reg = <0x2501000 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = ; - clocks = <&ccu 66>; - resets = <&ccu 22>; - dmas = <&dma 18>, <&dma 18>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - uart5: serial@2501400 { - compatible = "snps,dw-apb-uart"; - reg = <0x2501400 0x400>; - reg-io-width = <4>; - reg-shift = <2>; - interrupts = ; - clocks = <&ccu 67>; - resets = <&ccu 23>; - dmas = <&dma 19>, <&dma 19>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - i2c0: i2c@2502000 { - compatible = "allwinner,sun20i-d1-i2c", - "allwinner,sun8i-v536-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x2502000 0x400>; - interrupts = ; - clocks = <&ccu 68>; - resets = <&ccu 24>; - dmas = <&dma 43>, <&dma 43>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c1: i2c@2502400 { - compatible = "allwinner,sun20i-d1-i2c", - "allwinner,sun8i-v536-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x2502400 0x400>; - interrupts = ; - clocks = <&ccu 69>; - resets = <&ccu 25>; - dmas = <&dma 44>, <&dma 44>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c2: i2c@2502800 { - compatible = "allwinner,sun20i-d1-i2c", - "allwinner,sun8i-v536-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x2502800 0x400>; - interrupts = ; - clocks = <&ccu 70>; - resets = <&ccu 26>; - dmas = <&dma 45>, <&dma 45>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - i2c3: i2c@2502c00 { - compatible = "allwinner,sun20i-d1-i2c", - "allwinner,sun8i-v536-i2c", - "allwinner,sun6i-a31-i2c"; - reg = <0x2502c00 0x400>; - interrupts = ; - clocks = <&ccu 71>; - resets = <&ccu 27>; - dmas = <&dma 46>, <&dma 46>; - dma-names = "rx", "tx"; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - can0: can@2504000 { - compatible = "allwinner,sun20i-d1-can"; - reg = <0x02504000 0x400>; - interrupts = ; - clocks = <&ccu 145>; - resets = <&ccu 66>; - pinctrl-names = "default"; - pinctrl-0 = <&can0_pins>; - status = "disabled"; - }; - - can1: can@2504400 { - compatible = "allwinner,sun20i-d1-can"; - reg = <0x02504400 0x400>; - interrupts = ; - clocks = <&ccu 146>; - resets = <&ccu 67>; - pinctrl-names = "default"; - pinctrl-0 = <&can1_pins>; - status = "disabled"; - }; - - syscon: syscon@3000000 { - compatible = "allwinner,sun20i-d1-system-control"; - reg = <0x3000000 0x1000>; - ranges; - #address-cells = <1>; - #size-cells = <1>; - }; - - dma: dma-controller@3002000 { - compatible = "allwinner,sun20i-d1-dma"; - reg = <0x3002000 0x1000>; - interrupts = ; - clocks = <&ccu 37>, <&ccu 48>; - clock-names = "bus", "mbus"; - resets = <&ccu 6>; - dma-channels = <16>; - dma-requests = <48>; - #dma-cells = <1>; - }; - - sid: efuse@3006000 { - compatible = "allwinner,sun20i-d1-sid"; - reg = <0x3006000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - }; - - crypto: crypto@3040000 { - compatible = "allwinner,sun20i-d1-crypto"; - reg = <0x3040000 0x800>; - interrupts = ; - clocks = <&ccu 34>, - <&ccu 33>, - <&ccu 50>, - <&rtc 2>; - clock-names = "bus", "mod", "ram", "trng"; - resets = <&ccu 4>; - }; - - mbus: dram-controller@3102000 { - compatible = "allwinner,sun20i-d1-mbus"; - reg = <0x3102000 0x1000>, - <0x3103000 0x1000>; - reg-names = "mbus", "dram"; - interrupts = ; - clocks = <&ccu 26>, - <&ccu 47>, - <&ccu 55>; - clock-names = "mbus", "dram", "bus"; - dma-ranges = <0 0x40000000 0x80000000>; - #address-cells = <1>; - #size-cells = <1>; - #interconnect-cells = <1>; - }; - - mmc0: mmc@4020000 { - compatible = "allwinner,sun20i-d1-mmc"; - reg = <0x4020000 0x1000>; - interrupts = ; - clocks = <&ccu 59>, <&ccu 56>; - clock-names = "ahb", "mmc"; - resets = <&ccu 15>; - reset-names = "ahb"; - cap-sd-highspeed; - max-frequency = <150000000>; - no-mmc; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc1: mmc@4021000 { - compatible = "allwinner,sun20i-d1-mmc"; - reg = <0x4021000 0x1000>; - interrupts = ; - clocks = <&ccu 60>, <&ccu 57>; - clock-names = "ahb", "mmc"; - resets = <&ccu 16>; - reset-names = "ahb"; - cap-sd-highspeed; - max-frequency = <150000000>; - no-mmc; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - mmc2: mmc@4022000 { - compatible = "allwinner,sun20i-d1-emmc", - "allwinner,sun50i-a100-emmc"; - reg = <0x4022000 0x1000>; - interrupts = ; - clocks = <&ccu 61>, <&ccu 58>; - clock-names = "ahb", "mmc"; - resets = <&ccu 17>; - reset-names = "ahb"; - cap-mmc-highspeed; - max-frequency = <150000000>; - mmc-ddr-1_8v; - mmc-ddr-3_3v; - no-sd; - no-sdio; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi0: spi@4025000 { - compatible = "allwinner,sun20i-d1-spi", - "allwinner,sun50i-r329-spi"; - reg = <0x04025000 0x1000>; - interrupts = ; - clocks = <&ccu 74>, <&ccu 72>; - clock-names = "ahb", "mod"; - dmas = <&dma 22>, <&dma 22>; - dma-names = "rx", "tx"; - resets = <&ccu 28>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - spi1: spi@4026000 { - compatible = "allwinner,sun20i-d1-spi-dbi", - "allwinner,sun50i-r329-spi-dbi", - "allwinner,sun50i-r329-spi"; - reg = <0x04026000 0x1000>; - interrupts = ; - clocks = <&ccu 75>, <&ccu 73>; - clock-names = "ahb", "mod"; - dmas = <&dma 23>, <&dma 23>; - dma-names = "rx", "tx"; - resets = <&ccu 29>; - status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; - }; - - usb_otg: usb@4100000 { - compatible = "allwinner,sun20i-d1-musb", - "allwinner,sun8i-a33-musb"; - reg = <0x4100000 0x400>; - interrupts = ; - interrupt-names = "mc"; - clocks = <&ccu 103>; - resets = <&ccu 46>; - extcon = <&usbphy 0>; - phys = <&usbphy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - usbphy: phy@4100400 { - compatible = "allwinner,sun20i-d1-usb-phy"; - reg = <0x4100400 0x100>, - <0x4101800 0x100>, - <0x4200800 0x100>; - reg-names = "phy_ctrl", - "pmu0", - "pmu1"; - clocks = <&dcxo>, - <&dcxo>; - clock-names = "usb0_phy", - "usb1_phy"; - resets = <&ccu 40>, - <&ccu 41>; - reset-names = "usb0_reset", - "usb1_reset"; - status = "disabled"; - #phy-cells = <1>; - }; - - ehci0: usb@4101000 { - compatible = "allwinner,sun20i-d1-ehci", - "generic-ehci"; - reg = <0x4101000 0x100>; - interrupts = ; - clocks = <&ccu 99>, - <&ccu 101>, - <&ccu 97>; - resets = <&ccu 42>, - <&ccu 44>; - phys = <&usbphy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci0: usb@4101400 { - compatible = "allwinner,sun20i-d1-ohci", - "generic-ohci"; - reg = <0x4101400 0x100>; - interrupts = ; - clocks = <&ccu 99>, - <&ccu 97>; - resets = <&ccu 42>; - phys = <&usbphy 0>; - phy-names = "usb"; - status = "disabled"; - }; - - ehci1: usb@4200000 { - compatible = "allwinner,sun20i-d1-ehci", - "generic-ehci"; - reg = <0x4200000 0x100>; - interrupts = ; - clocks = <&ccu 100>, - <&ccu 102>, - <&ccu 98>; - resets = <&ccu 43>, - <&ccu 45>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; - }; - - ohci1: usb@4200400 { - compatible = "allwinner,sun20i-d1-ohci", - "generic-ohci"; - reg = <0x4200400 0x100>; - interrupts = ; - clocks = <&ccu 100>, - <&ccu 98>; - resets = <&ccu 43>; - phys = <&usbphy 1>; - phy-names = "usb"; - status = "disabled"; - }; - - emac: ethernet@4500000 { - compatible = "allwinner,sun20i-d1-emac", - "allwinner,sun50i-a64-emac"; - reg = <0x4500000 0x10000>; - interrupts = ; - interrupt-names = "macirq"; - clocks = <&ccu 77>; - clock-names = "stmmaceth"; - resets = <&ccu 30>; - reset-names = "stmmaceth"; - syscon = <&syscon>; - status = "disabled"; - - mdio: mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - }; - }; - - display_clocks: clock-controller@5000000 { - compatible = "allwinner,sun20i-d1-de2-clk", - "allwinner,sun50i-h5-de2-clk"; - reg = <0x5000000 0x10000>; - clocks = <&ccu 28>, <&ccu 27>; - clock-names = "bus", "mod"; - resets = <&ccu 1>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - mixer0: mixer@5100000 { - compatible = "allwinner,sun20i-d1-de2-mixer-0"; - reg = <0x5100000 0x100000>; - clocks = <&display_clocks 0>, - <&display_clocks 6>; - clock-names = "bus", "mod"; - resets = <&display_clocks 0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - mixer0_out: port@1 { - reg = <1>; - - mixer0_out_tcon_top_mixer0: endpoint { - remote-endpoint = <&tcon_top_mixer0_in_mixer0>; - }; - }; - }; - }; - - mixer1: mixer@5200000 { - compatible = "allwinner,sun20i-d1-de2-mixer-1"; - reg = <0x5200000 0x100000>; - clocks = <&display_clocks 1>, - <&display_clocks 7>; - clock-names = "bus", "mod"; - resets = <&display_clocks 1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - mixer1_out: port@1 { - reg = <1>; - - mixer1_out_tcon_top_mixer1: endpoint { - remote-endpoint = <&tcon_top_mixer1_in_mixer1>; - }; - }; - }; - }; - - dsi: dsi@5450000 { - compatible = "allwinner,sun20i-d1-mipi-dsi", - "allwinner,sun50i-a100-mipi-dsi"; - reg = <0x5450000 0x1000>; - interrupts = ; - clocks = <&ccu 111>, - <&tcon_top 2>; - clock-names = "bus", "mod"; - resets = <&ccu 51>; - phys = <&dphy>; - phy-names = "dphy"; - status = "disabled"; - - port { - dsi_in_tcon_lcd0: endpoint { - remote-endpoint = <&tcon_lcd0_out_dsi>; - }; - }; - }; - - dphy: phy@5451000 { - compatible = "allwinner,sun20i-d1-mipi-dphy", - "allwinner,sun50i-a100-mipi-dphy"; - reg = <0x5451000 0x1000>; - interrupts = ; - clocks = <&ccu 111>, - <&ccu 110>; - clock-names = "bus", "mod"; - resets = <&ccu 51>; - #phy-cells = <0>; - }; - - tcon_top: tcon-top@5460000 { - compatible = "allwinner,sun20i-d1-tcon-top"; - reg = <0x5460000 0x1000>; - clocks = <&ccu 105>, - <&ccu 114>, - <&ccu 116>, - <&ccu 112>; - clock-names = "bus", "tcon-tv0", "tve0", "dsi"; - clock-output-names = "tcon-top-tv0", "tcon-top-dsi"; - resets = <&ccu 48>; - #clock-cells = <1>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer0_in: port@0 { - reg = <0>; - - tcon_top_mixer0_in_mixer0: endpoint { - remote-endpoint = <&mixer0_out_tcon_top_mixer0>; - }; - }; - - tcon_top_mixer0_out: port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer0_out_tcon_lcd0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer0>; - }; - - tcon_top_mixer0_out_tcon_tv0: endpoint@2 { - reg = <2>; - remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>; - }; - }; - - tcon_top_mixer1_in: port@2 { - reg = <2>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer1_in_mixer1: endpoint@1 { - reg = <1>; - remote-endpoint = <&mixer1_out_tcon_top_mixer1>; - }; - }; - - tcon_top_mixer1_out: port@3 { - reg = <3>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_top_mixer1_out_tcon_lcd0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer1>; - }; - - tcon_top_mixer1_out_tcon_tv0: endpoint@2 { - reg = <2>; - remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>; - }; - }; - - tcon_top_hdmi_in: port@4 { - reg = <4>; - - tcon_top_hdmi_in_tcon_tv0: endpoint { - remote-endpoint = <&tcon_tv0_out_tcon_top_hdmi>; - }; - }; - - tcon_top_hdmi_out: port@5 { - reg = <5>; - }; - }; - }; - - tcon_lcd0: lcd-controller@5461000 { - compatible = "allwinner,sun20i-d1-tcon-lcd"; - reg = <0x5461000 0x1000>; - interrupts = ; - clocks = <&ccu 113>, - <&ccu 112>; - clock-names = "ahb", "tcon-ch0"; - clock-output-names = "tcon-pixel-clock"; - resets = <&ccu 52>, - <&ccu 54>; - reset-names = "lcd", "lvds"; - phys = <&dphy>; - phy-names = "lvds0"; - #clock-cells = <0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon_lcd0_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_lcd0_in_tcon_top_mixer0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_top_mixer0_out_tcon_lcd0>; - }; - - tcon_lcd0_in_tcon_top_mixer1: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon_top_mixer1_out_tcon_lcd0>; - }; - }; - - tcon_lcd0_out: port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_lcd0_out_dsi: endpoint@1 { - reg = <1>; - remote-endpoint = <&dsi_in_tcon_lcd0>; - }; - }; - }; - }; - - tcon_tv0: lcd-controller@5470000 { - compatible = "allwinner,sun20i-d1-tcon-tv"; - reg = <0x5470000 0x1000>; - interrupts = ; - clocks = <&ccu 115>, - <&tcon_top 0>; - clock-names = "ahb", "tcon-ch1"; - resets = <&ccu 53>; - reset-names = "lcd"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - tcon_tv0_in: port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - - tcon_tv0_in_tcon_top_mixer0: endpoint@0 { - reg = <0>; - remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>; - }; - - tcon_tv0_in_tcon_top_mixer1: endpoint@1 { - reg = <1>; - remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>; - }; - }; - - tcon_tv0_out: port@1 { - reg = <1>; - - tcon_tv0_out_tcon_top_hdmi: endpoint { - remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>; - }; - }; - }; - }; - - ppu: power-controller@7001000 { - compatible = "allwinner,sun20i-d1-ppu"; - reg = <0x7001000 0x1000>; - clocks = <&r_ccu 4>; - resets = <&r_ccu 2>; - #power-domain-cells = <1>; - }; - - r_ccu: clock-controller@7010000 { - compatible = "allwinner,sun20i-d1-r-ccu"; - reg = <0x7010000 0x400>; - clocks = <&dcxo>, - <&rtc 0>, - <&rtc 2>, - <&ccu 6>; - clock-names = "hosc", "losc", "iosc", "pll-periph"; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - rtc: rtc@7090000 { - compatible = "allwinner,sun20i-d1-rtc", - "allwinner,sun50i-r329-rtc"; - reg = <0x7090000 0x400>; - interrupts = ; - clocks = <&r_ccu 7>, - <&dcxo>, - <&r_ccu 0>; - clock-names = "bus", "hosc", "ahb"; - #clock-cells = <1>; - }; - }; -};