diff --git a/dts/sun20i-common-regulators.dtsi b/dts/sun20i-common-regulators.dtsi new file mode 100644 index 0000000..ed7b12e --- /dev/null +++ b/dts/sun20i-common-regulators.dtsi @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (C) 2021-2022 Samuel Holland + +/ { + reg_vcc: vcc { + compatible = "regulator-fixed"; + regulator-name = "vcc"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + reg_vcc_3v3: vcc-3v3 { + compatible = "regulator-fixed"; + regulator-name = "vcc-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <®_vcc>; + }; +}; + +&pio { + vcc-pb-supply = <®_vcc_3v3>; + vcc-pc-supply = <®_vcc_3v3>; + vcc-pd-supply = <®_vcc_3v3>; + vcc-pe-supply = <®_vcc_3v3>; + vcc-pf-supply = <®_vcc_3v3>; + vcc-pg-supply = <®_vcc_3v3>; +}; diff --git a/dts/sun20i-d1-mangopi-mq-pro.dts b/dts/sun20i-d1-mangopi-mq-pro.dts new file mode 100644 index 0000000..e2bb6bc --- /dev/null +++ b/dts/sun20i-d1-mangopi-mq-pro.dts @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (C) 2022 Samuel Holland + +#include +#include + +/dts-v1/; + +#include "sun20i-d1.dtsi" +#include "sun20i-common-regulators.dtsi" + +/ { + model = "MangoPi MQ Pro"; + compatible = "widora,mangopi-mq-pro", "allwinner,sun20i-d1"; + + aliases { + ethernet0 = &rtl8723ds; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + led-0 { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&pio 3 18 GPIO_ACTIVE_HIGH>; /* PD18 */ + }; + }; + + reg_avdd2v8: avdd2v8 { + compatible = "regulator-fixed"; + regulator-name = "avdd2v8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <®_vcc_3v3>; + }; + + reg_dvdd: dvdd { + compatible = "regulator-fixed"; + regulator-name = "dvdd"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + vin-supply = <®_vcc_3v3>; + }; + + reg_vdd_cpu: vdd-cpu { + compatible = "regulator-fixed"; + regulator-name = "vdd-cpu"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + vin-supply = <®_vcc>; + }; + + wifi_pwrseq: wifi-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&pio 6 17 GPIO_ACTIVE_LOW>; /* PG17 */ + }; +}; + +&cpu0 { + cpu-supply = <®_vdd_cpu>; +}; + +&dcxo { + clock-frequency = <24000000>; +}; + +&ehci1 { + status = "okay"; +}; + +&mmc0 { + bus-width = <4>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ + disable-wp; + vmmc-supply = <®_vcc_3v3>; + vqmmc-supply = <®_vcc_3v3>; + pinctrl-0 = <&mmc0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&mmc1 { + bus-width = <4>; + mmc-pwrseq = <&wifi_pwrseq>; + non-removable; + vmmc-supply = <®_vcc_3v3>; + vqmmc-supply = <®_vcc_3v3>; + pinctrl-0 = <&mmc1_pins>; + pinctrl-names = "default"; + status = "okay"; + + rtl8723ds: wifi@1 { + reg = <1>; + interrupt-parent = <&pio>; + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 */ + interrupt-names = "host-wake"; + }; +}; + +&ohci1 { + status = "okay"; +}; + +&pio { + vcc-pe-supply = <®_avdd2v8>; +}; + +&uart0 { + pinctrl-0 = <&uart0_pb8_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&uart1 { + uart-has-rtscts; + pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>; + pinctrl-names = "default"; + status = "okay"; + + bluetooth { + compatible = "realtek,rtl8723ds-bt"; + device-wake-gpios = <&pio 6 18 GPIO_ACTIVE_HIGH>; /* PG18 */ + enable-gpios = <&pio 6 15 GPIO_ACTIVE_HIGH>; /* PG15 */ + host-wake-gpios = <&pio 6 14 GPIO_ACTIVE_HIGH>; /* PG14 */ + }; +}; + +&usb_otg { + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_vcc>; + status = "okay"; +}; diff --git a/dts/sun20i-d1.dtsi b/dts/sun20i-d1.dtsi new file mode 100644 index 0000000..b18f368 --- /dev/null +++ b/dts/sun20i-d1.dtsi @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (C) 2021-2022 Samuel Holland + +#include "sun20i-d1s.dtsi" +#include "sunxi-d1-t113.dtsi" + +/ { + soc { + lradc: keys@2009800 { + compatible = "allwinner,sun20i-d1-lradc", + "allwinner,sun50i-r329-lradc"; + reg = <0x2009800 0x400>; + interrupts = ; + clocks = <&ccu CLK_BUS_LRADC>; + resets = <&ccu RST_BUS_LRADC>; + status = "disabled"; + }; + + i2s0: i2s@2032000 { + compatible = "allwinner,sun20i-d1-i2s", + "allwinner,sun50i-r329-i2s"; + reg = <0x2032000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_I2S0>, + <&ccu CLK_I2S0>; + clock-names = "apb", "mod"; + resets = <&ccu RST_BUS_I2S0>; + dmas = <&dma 3>, <&dma 3>; + dma-names = "rx", "tx"; + status = "disabled"; + #sound-dai-cells = <0>; + }; + }; +}; + +&pio { + /omit-if-no-ref/ + dmic_pb11_d0_pin: dmic-pb11-d0-pin { + pins = "PB11"; + function = "dmic"; + }; + + /omit-if-no-ref/ + dmic_pe17_clk_pin: dmic-pe17-clk-pin { + pins = "PE17"; + function = "dmic"; + }; + + /omit-if-no-ref/ + i2c0_pb10_pins: i2c0-pb10-pins { + pins = "PB10", "PB11"; + function = "i2c0"; + }; + + /omit-if-no-ref/ + i2c2_pb0_pins: i2c2-pb0-pins { + pins = "PB0", "PB1"; + function = "i2c2"; + }; + + /omit-if-no-ref/ + uart0_pb8_pins: uart0-pb8-pins { + pins = "PB8", "PB9"; + function = "uart0"; + }; +}; diff --git a/dts/sun20i-d1s.dtsi b/dts/sun20i-d1s.dtsi new file mode 100644 index 0000000..64c3c2e --- /dev/null +++ b/dts/sun20i-d1s.dtsi @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (C) 2021-2022 Samuel Holland + +#define SOC_PERIPHERAL_IRQ(nr) (nr + 16) + +#include "sunxi-d1s-t113.dtsi" + +/ { + cpus { + timebase-frequency = <24000000>; + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + compatible = "thead,c906", "riscv"; + device_type = "cpu"; + reg = <0>; + clocks = <&ccu CLK_RISCV>; + d-cache-block-size = <64>; + d-cache-sets = <256>; + d-cache-size = <32768>; + i-cache-block-size = <64>; + i-cache-sets = <128>; + i-cache-size = <32768>; + mmu-type = "riscv,sv39"; + operating-points-v2 = <&opp_table_cpu>; + riscv,isa = "rv64imafdc"; + riscv,isa-base = "rv64i"; + riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", + "zifencei", "zihpm"; + #cooling-cells = <2>; + + cpu0_intc: interrupt-controller { + compatible = "riscv,cpu-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + }; + }; + + opp_table_cpu: opp-table-cpu { + compatible = "operating-points-v2"; + + opp-408000000 { + opp-hz = /bits/ 64 <408000000>; + opp-microvolt = <900000 900000 1100000>; + }; + + opp-1080000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <900000 900000 1100000>; + }; + }; + + soc { + interrupt-parent = <&plic>; + + riscv_wdt: watchdog@6011000 { + compatible = "allwinner,sun20i-d1-wdt"; + reg = <0x6011000 0x20>; + interrupts = ; + clocks = <&dcxo>, <&rtc CLK_OSC32K>; + clock-names = "hosc", "losc"; + }; + + plic: interrupt-controller@10000000 { + compatible = "allwinner,sun20i-d1-plic", + "thead,c900-plic"; + reg = <0x10000000 0x4000000>; + interrupts-extended = <&cpu0_intc 11>, + <&cpu0_intc 9>; + interrupt-controller; + riscv,ndev = <175>; + #address-cells = <0>; + #interrupt-cells = <2>; + }; + }; + + pmu { + compatible = "riscv,pmu"; + riscv,event-to-mhpmcounters = + <0x00003 0x00003 0x00000008>, + <0x00004 0x00004 0x00000010>, + <0x00005 0x00005 0x00000200>, + <0x00006 0x00006 0x00000100>, + <0x10000 0x10000 0x00004000>, + <0x10001 0x10001 0x00008000>, + <0x10002 0x10002 0x00010000>, + <0x10003 0x10003 0x00020000>, + <0x10019 0x10019 0x00000040>, + <0x10021 0x10021 0x00000020>; + riscv,event-to-mhpmevent = + <0x00003 0x00000000 0x00000001>, + <0x00004 0x00000000 0x00000002>, + <0x00005 0x00000000 0x00000007>, + <0x00006 0x00000000 0x00000006>, + <0x10000 0x00000000 0x0000000c>, + <0x10001 0x00000000 0x0000000d>, + <0x10002 0x00000000 0x0000000e>, + <0x10003 0x00000000 0x0000000f>, + <0x10019 0x00000000 0x00000004>, + <0x10021 0x00000000 0x00000003>; + riscv,raw-event-to-mhpmcounters = + <0x00000000 0x00000001 0xffffffff 0xffffffff 0x00000008>, + <0x00000000 0x00000002 0xffffffff 0xffffffff 0x00000010>, + <0x00000000 0x00000003 0xffffffff 0xffffffff 0x00000020>, + <0x00000000 0x00000004 0xffffffff 0xffffffff 0x00000040>, + <0x00000000 0x00000005 0xffffffff 0xffffffff 0x00000080>, + <0x00000000 0x00000006 0xffffffff 0xffffffff 0x00000100>, + <0x00000000 0x00000007 0xffffffff 0xffffffff 0x00000200>, + <0x00000000 0x0000000b 0xffffffff 0xffffffff 0x00002000>, + <0x00000000 0x0000000c 0xffffffff 0xffffffff 0x00004000>, + <0x00000000 0x0000000d 0xffffffff 0xffffffff 0x00008000>, + <0x00000000 0x0000000e 0xffffffff 0xffffffff 0x00010000>, + <0x00000000 0x0000000f 0xffffffff 0xffffffff 0x00020000>; + }; +}; diff --git a/dts/sunxi-d1-t113.dtsi b/dts/sunxi-d1-t113.dtsi new file mode 100644 index 0000000..3b077dc --- /dev/null +++ b/dts/sunxi-d1-t113.dtsi @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (C) 2021-2022 Samuel Holland + +/ { + soc { + dsp_wdt: watchdog@1700400 { + compatible = "allwinner,sun20i-d1-wdt"; + reg = <0x1700400 0x20>; + interrupts = ; + clocks = <&dcxo>, <&rtc CLK_OSC32K>; + clock-names = "hosc", "losc"; + status = "reserved"; + }; + }; +}; diff --git a/dts/sunxi-d1s-t113.dtsi b/dts/sunxi-d1s-t113.dtsi new file mode 100644 index 0000000..5a9d7f5 --- /dev/null +++ b/dts/sunxi-d1s-t113.dtsi @@ -0,0 +1,927 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (C) 2021-2022 Samuel Holland + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + + dcxo: dcxo-clk { + compatible = "fixed-clock"; + clock-output-names = "dcxo"; + #clock-cells = <0>; + }; + + de: display-engine { + compatible = "allwinner,sun20i-d1-display-engine"; + allwinner,pipelines = <&mixer0>, <&mixer1>; + status = "disabled"; + }; + + soc { + compatible = "simple-bus"; + ranges; + dma-noncoherent; + #address-cells = <1>; + #size-cells = <1>; + + pio: pinctrl@2000000 { + compatible = "allwinner,sun20i-d1-pinctrl"; + reg = <0x2000000 0x800>; + interrupts = , + , + , + , + , + ; + clocks = <&ccu CLK_APB0>, + <&dcxo>, + <&rtc CLK_OSC32K>; + clock-names = "apb", "hosc", "losc"; + gpio-controller; + interrupt-controller; + #gpio-cells = <3>; + #interrupt-cells = <3>; + + /omit-if-no-ref/ + can0_pins: can0-pins { + pins = "PB2", "PB3"; + function = "can0"; + }; + + /omit-if-no-ref/ + can1_pins: can1-pins { + pins = "PB4", "PB5"; + function = "can1"; + }; + + /omit-if-no-ref/ + clk_pg11_pin: clk-pg11-pin { + pins = "PG11"; + function = "clk"; + }; + + /omit-if-no-ref/ + dsi_4lane_pins: dsi-4lane-pins { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", + "PD6", "PD7", "PD8", "PD9"; + drive-strength = <30>; + function = "dsi"; + }; + + /omit-if-no-ref/ + lcd_rgb666_pins: lcd-rgb666-pins { + pins = "PD0", "PD1", "PD2", "PD3", "PD4", "PD5", + "PD6", "PD7", "PD8", "PD9", "PD10", "PD11", + "PD12", "PD13", "PD14", "PD15", "PD16", "PD17", + "PD18", "PD19", "PD20", "PD21"; + function = "lcd0"; + }; + + /omit-if-no-ref/ + mmc0_pins: mmc0-pins { + pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; + function = "mmc0"; + }; + + /omit-if-no-ref/ + mmc1_pins: mmc1-pins { + pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5"; + function = "mmc1"; + }; + + /omit-if-no-ref/ + mmc2_pins: mmc2-pins { + pins = "PC2", "PC3", "PC4", "PC5", "PC6", "PC7"; + function = "mmc2"; + }; + + /omit-if-no-ref/ + rgmii_pe_pins: rgmii-pe-pins { + pins = "PE0", "PE1", "PE2", "PE3", "PE4", + "PE5", "PE6", "PE7", "PE8", "PE9", + "PE11", "PE12", "PE13", "PE14", "PE15"; + function = "emac"; + }; + + /omit-if-no-ref/ + rmii_pe_pins: rmii-pe-pins { + pins = "PE0", "PE1", "PE2", "PE3", "PE4", + "PE5", "PE6", "PE7", "PE8", "PE9"; + function = "emac"; + }; + + /omit-if-no-ref/ + spi0_pins: spi0-pins { + pins = "PC2", "PC3", "PC4", "PC5"; + function = "spi0"; + }; + + /omit-if-no-ref/ + uart1_pg6_pins: uart1-pg6-pins { + pins = "PG6", "PG7"; + function = "uart1"; + }; + + /omit-if-no-ref/ + uart1_pg8_rts_cts_pins: uart1-pg8-rts-cts-pins { + pins = "PG8", "PG9"; + function = "uart1"; + }; + + /omit-if-no-ref/ + uart3_pb_pins: uart3-pb-pins { + pins = "PB6", "PB7"; + function = "uart3"; + }; + }; + + ccu: clock-controller@2001000 { + compatible = "allwinner,sun20i-d1-ccu"; + reg = <0x2001000 0x1000>; + clocks = <&dcxo>, + <&rtc CLK_OSC32K>, + <&rtc CLK_IOSC>; + clock-names = "hosc", "losc", "iosc"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + gpadc: adc@2009000 { + compatible = "allwinner,sun20i-d1-gpadc"; + reg = <0x2009000 0x400>; + clocks = <&ccu CLK_BUS_GPADC>; + resets = <&ccu RST_BUS_GPADC>; + interrupts = ; + status = "disabled"; + #io-channel-cells = <1>; + }; + + dmic: dmic@2031000 { + compatible = "allwinner,sun20i-d1-dmic", + "allwinner,sun50i-h6-dmic"; + reg = <0x2031000 0x400>; + interrupts = ; + clocks = <&ccu CLK_BUS_DMIC>, + <&ccu CLK_DMIC>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_DMIC>; + dmas = <&dma 8>; + dma-names = "rx"; + status = "disabled"; + #sound-dai-cells = <0>; + }; + + i2s1: i2s@2033000 { + compatible = "allwinner,sun20i-d1-i2s", + "allwinner,sun50i-r329-i2s"; + reg = <0x2033000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_I2S1>, + <&ccu CLK_I2S1>; + clock-names = "apb", "mod"; + resets = <&ccu RST_BUS_I2S1>; + dmas = <&dma 4>, <&dma 4>; + dma-names = "rx", "tx"; + status = "disabled"; + #sound-dai-cells = <0>; + }; + + i2s2: i2s@2034000 { + compatible = "allwinner,sun20i-d1-i2s", + "allwinner,sun50i-r329-i2s"; + reg = <0x2034000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_I2S2>, + <&ccu CLK_I2S2>; + clock-names = "apb", "mod"; + resets = <&ccu RST_BUS_I2S2>; + dmas = <&dma 5>, <&dma 5>; + dma-names = "rx", "tx"; + status = "disabled"; + #sound-dai-cells = <0>; + }; + + timer: timer@2050000 { + compatible = "allwinner,sun20i-d1-timer", + "allwinner,sun8i-a23-timer"; + reg = <0x2050000 0xa0>; + interrupts = , + ; + clocks = <&dcxo>; + }; + + wdt: watchdog@20500a0 { + compatible = "allwinner,sun20i-d1-wdt-reset", + "allwinner,sun20i-d1-wdt"; + reg = <0x20500a0 0x20>; + interrupts = ; + clocks = <&dcxo>, <&rtc CLK_OSC32K>; + clock-names = "hosc", "losc"; + status = "reserved"; + }; + + uart0: serial@2500000 { + compatible = "snps,dw-apb-uart"; + reg = <0x2500000 0x400>; + reg-io-width = <4>; + reg-shift = <2>; + interrupts = ; + clocks = <&ccu CLK_BUS_UART0>; + resets = <&ccu RST_BUS_UART0>; + dmas = <&dma 14>, <&dma 14>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + uart1: serial@2500400 { + compatible = "snps,dw-apb-uart"; + reg = <0x2500400 0x400>; + reg-io-width = <4>; + reg-shift = <2>; + interrupts = ; + clocks = <&ccu CLK_BUS_UART1>; + resets = <&ccu RST_BUS_UART1>; + dmas = <&dma 15>, <&dma 15>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + uart2: serial@2500800 { + compatible = "snps,dw-apb-uart"; + reg = <0x2500800 0x400>; + reg-io-width = <4>; + reg-shift = <2>; + interrupts = ; + clocks = <&ccu CLK_BUS_UART2>; + resets = <&ccu RST_BUS_UART2>; + dmas = <&dma 16>, <&dma 16>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + uart3: serial@2500c00 { + compatible = "snps,dw-apb-uart"; + reg = <0x2500c00 0x400>; + reg-io-width = <4>; + reg-shift = <2>; + interrupts = ; + clocks = <&ccu CLK_BUS_UART3>; + resets = <&ccu RST_BUS_UART3>; + dmas = <&dma 17>, <&dma 17>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + uart4: serial@2501000 { + compatible = "snps,dw-apb-uart"; + reg = <0x2501000 0x400>; + reg-io-width = <4>; + reg-shift = <2>; + interrupts = ; + clocks = <&ccu CLK_BUS_UART4>; + resets = <&ccu RST_BUS_UART4>; + dmas = <&dma 18>, <&dma 18>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + uart5: serial@2501400 { + compatible = "snps,dw-apb-uart"; + reg = <0x2501400 0x400>; + reg-io-width = <4>; + reg-shift = <2>; + interrupts = ; + clocks = <&ccu CLK_BUS_UART5>; + resets = <&ccu RST_BUS_UART5>; + dmas = <&dma 19>, <&dma 19>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + i2c0: i2c@2502000 { + compatible = "allwinner,sun20i-d1-i2c", + "allwinner,sun8i-v536-i2c", + "allwinner,sun6i-a31-i2c"; + reg = <0x2502000 0x400>; + interrupts = ; + clocks = <&ccu CLK_BUS_I2C0>; + resets = <&ccu RST_BUS_I2C0>; + dmas = <&dma 43>, <&dma 43>; + dma-names = "rx", "tx"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c1: i2c@2502400 { + compatible = "allwinner,sun20i-d1-i2c", + "allwinner,sun8i-v536-i2c", + "allwinner,sun6i-a31-i2c"; + reg = <0x2502400 0x400>; + interrupts = ; + clocks = <&ccu CLK_BUS_I2C1>; + resets = <&ccu RST_BUS_I2C1>; + dmas = <&dma 44>, <&dma 44>; + dma-names = "rx", "tx"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c2: i2c@2502800 { + compatible = "allwinner,sun20i-d1-i2c", + "allwinner,sun8i-v536-i2c", + "allwinner,sun6i-a31-i2c"; + reg = <0x2502800 0x400>; + interrupts = ; + clocks = <&ccu CLK_BUS_I2C2>; + resets = <&ccu RST_BUS_I2C2>; + dmas = <&dma 45>, <&dma 45>; + dma-names = "rx", "tx"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c3: i2c@2502c00 { + compatible = "allwinner,sun20i-d1-i2c", + "allwinner,sun8i-v536-i2c", + "allwinner,sun6i-a31-i2c"; + reg = <0x2502c00 0x400>; + interrupts = ; + clocks = <&ccu CLK_BUS_I2C3>; + resets = <&ccu RST_BUS_I2C3>; + dmas = <&dma 46>, <&dma 46>; + dma-names = "rx", "tx"; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + can0: can@2504000 { + compatible = "allwinner,sun20i-d1-can"; + reg = <0x02504000 0x400>; + interrupts = ; + clocks = <&ccu CLK_BUS_CAN0>; + resets = <&ccu RST_BUS_CAN0>; + pinctrl-names = "default"; + pinctrl-0 = <&can0_pins>; + status = "disabled"; + }; + + can1: can@2504400 { + compatible = "allwinner,sun20i-d1-can"; + reg = <0x02504400 0x400>; + interrupts = ; + clocks = <&ccu CLK_BUS_CAN1>; + resets = <&ccu RST_BUS_CAN1>; + pinctrl-names = "default"; + pinctrl-0 = <&can1_pins>; + status = "disabled"; + }; + + syscon: syscon@3000000 { + compatible = "allwinner,sun20i-d1-system-control"; + reg = <0x3000000 0x1000>; + ranges; + #address-cells = <1>; + #size-cells = <1>; + }; + + dma: dma-controller@3002000 { + compatible = "allwinner,sun20i-d1-dma"; + reg = <0x3002000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_DMA>, <&ccu CLK_MBUS_DMA>; + clock-names = "bus", "mbus"; + resets = <&ccu RST_BUS_DMA>; + dma-channels = <16>; + dma-requests = <48>; + #dma-cells = <1>; + }; + + sid: efuse@3006000 { + compatible = "allwinner,sun20i-d1-sid"; + reg = <0x3006000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + }; + + crypto: crypto@3040000 { + compatible = "allwinner,sun20i-d1-crypto"; + reg = <0x3040000 0x800>; + interrupts = ; + clocks = <&ccu CLK_BUS_CE>, + <&ccu CLK_CE>, + <&ccu CLK_MBUS_CE>, + <&rtc CLK_IOSC>; + clock-names = "bus", "mod", "ram", "trng"; + resets = <&ccu RST_BUS_CE>; + }; + + mbus: dram-controller@3102000 { + compatible = "allwinner,sun20i-d1-mbus"; + reg = <0x3102000 0x1000>, + <0x3103000 0x1000>; + reg-names = "mbus", "dram"; + interrupts = ; + clocks = <&ccu CLK_MBUS>, + <&ccu CLK_DRAM>, + <&ccu CLK_BUS_DRAM>; + clock-names = "mbus", "dram", "bus"; + dma-ranges = <0 0x40000000 0x80000000>; + #address-cells = <1>; + #size-cells = <1>; + #interconnect-cells = <1>; + }; + + mmc0: mmc@4020000 { + compatible = "allwinner,sun20i-d1-mmc"; + reg = <0x4020000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC0>; + reset-names = "ahb"; + cap-sd-highspeed; + max-frequency = <150000000>; + no-mmc; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc1: mmc@4021000 { + compatible = "allwinner,sun20i-d1-mmc"; + reg = <0x4021000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC1>; + reset-names = "ahb"; + cap-sd-highspeed; + max-frequency = <150000000>; + no-mmc; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc2: mmc@4022000 { + compatible = "allwinner,sun20i-d1-emmc", + "allwinner,sun50i-a100-emmc"; + reg = <0x4022000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC2>; + reset-names = "ahb"; + cap-mmc-highspeed; + max-frequency = <150000000>; + mmc-ddr-1_8v; + mmc-ddr-3_3v; + no-sd; + no-sdio; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi0: spi@4025000 { + compatible = "allwinner,sun20i-d1-spi", + "allwinner,sun50i-r329-spi"; + reg = <0x04025000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; + clock-names = "ahb", "mod"; + dmas = <&dma 22>, <&dma 22>; + dma-names = "rx", "tx"; + resets = <&ccu RST_BUS_SPI0>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + spi1: spi@4026000 { + compatible = "allwinner,sun20i-d1-spi-dbi", + "allwinner,sun50i-r329-spi-dbi", + "allwinner,sun50i-r329-spi"; + reg = <0x04026000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; + clock-names = "ahb", "mod"; + dmas = <&dma 23>, <&dma 23>; + dma-names = "rx", "tx"; + resets = <&ccu RST_BUS_SPI1>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + usb_otg: usb@4100000 { + compatible = "allwinner,sun20i-d1-musb", + "allwinner,sun8i-a33-musb"; + reg = <0x4100000 0x400>; + interrupts = ; + interrupt-names = "mc"; + clocks = <&ccu CLK_BUS_OTG>; + resets = <&ccu RST_BUS_OTG>; + extcon = <&usbphy 0>; + phys = <&usbphy 0>; + phy-names = "usb"; + status = "disabled"; + }; + + usbphy: phy@4100400 { + compatible = "allwinner,sun20i-d1-usb-phy"; + reg = <0x4100400 0x100>, + <0x4101800 0x100>, + <0x4200800 0x100>; + reg-names = "phy_ctrl", + "pmu0", + "pmu1"; + clocks = <&dcxo>, + <&dcxo>; + clock-names = "usb0_phy", + "usb1_phy"; + resets = <&ccu RST_USB_PHY0>, + <&ccu RST_USB_PHY1>; + reset-names = "usb0_reset", + "usb1_reset"; + status = "disabled"; + #phy-cells = <1>; + }; + + ehci0: usb@4101000 { + compatible = "allwinner,sun20i-d1-ehci", + "generic-ehci"; + reg = <0x4101000 0x100>; + interrupts = ; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_BUS_EHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>, + <&ccu RST_BUS_EHCI0>; + phys = <&usbphy 0>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci0: usb@4101400 { + compatible = "allwinner,sun20i-d1-ohci", + "generic-ohci"; + reg = <0x4101400 0x100>; + interrupts = ; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>; + phys = <&usbphy 0>; + phy-names = "usb"; + status = "disabled"; + }; + + ehci1: usb@4200000 { + compatible = "allwinner,sun20i-d1-ehci", + "generic-ehci"; + reg = <0x4200000 0x100>; + interrupts = ; + clocks = <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_BUS_EHCI1>, + <&ccu CLK_USB_OHCI1>; + resets = <&ccu RST_BUS_OHCI1>, + <&ccu RST_BUS_EHCI1>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci1: usb@4200400 { + compatible = "allwinner,sun20i-d1-ohci", + "generic-ohci"; + reg = <0x4200400 0x100>; + interrupts = ; + clocks = <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_USB_OHCI1>; + resets = <&ccu RST_BUS_OHCI1>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + emac: ethernet@4500000 { + compatible = "allwinner,sun20i-d1-emac", + "allwinner,sun50i-a64-emac"; + reg = <0x4500000 0x10000>; + interrupts = ; + interrupt-names = "macirq"; + clocks = <&ccu CLK_BUS_EMAC>; + clock-names = "stmmaceth"; + resets = <&ccu RST_BUS_EMAC>; + reset-names = "stmmaceth"; + syscon = <&syscon>; + status = "disabled"; + + mdio: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + display_clocks: clock-controller@5000000 { + compatible = "allwinner,sun20i-d1-de2-clk", + "allwinner,sun50i-h5-de2-clk"; + reg = <0x5000000 0x10000>; + clocks = <&ccu CLK_BUS_DE>, <&ccu CLK_DE>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_DE>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + mixer0: mixer@5100000 { + compatible = "allwinner,sun20i-d1-de2-mixer-0"; + reg = <0x5100000 0x100000>; + clocks = <&display_clocks CLK_BUS_MIXER0>, + <&display_clocks CLK_MIXER0>; + clock-names = "bus", "mod"; + resets = <&display_clocks RST_MIXER0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mixer0_out: port@1 { + reg = <1>; + + mixer0_out_tcon_top_mixer0: endpoint { + remote-endpoint = <&tcon_top_mixer0_in_mixer0>; + }; + }; + }; + }; + + mixer1: mixer@5200000 { + compatible = "allwinner,sun20i-d1-de2-mixer-1"; + reg = <0x5200000 0x100000>; + clocks = <&display_clocks CLK_BUS_MIXER1>, + <&display_clocks CLK_MIXER1>; + clock-names = "bus", "mod"; + resets = <&display_clocks RST_MIXER1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mixer1_out: port@1 { + reg = <1>; + + mixer1_out_tcon_top_mixer1: endpoint { + remote-endpoint = <&tcon_top_mixer1_in_mixer1>; + }; + }; + }; + }; + + dsi: dsi@5450000 { + compatible = "allwinner,sun20i-d1-mipi-dsi", + "allwinner,sun50i-a100-mipi-dsi"; + reg = <0x5450000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_MIPI_DSI>, + <&tcon_top CLK_TCON_TOP_DSI>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_MIPI_DSI>; + phys = <&dphy>; + phy-names = "dphy"; + status = "disabled"; + + port { + dsi_in_tcon_lcd0: endpoint { + remote-endpoint = <&tcon_lcd0_out_dsi>; + }; + }; + }; + + dphy: phy@5451000 { + compatible = "allwinner,sun20i-d1-mipi-dphy", + "allwinner,sun50i-a100-mipi-dphy"; + reg = <0x5451000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_MIPI_DSI>, + <&ccu CLK_MIPI_DSI>; + clock-names = "bus", "mod"; + resets = <&ccu RST_BUS_MIPI_DSI>; + #phy-cells = <0>; + }; + + tcon_top: tcon-top@5460000 { + compatible = "allwinner,sun20i-d1-tcon-top"; + reg = <0x5460000 0x1000>; + clocks = <&ccu CLK_BUS_DPSS_TOP>, + <&ccu CLK_TCON_TV>, + <&ccu CLK_TVE>, + <&ccu CLK_TCON_LCD0>; + clock-names = "bus", "tcon-tv0", "tve0", "dsi"; + clock-output-names = "tcon-top-tv0", "tcon-top-dsi"; + resets = <&ccu RST_BUS_DPSS_TOP>; + #clock-cells = <1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon_top_mixer0_in: port@0 { + reg = <0>; + + tcon_top_mixer0_in_mixer0: endpoint { + remote-endpoint = <&mixer0_out_tcon_top_mixer0>; + }; + }; + + tcon_top_mixer0_out: port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + tcon_top_mixer0_out_tcon_lcd0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer0>; + }; + + tcon_top_mixer0_out_tcon_tv0: endpoint@2 { + reg = <2>; + remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>; + }; + }; + + tcon_top_mixer1_in: port@2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + + tcon_top_mixer1_in_mixer1: endpoint@1 { + reg = <1>; + remote-endpoint = <&mixer1_out_tcon_top_mixer1>; + }; + }; + + tcon_top_mixer1_out: port@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + tcon_top_mixer1_out_tcon_lcd0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon_lcd0_in_tcon_top_mixer1>; + }; + + tcon_top_mixer1_out_tcon_tv0: endpoint@2 { + reg = <2>; + remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>; + }; + }; + + tcon_top_hdmi_in: port@4 { + reg = <4>; + + tcon_top_hdmi_in_tcon_tv0: endpoint { + remote-endpoint = <&tcon_tv0_out_tcon_top_hdmi>; + }; + }; + + tcon_top_hdmi_out: port@5 { + reg = <5>; + }; + }; + }; + + tcon_lcd0: lcd-controller@5461000 { + compatible = "allwinner,sun20i-d1-tcon-lcd"; + reg = <0x5461000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_TCON_LCD0>, + <&ccu CLK_TCON_LCD0>; + clock-names = "ahb", "tcon-ch0"; + clock-output-names = "tcon-pixel-clock"; + resets = <&ccu RST_BUS_TCON_LCD0>, + <&ccu RST_BUS_LVDS0>; + reset-names = "lcd", "lvds"; + #clock-cells = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon_lcd0_in: port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + tcon_lcd0_in_tcon_top_mixer0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon_top_mixer0_out_tcon_lcd0>; + }; + + tcon_lcd0_in_tcon_top_mixer1: endpoint@1 { + reg = <1>; + remote-endpoint = <&tcon_top_mixer1_out_tcon_lcd0>; + }; + }; + + tcon_lcd0_out: port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + tcon_lcd0_out_dsi: endpoint@1 { + reg = <1>; + remote-endpoint = <&dsi_in_tcon_lcd0>; + }; + }; + }; + }; + + tcon_tv0: lcd-controller@5470000 { + compatible = "allwinner,sun20i-d1-tcon-tv"; + reg = <0x5470000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_TCON_TV>, + <&tcon_top CLK_TCON_TOP_TV0>; + clock-names = "ahb", "tcon-ch1"; + resets = <&ccu RST_BUS_TCON_TV>; + reset-names = "lcd"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon_tv0_in: port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + tcon_tv0_in_tcon_top_mixer0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon_top_mixer0_out_tcon_tv0>; + }; + + tcon_tv0_in_tcon_top_mixer1: endpoint@1 { + reg = <1>; + remote-endpoint = <&tcon_top_mixer1_out_tcon_tv0>; + }; + }; + + tcon_tv0_out: port@1 { + reg = <1>; + + tcon_tv0_out_tcon_top_hdmi: endpoint { + remote-endpoint = <&tcon_top_hdmi_in_tcon_tv0>; + }; + }; + }; + }; + + ppu: power-controller@7001000 { + compatible = "allwinner,sun20i-d1-ppu"; + reg = <0x7001000 0x1000>; + clocks = <&r_ccu CLK_BUS_R_PPU>; + resets = <&r_ccu RST_BUS_R_PPU>; + #power-domain-cells = <1>; + }; + + r_ccu: clock-controller@7010000 { + compatible = "allwinner,sun20i-d1-r-ccu"; + reg = <0x7010000 0x400>; + clocks = <&dcxo>, + <&rtc CLK_OSC32K>, + <&rtc CLK_IOSC>, + <&ccu CLK_PLL_PERIPH0_DIV3>; + clock-names = "hosc", "losc", "iosc", "pll-periph"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + rtc: rtc@7090000 { + compatible = "allwinner,sun20i-d1-rtc", + "allwinner,sun50i-r329-rtc"; + reg = <0x7090000 0x400>; + interrupts = ; + clocks = <&r_ccu CLK_BUS_R_RTC>, + <&dcxo>, + <&r_ccu CLK_R_AHB>; + clock-names = "bus", "hosc", "ahb"; + #clock-cells = <1>; + }; + }; +}; diff --git a/dts/ubuntu.24.04.devicetree.dts b/dts/ubuntu.24.04.devicetree.dts new file mode 100644 index 0000000..ca591ec --- /dev/null +++ b/dts/ubuntu.24.04.devicetree.dts @@ -0,0 +1,1374 @@ +/dts-v1/; + +/ { + #address-cells = <0x01>; + model = "Allwinner D1 Nezha"; + #size-cells = <0x01>; + compatible = "allwinner,d1-nezha\0allwinner,sun20i-d1"; + + connector { + type = "a"; + compatible = "hdmi-connector"; + + port { + + endpoint { + remote-endpoint = <0x40>; + phandle = <0x35>; + }; + }; + }; + + vdd-cpu { + regulator-max-microvolt = <0x11b340>; + regulator-min-microvolt = <0xc5c10>; + regulator-name = "vdd-cpu"; + compatible = "pwm-regulator"; + phandle = <0x3c>; + pwms = <0x41 0x00 0xc350 0x00>; + pwm-supply = <0x18>; + }; + + wifi-pwrseq { + reset-gpios = <0x0e 0x06 0x0c 0x01>; + compatible = "mmc-pwrseq-simple"; + phandle = <0x12>; + }; + + thermal-zones { + + cpu-thermal { + polling-delay = <0x00>; + polling-delay-passive = <0x00>; + thermal-sensors = <0x3d>; + + trips { + + cpu-crit { + temperature = <0x1adb0>; + hysteresis = <0x00>; + type = "critical"; + }; + + cpu-target { + temperature = <0x14c08>; + hysteresis = <0xbb8>; + type = "passive"; + phandle = <0x3e>; + }; + }; + + cooling-maps { + + map0 { + trip = <0x3e>; + cooling-device = <0x3f 0xffffffff 0xffffffff>; + }; + }; + }; + }; + + soc { + #address-cells = <0x01>; + dma-noncoherent; + #size-cells = <0x01>; + interrupt-parent = <0x03>; + compatible = "simple-bus"; + ranges; + + watchdog@20500a0 { + clock-names = "hosc\0losc"; + interrupts = <0x4f 0x04>; + clocks = <0x05 0x06 0x00>; + compatible = "allwinner,sun20i-d1-wdt-reset\0allwinner,sun20i-d1-wdt"; + status = "reserved"; + reg = <0x20500a0 0x20>; + }; + + serial@2501000 { + reg-io-width = <0x04>; + resets = <0x04 0x16>; + interrupts = <0x16 0x04>; + clocks = <0x04 0x42>; + dma-names = "tx\0rx"; + compatible = "snps,dw-apb-uart"; + status = "disabled"; + reg = <0x2501000 0x400>; + dmas = <0x09 0x12 0x09 0x12>; + reg-shift = <0x02>; + }; + + hdmi@5500000 { + reg-io-width = <0x01>; + phy-names = "phy"; + clock-names = "iahb\0isfr\0cec"; + hvcc-supply = <0x33>; + resets = <0x04 0x31>; + interrupts = <0x6d 0x04>; + clocks = <0x04 0x6d 0x04 0x6a 0x04 0x6c>; + compatible = "allwinner,sun20i-d1-dw-hdmi"; + status = "okay"; + phys = <0x32>; + reg = <0x5500000 0x10000>; + reset-names = "ctrl"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + + endpoint { + remote-endpoint = <0x34>; + phandle = <0x29>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + remote-endpoint = <0x35>; + phandle = <0x40>; + }; + }; + }; + }; + + syscon@3000000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "allwinner,sun20i-d1-system-control"; + ranges; + reg = <0x3000000 0x1000>; + phandle = <0x19>; + + regulators@3000150 { + compatible = "allwinner,sun20i-d1-system-ldos"; + reg = <0x3000150 0x04>; + + ldob { + }; + + ldoa { + regulator-max-microvolt = <0x1b7740>; + regulator-always-on; + ldo-in-supply = <0x07>; + regulator-min-microvolt = <0x1b7740>; + phandle = <0x33>; + }; + }; + }; + + mmc@4022000 { + mmc-ddr-3_3v; + #address-cells = <0x01>; + clock-names = "ahb\0mmc"; + no-sdio; + resets = <0x04 0x11>; + interrupts = <0x3a 0x04>; + clocks = <0x04 0x3d 0x04 0x3a>; + #size-cells = <0x00>; + no-sd; + mmc-ddr-1_8v; + compatible = "allwinner,sun20i-d1-emmc\0allwinner,sun50i-a100-emmc"; + status = "disabled"; + reg = <0x4022000 0x1000>; + max-frequency = <0x8f0d180>; + cap-mmc-highspeed; + reset-names = "ahb"; + }; + + i2c@2502000 { + #address-cells = <0x01>; + resets = <0x04 0x18>; + interrupts = <0x19 0x04>; + clocks = <0x04 0x44>; + #size-cells = <0x00>; + dma-names = "rx\0tx"; + compatible = "allwinner,sun20i-d1-i2c\0allwinner,sun8i-v536-i2c\0allwinner,sun6i-a31-i2c"; + status = "disabled"; + reg = <0x2502000 0x400>; + dmas = <0x09 0x2b 0x09 0x2b>; + }; + + mixer@5100000 { + clock-names = "bus\0mod"; + resets = <0x1c 0x00>; + clocks = <0x1c 0x00 0x1c 0x06>; + compatible = "allwinner,sun20i-d1-de2-mixer-0"; + reg = <0x5100000 0x100000>; + phandle = <0x01>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@1 { + reg = <0x01>; + + endpoint { + remote-endpoint = <0x1d>; + phandle = <0x22>; + }; + }; + }; + }; + + crypto@3040000 { + clock-names = "bus\0mod\0ram\0trng"; + resets = <0x04 0x04>; + interrupts = <0x44 0x04>; + clocks = <0x04 0x22 0x04 0x21 0x04 0x32 0x06 0x02>; + compatible = "allwinner,sun20i-d1-crypto"; + reg = <0x3040000 0x800>; + }; + + can@2504000 { + pinctrl-names = "default"; + pinctrl-0 = <0x0f>; + resets = <0x04 0x42>; + interrupts = <0x25 0x04>; + clocks = <0x04 0x91>; + compatible = "allwinner,sun20i-d1-can"; + status = "disabled"; + reg = <0x2504000 0x400>; + }; + + usb@4101400 { + phy-names = "usb"; + resets = <0x04 0x2a>; + interrupts = <0x2f 0x04>; + clocks = <0x04 0x63 0x04 0x61>; + compatible = "allwinner,sun20i-d1-ohci\0generic-ohci"; + status = "okay"; + phys = <0x16 0x00>; + reg = <0x4101400 0x100>; + }; + + dmic@2031000 { + clock-names = "bus\0mod"; + resets = <0x04 0x26>; + interrupts = <0x28 0x04>; + clocks = <0x04 0x5d 0x04 0x5c>; + dma-names = "rx"; + #sound-dai-cells = <0x00>; + compatible = "allwinner,sun20i-d1-dmic\0allwinner,sun50i-h6-dmic"; + status = "disabled"; + reg = <0x2031000 0x400>; + dmas = <0x09 0x08>; + }; + + serial@2500400 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x0b 0x0c>; + resets = <0x04 0x13>; + interrupts = <0x13 0x04>; + clocks = <0x04 0x3f>; + uart-has-rtscts; + dma-names = "tx\0rx"; + compatible = "snps,dw-apb-uart"; + status = "okay"; + reg = <0x2500400 0x400>; + dmas = <0x09 0x0f 0x09 0x0f>; + reg-shift = <0x02>; + }; + + dsi@5450000 { + phy-names = "dphy"; + clock-names = "bus\0mod"; + resets = <0x04 0x33>; + interrupts = <0x6c 0x04>; + clocks = <0x04 0x6f 0x1f 0x02>; + compatible = "allwinner,sun20i-d1-mipi-dsi\0allwinner,sun50i-a100-mipi-dsi"; + status = "disabled"; + phys = <0x20>; + reg = <0x5450000 0x1000>; + + port { + + endpoint { + remote-endpoint = <0x21>; + phandle = <0x2c>; + }; + }; + }; + + spi@4025000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x14>; + clock-names = "ahb\0mod"; + resets = <0x04 0x1c>; + interrupts = <0x1f 0x04>; + clocks = <0x04 0x4a 0x04 0x48>; + #size-cells = <0x00>; + dma-names = "rx\0tx"; + compatible = "allwinner,sun20i-d1-spi\0allwinner,sun50i-r329-spi"; + status = "okay"; + reg = <0x4025000 0x1000>; + dmas = <0x09 0x16 0x09 0x16>; + + flash@0 { + compatible = "spi-nand"; + reg = <0x00>; + + partitions { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "fixed-partitions"; + + partition@100000 { + label = "uboot"; + reg = <0x100000 0x300000>; + }; + + partition@0 { + label = "boot0"; + reg = <0x00 0x100000>; + }; + + partition@500000 { + label = "sys"; + reg = <0x500000 0xfb00000>; + }; + + partition@400000 { + label = "secure_storage"; + reg = <0x400000 0x100000>; + }; + }; + }; + }; + + watchdog@1700400 { + clock-names = "hosc\0losc"; + interrupts = <0x8a 0x04>; + clocks = <0x05 0x06 0x00>; + compatible = "allwinner,sun20i-d1-wdt"; + status = "reserved"; + reg = <0x1700400 0x20>; + }; + + dram-controller@3102000 { + dma-ranges = <0x00 0x40000000 0x80000000>; + #address-cells = <0x01>; + clock-names = "mbus\0dram\0bus"; + reg-names = "mbus\0dram"; + interrupts = <0x3b 0x04>; + clocks = <0x04 0x1a 0x04 0x2f 0x04 0x37>; + #interconnect-cells = <0x01>; + #size-cells = <0x01>; + compatible = "allwinner,sun20i-d1-mbus"; + reg = <0x3102000 0x1000 0x3103000 0x1000>; + }; + + i2s@2032000 { + clock-names = "apb\0mod"; + resets = <0x04 0x22>; + interrupts = <0x2a 0x04>; + clocks = <0x04 0x56 0x04 0x52>; + dma-names = "rx\0tx"; + #sound-dai-cells = <0x00>; + compatible = "allwinner,sun20i-d1-i2s\0allwinner,sun50i-r329-i2s"; + status = "disabled"; + reg = <0x2032000 0x1000>; + dmas = <0x09 0x03 0x09 0x03>; + }; + + interrupt-controller@10000000 { + #address-cells = <0x00>; + interrupts-extended = <0x31 0x0b 0x31 0x09>; + compatible = "allwinner,sun20i-d1-plic\0thead,c900-plic"; + #interrupt-cells = <0x02>; + reg = <0x10000000 0x4000000>; + phandle = <0x03>; + riscv,ndev = <0xaf>; + interrupt-controller; + }; + + clock-controller@7010000 { + #reset-cells = <0x01>; + clock-names = "hosc\0losc\0iosc\0pll-periph"; + clocks = <0x05 0x06 0x00 0x06 0x02 0x04 0x06>; + #clock-cells = <0x01>; + compatible = "allwinner,sun20i-d1-r-ccu"; + reg = <0x7010000 0x400>; + phandle = <0x30>; + }; + + clock-controller@2001000 { + #reset-cells = <0x01>; + clock-names = "hosc\0losc\0iosc"; + clocks = <0x05 0x06 0x00 0x06 0x02>; + #clock-cells = <0x01>; + compatible = "allwinner,sun20i-d1-ccu"; + reg = <0x2001000 0x1000>; + phandle = <0x04>; + }; + + ethernet@4500000 { + syscon = <0x19>; + pinctrl-names = "default"; + phy-supply = <0x07>; + phy-mode = "rgmii-id"; + pinctrl-0 = <0x1a>; + clock-names = "stmmaceth"; + local-mac-address = [56 4a 5f a7 32 14]; + resets = <0x04 0x1e>; + interrupts = <0x3e 0x04>; + clocks = <0x04 0x4d>; + compatible = "allwinner,sun20i-d1-emac\0allwinner,sun50i-a64-emac"; + status = "okay"; + interrupt-names = "macirq"; + reg = <0x4500000 0x10000>; + phy-handle = <0x1b>; + reset-names = "stmmaceth"; + + mdio { + #address-cells = <0x01>; + #size-cells = <0x00>; + compatible = "snps,dwmac-mdio"; + + ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x01>; + phandle = <0x1b>; + }; + }; + }; + + serial@2500c00 { + reg-io-width = <0x04>; + resets = <0x04 0x15>; + interrupts = <0x15 0x04>; + clocks = <0x04 0x41>; + dma-names = "tx\0rx"; + compatible = "snps,dw-apb-uart"; + status = "disabled"; + reg = <0x2500c00 0x400>; + dmas = <0x09 0x11 0x09 0x11>; + reg-shift = <0x02>; + }; + + pwm@2000c00 { + pinctrl-names = "default"; + pinctrl-0 = <0x08>; + clock-names = "bus\0hosc\0apb0"; + resets = <0x04 0x0d>; + clocks = <0x04 0x2d 0x05 0x04 0x18>; + #pwm-cells = <0x03>; + compatible = "allwinner,sun20i-d1-pwm"; + status = "okay"; + reg = <0x2000c00 0x400>; + phandle = <0x41>; + }; + + temperature-sensor@2009400 { + vref-supply = <0x38>; + nvmem-cells = <0x37>; + clock-names = "bus\0mod"; + resets = <0x04 0x21>; + interrupts = <0x4a 0x04>; + clocks = <0x04 0x51 0x05>; + #thermal-sensor-cells = <0x00>; + compatible = "allwinner,sun20i-d1-ths"; + nvmem-cell-names = "calibration"; + reg = <0x2009400 0x400>; + phandle = <0x3d>; + }; + + usb@4200400 { + phy-names = "usb"; + resets = <0x04 0x2b>; + interrupts = <0x32 0x04>; + clocks = <0x04 0x64 0x04 0x62>; + compatible = "allwinner,sun20i-d1-ohci\0generic-ohci"; + status = "okay"; + phys = <0x16 0x01>; + reg = <0x4200400 0x100>; + }; + + power-controller@7001000 { + resets = <0x30 0x02>; + clocks = <0x30 0x04>; + #power-domain-cells = <0x01>; + compatible = "allwinner,sun20i-d1-ppu"; + reg = <0x7001000 0x1000>; + }; + + usb@4101000 { + phy-names = "usb"; + resets = <0x04 0x2a 0x04 0x2c>; + interrupts = <0x2e 0x04>; + clocks = <0x04 0x63 0x04 0x65 0x04 0x61>; + compatible = "allwinner,sun20i-d1-ehci\0generic-ehci"; + status = "okay"; + phys = <0x16 0x00>; + reg = <0x4101000 0x100>; + }; + + serial@2500000 { + reg-io-width = <0x04>; + pinctrl-names = "default"; + pinctrl-0 = <0x0a>; + resets = <0x04 0x12>; + interrupts = <0x12 0x04>; + clocks = <0x04 0x3e>; + dma-names = "tx\0rx"; + compatible = "snps,dw-apb-uart"; + status = "okay"; + reg = <0x2500000 0x400>; + dmas = <0x09 0x0e 0x09 0x0e>; + reg-shift = <0x02>; + }; + + efuse@3006000 { + #address-cells = <0x01>; + #size-cells = <0x01>; + compatible = "allwinner,sun20i-d1-sid"; + reg = <0x3006000 0x1000>; + + bg-trim@28 { + bits = <0x10 0x08>; + reg = <0x28 0x04>; + phandle = <0x3a>; + }; + + ths-calib@14 { + reg = <0x14 0x04>; + phandle = <0x37>; + }; + }; + + mmc@4021000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x13>; + clock-names = "ahb\0mmc"; + cap-sd-highspeed; + vqmmc-supply = <0x07>; + no-mmc; + bus-width = <0x04>; + non-removable; + resets = <0x04 0x10>; + interrupts = <0x39 0x04>; + clocks = <0x04 0x3c 0x04 0x39>; + #size-cells = <0x00>; + vmmc-supply = <0x07>; + compatible = "allwinner,sun20i-d1-mmc"; + status = "okay"; + mmc-pwrseq = <0x12>; + reg = <0x4021000 0x1000>; + max-frequency = <0x8f0d180>; + reset-names = "ahb"; + + wifi@1 { + interrupts = <0x06 0x0a 0x08>; + interrupt-parent = <0x0e>; + interrupt-names = "host-wake"; + reg = <0x01>; + }; + }; + + clock-controller@5000000 { + #reset-cells = <0x01>; + clock-names = "bus\0mod"; + resets = <0x04 0x01>; + clocks = <0x04 0x1c 0x04 0x1b>; + #clock-cells = <0x01>; + compatible = "allwinner,sun20i-d1-de2-clk\0allwinner,sun50i-h5-de2-clk"; + reg = <0x5000000 0x10000>; + phandle = <0x1c>; + }; + + lcd-controller@5470000 { + clock-names = "ahb\0tcon-ch1"; + resets = <0x04 0x35>; + interrupts = <0x6b 0x04>; + clocks = <0x04 0x73 0x1f 0x00>; + compatible = "allwinner,sun20i-d1-tcon-tv"; + reg = <0x5470000 0x1000>; + reset-names = "lcd"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x2e>; + reg = <0x01>; + phandle = <0x27>; + }; + + endpoint@0 { + remote-endpoint = <0x2d>; + reg = <0x00>; + phandle = <0x24>; + }; + }; + + port@1 { + reg = <0x01>; + + endpoint { + remote-endpoint = <0x2f>; + phandle = <0x28>; + }; + }; + }; + }; + + i2s@2034000 { + clock-names = "apb\0mod"; + resets = <0x04 0x24>; + interrupts = <0x2c 0x04>; + clocks = <0x04 0x58 0x04 0x54>; + dma-names = "rx\0tx"; + #sound-dai-cells = <0x00>; + compatible = "allwinner,sun20i-d1-i2s\0allwinner,sun50i-r329-i2s"; + status = "disabled"; + reg = <0x2034000 0x1000>; + dmas = <0x09 0x05 0x09 0x05>; + }; + + usb@4200000 { + phy-names = "usb"; + resets = <0x04 0x2b 0x04 0x2d>; + interrupts = <0x31 0x04>; + clocks = <0x04 0x64 0x04 0x66 0x04 0x62>; + compatible = "allwinner,sun20i-d1-ehci\0generic-ehci"; + status = "okay"; + phys = <0x16 0x01>; + reg = <0x4200000 0x100>; + }; + + rtc@7090000 { + clock-names = "bus\0hosc\0ahb"; + interrupts = <0xa0 0x04>; + clocks = <0x30 0x07 0x05 0x30 0x00>; + #clock-cells = <0x01>; + compatible = "allwinner,sun20i-d1-rtc\0allwinner,sun50i-r329-rtc"; + reg = <0x7090000 0x400>; + phandle = <0x06>; + }; + + i2c@2502800 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x0d>; + resets = <0x04 0x1a>; + interrupts = <0x1b 0x04>; + clocks = <0x04 0x46>; + #size-cells = <0x00>; + dma-names = "rx\0tx"; + compatible = "allwinner,sun20i-d1-i2c\0allwinner,sun8i-v536-i2c\0allwinner,sun6i-a31-i2c"; + status = "okay"; + reg = <0x2502800 0x400>; + dmas = <0x09 0x2d 0x09 0x2d>; + + gpio@38 { + gpio-controller; + gpio-line-names = "pin13 [gpio8]\0pin16 [gpio10]\0pin18 [gpio11]\0pin26 [gpio17]\0pin22 [gpio14]\0pin28 [gpio19]\0pin37 [gpio23]\0pin11 [gpio6]"; + interrupts = <0x01 0x02 0x08>; + interrupt-parent = <0x0e>; + compatible = "nxp,pcf8574a"; + #interrupt-cells = <0x02>; + reg = <0x38>; + #gpio-cells = <0x02>; + interrupt-controller; + }; + }; + + timer@2050000 { + interrupts = <0x4b 0x04 0x4c 0x04>; + clocks = <0x05>; + compatible = "allwinner,sun20i-d1-timer\0allwinner,sun8i-a23-timer"; + reg = <0x2050000 0xa0>; + }; + + pinctrl@2000000 { + clock-names = "apb\0hosc\0losc"; + gpio-controller; + gpio-line-names = "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0pin5 [gpio2/twi2-sck]\0pin3 [gpio1/twi2-sda]\0\0pin38 [gpio24/i2s2-din]\0pin40 [gpio25/i2s2-dout]\0pin12 [gpio7/i2s-clk]\0pin35 [gpio22/i2s2-lrck]\0\0pin8 [gpio4/uart0-txd]\0pin10 [gpio5/uart0-rxd]\0\0\0pin15 [gpio9]\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0pin31 [gpio21]\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0pin24 [gpio16/spi1-ce0]\0pin23 [gpio15/spi1-clk]\0pin19 [gpio12/spi1-mosi]\0pin21 [gpio13/spi1-miso]\0pin27 [gpio18/spi1-hold]\0pin29 [gpio20/spi1-wp]\0\0\0\0\0\0\0pin7 [gpio3/pwm]"; + interrupts = <0x55 0x04 0x57 0x04 0x59 0x04 0x5b 0x04 0x5d 0x04 0x5f 0x04>; + clocks = <0x04 0x18 0x05 0x06 0x00>; + compatible = "allwinner,sun20i-d1-pinctrl"; + #interrupt-cells = <0x03>; + vcc-pb-supply = <0x07>; + vcc-pc-supply = <0x07>; + reg = <0x2000000 0x800>; + phandle = <0x0e>; + vcc-pd-supply = <0x07>; + #gpio-cells = <0x03>; + vcc-pe-supply = <0x07>; + vcc-pf-supply = <0x07>; + vcc-pg-supply = <0x07>; + interrupt-controller; + + rgmii-pe-pins { + function = "emac"; + pins = "PE0\0PE1\0PE2\0PE3\0PE4\0PE5\0PE6\0PE7\0PE8\0PE9\0PE11\0PE12\0PE13\0PE14\0PE15"; + phandle = <0x1a>; + }; + + uart1-pg8-rts-cts-pins { + function = "uart1"; + pins = "PG8\0PG9"; + phandle = <0x0c>; + }; + + can1-pins { + function = "can1"; + pins = "PB4\0PB5"; + phandle = <0x10>; + }; + + ledc-pc0-pin { + function = "ledc"; + pins = "PC0"; + phandle = <0x36>; + }; + + can0-pins { + function = "can0"; + pins = "PB2\0PB3"; + phandle = <0x0f>; + }; + + mmc1-pins { + function = "mmc1"; + pins = "PG0\0PG1\0PG2\0PG3\0PG4\0PG5"; + phandle = <0x13>; + }; + + mmc0-pins { + function = "mmc0"; + pins = "PF0\0PF1\0PF2\0PF3\0PF4\0PF5"; + phandle = <0x11>; + }; + + uart1-pg6-pins { + function = "uart1"; + pins = "PG6\0PG7"; + phandle = <0x0b>; + }; + + uart0-pb8-pins { + function = "uart0"; + pins = "PB8\0PB9"; + phandle = <0x0a>; + }; + + spi1-pd-pins { + function = "spi1"; + pins = "PD10\0PD11\0PD12\0PD13\0PD14\0PD15"; + phandle = <0x15>; + }; + + spi0-pins { + function = "spi0"; + pins = "PC2\0PC3\0PC4\0PC5\0PC6\0PC7"; + phandle = <0x14>; + }; + + pwm0-pd16-pin { + function = "pwm0"; + pins = "PD16"; + phandle = <0x08>; + }; + + i2c2-pb0-pins { + function = "i2c2"; + pins = "PB0\0PB1"; + phandle = <0x0d>; + }; + }; + + usb@4100000 { + phy-names = "usb"; + resets = <0x04 0x2e>; + interrupts = <0x2d 0x04>; + clocks = <0x04 0x67>; + extcon = <0x16 0x00>; + compatible = "allwinner,sun20i-d1-musb\0allwinner,sun8i-a33-musb"; + status = "okay"; + interrupt-names = "mc"; + phys = <0x16 0x00>; + reg = <0x4100000 0x400>; + dr_mode = "otg"; + }; + + phy@5451000 { + clock-names = "bus\0mod"; + resets = <0x04 0x33>; + interrupts = <0x6c 0x04>; + clocks = <0x04 0x6f 0x04 0x6e>; + #phy-cells = <0x00>; + compatible = "allwinner,sun20i-d1-mipi-dphy\0allwinner,sun50i-a100-mipi-dphy"; + reg = <0x5451000 0x1000>; + phandle = <0x20>; + }; + + phy@4100400 { + usb1_vbus-supply = <0x18>; + clock-names = "usb0_phy\0usb1_phy"; + reg-names = "phy_ctrl\0pmu0\0pmu1"; + resets = <0x04 0x28 0x04 0x29>; + clocks = <0x05 0x05>; + #phy-cells = <0x01>; + usb0_vbus_det-gpios = <0x0e 0x03 0x14 0x00>; + compatible = "allwinner,sun20i-d1-usb-phy"; + status = "okay"; + usb0_vbus-supply = <0x17>; + reg = <0x4100400 0x100 0x4101800 0x100 0x4200800 0x100>; + phandle = <0x16>; + reset-names = "usb0_reset\0usb1_reset"; + usb0_id_det-gpios = <0x0e 0x03 0x15 0x00>; + }; + + mmc@4020000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x11>; + clock-names = "ahb\0mmc"; + cap-sd-highspeed; + vqmmc-supply = <0x07>; + no-mmc; + bus-width = <0x04>; + resets = <0x04 0x0f>; + interrupts = <0x38 0x04>; + clocks = <0x04 0x3b 0x04 0x38>; + #size-cells = <0x00>; + vmmc-supply = <0x07>; + compatible = "allwinner,sun20i-d1-mmc"; + status = "okay"; + disable-wp; + reg = <0x4020000 0x1000>; + max-frequency = <0x8f0d180>; + reset-names = "ahb"; + cd-gpios = <0x0e 0x05 0x06 0x00>; + }; + + watchdog@6011000 { + clock-names = "hosc\0losc"; + interrupts = <0x93 0x04>; + clocks = <0x05 0x06 0x00>; + compatible = "allwinner,sun20i-d1-wdt"; + reg = <0x6011000 0x20>; + }; + + dma-controller@3002000 { + clock-names = "bus\0mbus"; + resets = <0x04 0x06>; + interrupts = <0x42 0x04>; + clocks = <0x04 0x25 0x04 0x30>; + dma-requests = <0x30>; + compatible = "allwinner,sun20i-d1-dma"; + reg = <0x3002000 0x1000>; + phandle = <0x09>; + dma-channels = <0x10>; + #dma-cells = <0x01>; + }; + + tcon-top@5460000 { + clock-output-names = "tcon-top-tv0\0tcon-top-dsi"; + clock-names = "bus\0tcon-tv0\0tve0\0dsi"; + resets = <0x04 0x30>; + clocks = <0x04 0x69 0x04 0x72 0x04 0x74 0x04 0x70>; + #clock-cells = <0x01>; + compatible = "allwinner,sun20i-d1-tcon-top"; + reg = <0x5460000 0x1000>; + phandle = <0x1f>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + reg = <0x00>; + + endpoint { + remote-endpoint = <0x22>; + phandle = <0x1d>; + }; + }; + + port@5 { + reg = <0x05>; + + endpoint { + remote-endpoint = <0x29>; + phandle = <0x34>; + }; + }; + + port@3 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x03>; + + endpoint@2 { + remote-endpoint = <0x27>; + reg = <0x02>; + phandle = <0x2e>; + }; + + endpoint@0 { + remote-endpoint = <0x26>; + reg = <0x00>; + phandle = <0x2b>; + }; + }; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + + endpoint@2 { + remote-endpoint = <0x24>; + reg = <0x02>; + phandle = <0x2d>; + }; + + endpoint@0 { + remote-endpoint = <0x23>; + reg = <0x00>; + phandle = <0x2a>; + }; + }; + + port@4 { + reg = <0x04>; + + endpoint { + remote-endpoint = <0x28>; + phandle = <0x2f>; + }; + }; + + port@2 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x02>; + + endpoint@1 { + remote-endpoint = <0x25>; + reg = <0x01>; + phandle = <0x1e>; + }; + }; + }; + }; + + serial@2501400 { + reg-io-width = <0x04>; + resets = <0x04 0x17>; + interrupts = <0x17 0x04>; + clocks = <0x04 0x43>; + dma-names = "tx\0rx"; + compatible = "snps,dw-apb-uart"; + status = "disabled"; + reg = <0x2501400 0x400>; + dmas = <0x09 0x13 0x09 0x13>; + reg-shift = <0x02>; + }; + + spi@4026000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x15>; + clock-names = "ahb\0mod"; + resets = <0x04 0x1d>; + interrupts = <0x20 0x04>; + clocks = <0x04 0x4b 0x04 0x49>; + #size-cells = <0x00>; + dma-names = "rx\0tx"; + compatible = "allwinner,sun20i-d1-spi-dbi\0allwinner,sun50i-r329-spi-dbi\0allwinner,sun50i-r329-spi"; + status = "okay"; + reg = <0x4026000 0x1000>; + dmas = <0x09 0x17 0x09 0x17>; + }; + + keys@2009800 { + vref-supply = <0x38>; + resets = <0x04 0x2f>; + interrupts = <0x4d 0x04>; + clocks = <0x04 0x68>; + compatible = "allwinner,sun20i-d1-lradc\0allwinner,sun50i-r329-lradc"; + status = "okay"; + reg = <0x2009800 0x400>; + + button-160 { + label = "OK"; + channel = <0x00>; + linux,code = <0x160>; + voltage = <0x27100>; + }; + }; + + phy@5510000 { + clock-names = "bus\0mod"; + resets = <0x04 0x32>; + clocks = <0x04 0x6d 0x04 0x6a>; + #phy-cells = <0x00>; + compatible = "allwinner,sun20i-d1-hdmi-phy"; + status = "okay"; + reg = <0x5510000 0x10000>; + phandle = <0x32>; + reset-names = "phy"; + }; + + adc@2009000 { + resets = <0x04 0x20>; + interrupts = <0x49 0x04>; + clocks = <0x04 0x50>; + #io-channel-cells = <0x01>; + compatible = "allwinner,sun20i-d1-gpadc"; + status = "disabled"; + reg = <0x2009000 0x400>; + }; + + i2c@2502400 { + #address-cells = <0x01>; + resets = <0x04 0x19>; + interrupts = <0x1a 0x04>; + clocks = <0x04 0x45>; + #size-cells = <0x00>; + dma-names = "rx\0tx"; + compatible = "allwinner,sun20i-d1-i2c\0allwinner,sun8i-v536-i2c\0allwinner,sun6i-a31-i2c"; + status = "disabled"; + reg = <0x2502400 0x400>; + dmas = <0x09 0x2c 0x09 0x2c>; + }; + + i2s@2033000 { + clock-names = "apb\0mod"; + resets = <0x04 0x23>; + interrupts = <0x2b 0x04>; + clocks = <0x04 0x57 0x04 0x53>; + dma-names = "rx\0tx"; + #sound-dai-cells = <0x00>; + compatible = "allwinner,sun20i-d1-i2s\0allwinner,sun50i-r329-i2s"; + status = "disabled"; + reg = <0x2033000 0x1000>; + dmas = <0x09 0x04 0x09 0x04>; + }; + + lcd-controller@5461000 { + clock-output-names = "tcon-pixel-clock"; + phy-names = "lvds0"; + clock-names = "ahb\0tcon-ch0"; + resets = <0x04 0x34 0x04 0x36>; + interrupts = <0x6a 0x04>; + clocks = <0x04 0x71 0x04 0x70>; + #clock-cells = <0x00>; + compatible = "allwinner,sun20i-d1-tcon-lcd"; + phys = <0x20>; + reg = <0x5461000 0x1000>; + reset-names = "lcd\0lvds"; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@0 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x00>; + + endpoint@1 { + remote-endpoint = <0x2b>; + reg = <0x01>; + phandle = <0x26>; + }; + + endpoint@0 { + remote-endpoint = <0x2a>; + reg = <0x00>; + phandle = <0x23>; + }; + }; + + port@1 { + #address-cells = <0x01>; + #size-cells = <0x00>; + reg = <0x01>; + + endpoint@1 { + remote-endpoint = <0x2c>; + reg = <0x01>; + phandle = <0x21>; + }; + }; + }; + }; + + can@2504400 { + pinctrl-names = "default"; + pinctrl-0 = <0x10>; + resets = <0x04 0x43>; + interrupts = <0x26 0x04>; + clocks = <0x04 0x92>; + compatible = "allwinner,sun20i-d1-can"; + status = "disabled"; + reg = <0x2504400 0x400>; + }; + + mixer@5200000 { + clock-names = "bus\0mod"; + resets = <0x1c 0x01>; + clocks = <0x1c 0x01 0x1c 0x07>; + compatible = "allwinner,sun20i-d1-de2-mixer-1"; + reg = <0x5200000 0x100000>; + phandle = <0x02>; + + ports { + #address-cells = <0x01>; + #size-cells = <0x00>; + + port@1 { + reg = <0x01>; + + endpoint { + remote-endpoint = <0x1e>; + phandle = <0x25>; + }; + }; + }; + }; + + audio-codec@2030000 { + #address-cells = <0x01>; + clock-names = "bus\0adc\0dac\0hosc\0losc"; + resets = <0x04 0x27>; + widgets = "Microphone\0Headset Microphone\0Headphone\0Headphone Jack"; + interrupts = <0x29 0x04>; + clocks = <0x04 0x60 0x04 0x5f 0x04 0x5e 0x05 0x06 0x00>; + #size-cells = <0x01>; + routing = "Headphone Jack\0HPOUTL\0Headphone Jack\0HPOUTR\0LINEINL\0HPOUTL\0LINEINR\0HPOUTR\0MICIN3\0Headset Microphone\0Headset Microphone\0HBIAS"; + avcc-supply = <0x38>; + dma-names = "rx\0tx"; + #sound-dai-cells = <0x00>; + compatible = "allwinner,sun20i-d1-codec\0simple-mfd\0syscon"; + status = "okay"; + reg = <0x2030000 0x1000>; + dmas = <0x09 0x07 0x09 0x07>; + hpvcc-supply = <0x39>; + + regulators@2030348 { + nvmem-cells = <0x3a>; + compatible = "allwinner,sun20i-d1-analog-ldos"; + nvmem-cell-names = "bg_trim"; + reg = <0x2030348 0x04>; + + hpldo { + regulator-max-microvolt = <0x1b7740>; + regulator-min-microvolt = <0x1b7740>; + phandle = <0x39>; + hpldoin-supply = <0x07>; + }; + + aldo { + regulator-max-microvolt = <0x1b7740>; + regulator-always-on; + regulator-min-microvolt = <0x1b7740>; + phandle = <0x38>; + vdd33-supply = <0x07>; + }; + }; + }; + + serial@2500800 { + reg-io-width = <0x04>; + resets = <0x04 0x14>; + interrupts = <0x14 0x04>; + clocks = <0x04 0x40>; + dma-names = "tx\0rx"; + compatible = "snps,dw-apb-uart"; + status = "disabled"; + reg = <0x2500800 0x400>; + dmas = <0x09 0x10 0x09 0x10>; + reg-shift = <0x02>; + }; + + led-controller@2008000 { + pinctrl-names = "default"; + #address-cells = <0x01>; + pinctrl-0 = <0x36>; + clock-names = "bus\0mod"; + resets = <0x04 0x3b>; + interrupts = <0x24 0x04>; + clocks = <0x04 0x7b 0x04 0x7a>; + #size-cells = <0x00>; + dma-names = "tx"; + compatible = "allwinner,sun20i-d1-ledc\0allwinner,sun50i-a100-ledc"; + status = "okay"; + reg = <0x2008000 0x400>; + dmas = <0x09 0x2a>; + + multi-led@0 { + function = "status"; + color = <0x09>; + reg = <0x00>; + }; + }; + + i2c@2502c00 { + #address-cells = <0x01>; + resets = <0x04 0x1b>; + interrupts = <0x1c 0x04>; + clocks = <0x04 0x47>; + #size-cells = <0x00>; + dma-names = "rx\0tx"; + compatible = "allwinner,sun20i-d1-i2c\0allwinner,sun8i-v536-i2c\0allwinner,sun6i-a31-i2c"; + status = "disabled"; + reg = <0x2502c00 0x400>; + dmas = <0x09 0x2e 0x09 0x2e>; + }; + }; + + usbvbus { + regulator-max-microvolt = <0x4c4b40>; + gpio = <0x0e 0x03 0x13 0x00>; + enable-active-high; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "usbvbus"; + compatible = "regulator-fixed"; + phandle = <0x17>; + vin-supply = <0x18>; + }; + + opp-table-cpu { + compatible = "operating-points-v2"; + phandle = <0x3b>; + + opp-1080000000 { + opp-microvolt = <0xdbba0 0xdbba0 0x10c8e0>; + opp-hz = <0x00 0x3c14dc00>; + }; + + opp-408000000 { + opp-microvolt = <0xdbba0 0xdbba0 0x10c8e0>; + opp-hz = <0x00 0x18519600>; + }; + }; + + aliases { + ethernet0 = "/soc/ethernet@4500000"; + spi0 = "/soc/spi@4025000"; + ethernet1 = "/soc/mmc@4021000/wifi@1"; + serial0 = "/soc/serial@2500000"; + }; + + display-engine { + allwinner,pipelines = <0x01 0x02>; + compatible = "allwinner,sun20i-d1-display-engine"; + status = "okay"; + }; + + chosen { + linux,uefi-mmap-size = <0x6b8>; + u-boot,version = "2024.01-rc1"; + bootargs = "BOOT_IMAGE=/boot/vmlinuz-6.8.0-31-generic root=LABEL=cloudimg-rootfs ro efi=debug earlycon"; + boot-hartid = <0x00>; + linux,uefi-mmap-start = <0x00 0x77e32068>; + linux,uefi-mmap-desc-size = <0x28>; + linux,uefi-mmap-desc-ver = <0x01>; + linux,uefi-secure-boot = <0x02>; + linux,uefi-system-table = <0x00 0x7ff59d38>; + stdout-path = "serial0:115200n8"; + }; + + vcc-3v3 { + regulator-max-microvolt = <0x325aa0>; + regulator-min-microvolt = <0x325aa0>; + regulator-name = "vcc-3v3"; + compatible = "regulator-fixed"; + phandle = <0x07>; + vin-supply = <0x18>; + }; + + vcc { + regulator-max-microvolt = <0x4c4b40>; + regulator-min-microvolt = <0x4c4b40>; + regulator-name = "vcc"; + compatible = "regulator-fixed"; + phandle = <0x18>; + }; + + pmu { + riscv,event-to-mhpmcounters = <0x03 0x03 0x08 0x04 0x04 0x10 0x05 0x05 0x200 0x06 0x06 0x100 0x10000 0x10000 0x4000 0x10001 0x10001 0x8000 0x10002 0x10002 0x10000 0x10003 0x10003 0x20000 0x10019 0x10019 0x40 0x10021 0x10021 0x20>; + riscv,raw-event-to-mhpmcounters = <0x00 0x01 0xffffffff 0xffffffff 0x08 0x00 0x02 0xffffffff 0xffffffff 0x10 0x00 0x03 0xffffffff 0xffffffff 0x20 0x00 0x04 0xffffffff 0xffffffff 0x40 0x00 0x05 0xffffffff 0xffffffff 0x80 0x00 0x06 0xffffffff 0xffffffff 0x100 0x00 0x07 0xffffffff 0xffffffff 0x200 0x00 0x0b 0xffffffff 0xffffffff 0x2000 0x00 0x0c 0xffffffff 0xffffffff 0x4000 0x00 0x0d 0xffffffff 0xffffffff 0x8000 0x00 0x0e 0xffffffff 0xffffffff 0x10000 0x00 0x0f 0xffffffff 0xffffffff 0x20000>; + compatible = "riscv,pmu"; + riscv,event-to-mhpmevent = <0x03 0x00 0x01 0x04 0x00 0x02 0x05 0x00 0x07 0x06 0x00 0x06 0x10000 0x00 0x0c 0x10001 0x00 0x0d 0x10002 0x00 0x0e 0x10003 0x00 0x0f 0x10019 0x00 0x04 0x10021 0x00 0x03>; + }; + + dcxo-clk { + clock-output-names = "dcxo"; + #clock-cells = <0x00>; + clock-frequency = <0x16e3600>; + compatible = "fixed-clock"; + phandle = <0x05>; + }; + + cpus { + #address-cells = <0x01>; + #size-cells = <0x00>; + timebase-frequency = <0x16e3600>; + + cpu@0 { + cpu-supply = <0x3c>; + clocks = <0x04 0x84>; + d-cache-block-size = <0x40>; + device_type = "cpu"; + compatible = "thead,c906\0riscv"; + mmu-type = "riscv,sv39"; + d-cache-size = <0x8000>; + riscv,isa-base = "rv64i"; + i-cache-size = <0x8000>; + riscv,isa-extensions = "i\0m\0a\0f\0d\0c\0zicntr\0zicsr\0zifencei\0zihpm"; + reg = <0x00>; + phandle = <0x3f>; + d-cache-sets = <0x100>; + i-cache-block-size = <0x40>; + operating-points-v2 = <0x3b>; + i-cache-sets = <0x80>; + riscv,isa = "rv64imafdc"; + #cooling-cells = <0x02>; + + interrupt-controller { + compatible = "riscv,cpu-intc"; + #interrupt-cells = <0x01>; + phandle = <0x31>; + interrupt-controller; + }; + }; + }; + + reserved-memory { + #address-cells = <0x01>; + #size-cells = <0x01>; + ranges; + + mmode_resv0@40040000 { + reg = <0x40040000 0x20000>; + phandle = <0x43>; + no-map; + }; + + mmode_resv1@40000000 { + reg = <0x40000000 0x40000>; + phandle = <0x42>; + no-map; + }; + }; +}; diff --git a/doc/SX1268_LoRa_HAT_SchDoc.pdf b/reference/SX1268_LoRa_HAT_SchDoc.pdf similarity index 100% rename from doc/SX1268_LoRa_HAT_SchDoc.pdf rename to reference/SX1268_LoRa_HAT_SchDoc.pdf diff --git a/doc/d1-h_datasheet_v1.0.pdf b/reference/d1-h_datasheet_v1.0.pdf similarity index 100% rename from doc/d1-h_datasheet_v1.0.pdf rename to reference/d1-h_datasheet_v1.0.pdf diff --git a/doc/mq-pro-sch-v12.pdf b/reference/mq-pro-sch-v12.pdf similarity index 100% rename from doc/mq-pro-sch-v12.pdf rename to reference/mq-pro-sch-v12.pdf diff --git a/ubuntu.24.04.pinctrl.txt b/ubuntu.24.04.pinctrl.txt new file mode 100644 index 0000000..87ee6ed --- /dev/null +++ b/ubuntu.24.04.pinctrl.txt @@ -0,0 +1,90 @@ +Pinmux settings per pin +Format: pin (name): mux_owner|gpio_owner (strict) hog? +pin 32 (PB0): device 2502800.i2c function i2c2 group PB0 +pin 33 (PB1): device 2502800.i2c function i2c2 group PB1 +pin 34 (PB2): UNCLAIMED +pin 35 (PB3): UNCLAIMED +pin 36 (PB4): UNCLAIMED +pin 37 (PB5): UNCLAIMED +pin 38 (PB6): UNCLAIMED +pin 39 (PB7): UNCLAIMED +pin 40 (PB8): device 2500000.serial function uart0 group PB8 +pin 41 (PB9): device 2500000.serial function uart0 group PB9 +pin 42 (PB10): UNCLAIMED +pin 43 (PB11): UNCLAIMED +pin 44 (PB12): UNCLAIMED +pin 64 (PC0): device 2008000.led-controller function ledc group PC0 +pin 65 (PC1): UNCLAIMED +pin 66 (PC2): device 4025000.spi function spi0 group PC2 +pin 67 (PC3): device 4025000.spi function spi0 group PC3 +pin 68 (PC4): device 4025000.spi function spi0 group PC4 +pin 69 (PC5): device 4025000.spi function spi0 group PC5 +pin 70 (PC6): device 4025000.spi function spi0 group PC6 +pin 71 (PC7): device 4025000.spi function spi0 group PC7 +pin 96 (PD0): UNCLAIMED +pin 97 (PD1): UNCLAIMED +pin 98 (PD2): UNCLAIMED +pin 99 (PD3): UNCLAIMED +pin 100 (PD4): UNCLAIMED +pin 101 (PD5): UNCLAIMED +pin 102 (PD6): UNCLAIMED +pin 103 (PD7): UNCLAIMED +pin 104 (PD8): UNCLAIMED +pin 105 (PD9): UNCLAIMED +pin 106 (PD10): device 4026000.spi function spi1 group PD10 +pin 107 (PD11): device 4026000.spi function spi1 group PD11 +pin 108 (PD12): device 4026000.spi function spi1 group PD12 +pin 109 (PD13): device 4026000.spi function spi1 group PD13 +pin 110 (PD14): device 4026000.spi function spi1 group PD14 +pin 111 (PD15): device 4026000.spi function spi1 group PD15 +pin 112 (PD16): device 2000c00.pwm function pwm0 group PD16 +pin 113 (PD17): UNCLAIMED +pin 114 (PD18): UNCLAIMED +pin 115 (PD19): GPIO 2000000.pinctrl:115 +pin 116 (PD20): GPIO 2000000.pinctrl:116 +pin 117 (PD21): GPIO 2000000.pinctrl:117 +pin 118 (PD22): UNCLAIMED +pin 128 (PE0): UNCLAIMED +pin 129 (PE1): UNCLAIMED +pin 130 (PE2): UNCLAIMED +pin 131 (PE3): UNCLAIMED +pin 132 (PE4): UNCLAIMED +pin 133 (PE5): UNCLAIMED +pin 134 (PE6): UNCLAIMED +pin 135 (PE7): UNCLAIMED +pin 136 (PE8): UNCLAIMED +pin 137 (PE9): UNCLAIMED +pin 138 (PE10): UNCLAIMED +pin 139 (PE11): UNCLAIMED +pin 140 (PE12): UNCLAIMED +pin 141 (PE13): UNCLAIMED +pin 142 (PE14): UNCLAIMED +pin 143 (PE15): UNCLAIMED +pin 144 (PE16): UNCLAIMED +pin 145 (PE17): UNCLAIMED +pin 160 (PF0): device 4020000.mmc function mmc0 group PF0 +pin 161 (PF1): device 4020000.mmc function mmc0 group PF1 +pin 162 (PF2): device 4020000.mmc function mmc0 group PF2 +pin 163 (PF3): device 4020000.mmc function mmc0 group PF3 +pin 164 (PF4): device 4020000.mmc function mmc0 group PF4 +pin 165 (PF5): device 4020000.mmc function mmc0 group PF5 +pin 166 (PF6): GPIO 2000000.pinctrl:166 +pin 192 (PG0): device 4021000.mmc function mmc1 group PG0 +pin 193 (PG1): device 4021000.mmc function mmc1 group PG1 +pin 194 (PG2): device 4021000.mmc function mmc1 group PG2 +pin 195 (PG3): device 4021000.mmc function mmc1 group PG3 +pin 196 (PG4): device 4021000.mmc function mmc1 group PG4 +pin 197 (PG5): device 4021000.mmc function mmc1 group PG5 +pin 198 (PG6): device 2500400.serial function uart1 group PG6 +pin 199 (PG7): device 2500400.serial function uart1 group PG7 +pin 200 (PG8): device 2500400.serial function uart1 group PG8 +pin 201 (PG9): device 2500400.serial function uart1 group PG9 +pin 202 (PG10): UNCLAIMED +pin 203 (PG11): UNCLAIMED +pin 204 (PG12): GPIO 2000000.pinctrl:204 +pin 205 (PG13): UNCLAIMED +pin 206 (PG14): UNCLAIMED +pin 207 (PG15): UNCLAIMED +pin 208 (PG16): UNCLAIMED +pin 209 (PG17): UNCLAIMED +pin 210 (PG18): UNCLAIMED