mirror of
https://github.com/easytarget/MQ-Pro-IO.git
synced 2025-10-13 17:25:52 +01:00
1375 lines
31 KiB
Plaintext
1375 lines
31 KiB
Plaintext
/dts-v1/;
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/ {
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#address-cells = <0x01>;
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model = "Allwinner D1 Nezha";
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#size-cells = <0x01>;
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compatible = "allwinner,d1-nezha\0allwinner,sun20i-d1";
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connector {
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type = "a";
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compatible = "hdmi-connector";
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port {
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endpoint {
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remote-endpoint = <0x40>;
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phandle = <0x35>;
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};
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};
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};
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vdd-cpu {
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regulator-max-microvolt = <0x11b340>;
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regulator-min-microvolt = <0xc5c10>;
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regulator-name = "vdd-cpu";
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compatible = "pwm-regulator";
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phandle = <0x3c>;
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pwms = <0x41 0x00 0xc350 0x00>;
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pwm-supply = <0x18>;
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};
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wifi-pwrseq {
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reset-gpios = <0x0e 0x06 0x0c 0x01>;
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compatible = "mmc-pwrseq-simple";
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phandle = <0x12>;
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};
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thermal-zones {
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cpu-thermal {
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polling-delay = <0x00>;
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polling-delay-passive = <0x00>;
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thermal-sensors = <0x3d>;
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trips {
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cpu-crit {
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temperature = <0x1adb0>;
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hysteresis = <0x00>;
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type = "critical";
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};
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cpu-target {
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temperature = <0x14c08>;
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hysteresis = <0xbb8>;
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type = "passive";
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phandle = <0x3e>;
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};
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};
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cooling-maps {
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map0 {
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trip = <0x3e>;
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cooling-device = <0x3f 0xffffffff 0xffffffff>;
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};
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};
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};
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};
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soc {
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#address-cells = <0x01>;
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dma-noncoherent;
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#size-cells = <0x01>;
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interrupt-parent = <0x03>;
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compatible = "simple-bus";
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ranges;
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watchdog@20500a0 {
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clock-names = "hosc\0losc";
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interrupts = <0x4f 0x04>;
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clocks = <0x05 0x06 0x00>;
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compatible = "allwinner,sun20i-d1-wdt-reset\0allwinner,sun20i-d1-wdt";
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status = "reserved";
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reg = <0x20500a0 0x20>;
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};
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serial@2501000 {
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reg-io-width = <0x04>;
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resets = <0x04 0x16>;
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interrupts = <0x16 0x04>;
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clocks = <0x04 0x42>;
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dma-names = "tx\0rx";
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compatible = "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x2501000 0x400>;
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dmas = <0x09 0x12 0x09 0x12>;
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reg-shift = <0x02>;
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};
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hdmi@5500000 {
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reg-io-width = <0x01>;
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phy-names = "phy";
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clock-names = "iahb\0isfr\0cec";
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hvcc-supply = <0x33>;
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resets = <0x04 0x31>;
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interrupts = <0x6d 0x04>;
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clocks = <0x04 0x6d 0x04 0x6a 0x04 0x6c>;
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compatible = "allwinner,sun20i-d1-dw-hdmi";
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status = "okay";
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phys = <0x32>;
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reg = <0x5500000 0x10000>;
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reset-names = "ctrl";
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ports {
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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port@0 {
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reg = <0x00>;
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endpoint {
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remote-endpoint = <0x34>;
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phandle = <0x29>;
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};
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};
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port@1 {
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reg = <0x01>;
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endpoint {
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remote-endpoint = <0x35>;
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phandle = <0x40>;
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};
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};
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};
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};
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syscon@3000000 {
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#address-cells = <0x01>;
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#size-cells = <0x01>;
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compatible = "allwinner,sun20i-d1-system-control";
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ranges;
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reg = <0x3000000 0x1000>;
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phandle = <0x19>;
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regulators@3000150 {
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compatible = "allwinner,sun20i-d1-system-ldos";
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reg = <0x3000150 0x04>;
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ldob {
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};
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ldoa {
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regulator-max-microvolt = <0x1b7740>;
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regulator-always-on;
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ldo-in-supply = <0x07>;
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regulator-min-microvolt = <0x1b7740>;
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phandle = <0x33>;
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};
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};
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};
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mmc@4022000 {
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mmc-ddr-3_3v;
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#address-cells = <0x01>;
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clock-names = "ahb\0mmc";
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no-sdio;
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resets = <0x04 0x11>;
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interrupts = <0x3a 0x04>;
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clocks = <0x04 0x3d 0x04 0x3a>;
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#size-cells = <0x00>;
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no-sd;
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mmc-ddr-1_8v;
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compatible = "allwinner,sun20i-d1-emmc\0allwinner,sun50i-a100-emmc";
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status = "disabled";
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reg = <0x4022000 0x1000>;
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max-frequency = <0x8f0d180>;
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cap-mmc-highspeed;
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reset-names = "ahb";
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};
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i2c@2502000 {
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#address-cells = <0x01>;
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resets = <0x04 0x18>;
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interrupts = <0x19 0x04>;
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clocks = <0x04 0x44>;
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#size-cells = <0x00>;
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dma-names = "rx\0tx";
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compatible = "allwinner,sun20i-d1-i2c\0allwinner,sun8i-v536-i2c\0allwinner,sun6i-a31-i2c";
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status = "disabled";
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reg = <0x2502000 0x400>;
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dmas = <0x09 0x2b 0x09 0x2b>;
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};
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mixer@5100000 {
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clock-names = "bus\0mod";
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resets = <0x1c 0x00>;
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clocks = <0x1c 0x00 0x1c 0x06>;
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compatible = "allwinner,sun20i-d1-de2-mixer-0";
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reg = <0x5100000 0x100000>;
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phandle = <0x01>;
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ports {
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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port@1 {
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reg = <0x01>;
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endpoint {
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remote-endpoint = <0x1d>;
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phandle = <0x22>;
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};
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};
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};
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};
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crypto@3040000 {
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clock-names = "bus\0mod\0ram\0trng";
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resets = <0x04 0x04>;
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interrupts = <0x44 0x04>;
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clocks = <0x04 0x22 0x04 0x21 0x04 0x32 0x06 0x02>;
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compatible = "allwinner,sun20i-d1-crypto";
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reg = <0x3040000 0x800>;
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};
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can@2504000 {
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pinctrl-names = "default";
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pinctrl-0 = <0x0f>;
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resets = <0x04 0x42>;
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interrupts = <0x25 0x04>;
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clocks = <0x04 0x91>;
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compatible = "allwinner,sun20i-d1-can";
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status = "disabled";
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reg = <0x2504000 0x400>;
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};
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usb@4101400 {
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phy-names = "usb";
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resets = <0x04 0x2a>;
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interrupts = <0x2f 0x04>;
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clocks = <0x04 0x63 0x04 0x61>;
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compatible = "allwinner,sun20i-d1-ohci\0generic-ohci";
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status = "okay";
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phys = <0x16 0x00>;
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reg = <0x4101400 0x100>;
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};
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dmic@2031000 {
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clock-names = "bus\0mod";
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resets = <0x04 0x26>;
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interrupts = <0x28 0x04>;
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clocks = <0x04 0x5d 0x04 0x5c>;
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dma-names = "rx";
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#sound-dai-cells = <0x00>;
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compatible = "allwinner,sun20i-d1-dmic\0allwinner,sun50i-h6-dmic";
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status = "disabled";
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reg = <0x2031000 0x400>;
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dmas = <0x09 0x08>;
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};
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serial@2500400 {
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reg-io-width = <0x04>;
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pinctrl-names = "default";
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pinctrl-0 = <0x0b 0x0c>;
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resets = <0x04 0x13>;
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interrupts = <0x13 0x04>;
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clocks = <0x04 0x3f>;
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uart-has-rtscts;
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dma-names = "tx\0rx";
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compatible = "snps,dw-apb-uart";
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status = "okay";
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reg = <0x2500400 0x400>;
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dmas = <0x09 0x0f 0x09 0x0f>;
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reg-shift = <0x02>;
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};
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dsi@5450000 {
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phy-names = "dphy";
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clock-names = "bus\0mod";
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resets = <0x04 0x33>;
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interrupts = <0x6c 0x04>;
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clocks = <0x04 0x6f 0x1f 0x02>;
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compatible = "allwinner,sun20i-d1-mipi-dsi\0allwinner,sun50i-a100-mipi-dsi";
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status = "disabled";
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phys = <0x20>;
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reg = <0x5450000 0x1000>;
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port {
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endpoint {
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remote-endpoint = <0x21>;
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phandle = <0x2c>;
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};
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};
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};
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spi@4025000 {
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pinctrl-names = "default";
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#address-cells = <0x01>;
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pinctrl-0 = <0x14>;
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clock-names = "ahb\0mod";
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resets = <0x04 0x1c>;
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interrupts = <0x1f 0x04>;
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clocks = <0x04 0x4a 0x04 0x48>;
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#size-cells = <0x00>;
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dma-names = "rx\0tx";
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compatible = "allwinner,sun20i-d1-spi\0allwinner,sun50i-r329-spi";
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status = "okay";
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reg = <0x4025000 0x1000>;
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dmas = <0x09 0x16 0x09 0x16>;
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flash@0 {
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compatible = "spi-nand";
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reg = <0x00>;
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partitions {
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#address-cells = <0x01>;
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#size-cells = <0x01>;
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compatible = "fixed-partitions";
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partition@100000 {
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label = "uboot";
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reg = <0x100000 0x300000>;
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};
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partition@0 {
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label = "boot0";
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reg = <0x00 0x100000>;
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};
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partition@500000 {
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label = "sys";
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reg = <0x500000 0xfb00000>;
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};
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partition@400000 {
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label = "secure_storage";
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reg = <0x400000 0x100000>;
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};
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};
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};
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};
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watchdog@1700400 {
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clock-names = "hosc\0losc";
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interrupts = <0x8a 0x04>;
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clocks = <0x05 0x06 0x00>;
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compatible = "allwinner,sun20i-d1-wdt";
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status = "reserved";
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reg = <0x1700400 0x20>;
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};
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dram-controller@3102000 {
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dma-ranges = <0x00 0x40000000 0x80000000>;
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#address-cells = <0x01>;
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clock-names = "mbus\0dram\0bus";
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reg-names = "mbus\0dram";
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interrupts = <0x3b 0x04>;
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clocks = <0x04 0x1a 0x04 0x2f 0x04 0x37>;
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#interconnect-cells = <0x01>;
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#size-cells = <0x01>;
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compatible = "allwinner,sun20i-d1-mbus";
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reg = <0x3102000 0x1000 0x3103000 0x1000>;
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};
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i2s@2032000 {
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clock-names = "apb\0mod";
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resets = <0x04 0x22>;
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interrupts = <0x2a 0x04>;
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clocks = <0x04 0x56 0x04 0x52>;
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dma-names = "rx\0tx";
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#sound-dai-cells = <0x00>;
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compatible = "allwinner,sun20i-d1-i2s\0allwinner,sun50i-r329-i2s";
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status = "disabled";
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reg = <0x2032000 0x1000>;
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dmas = <0x09 0x03 0x09 0x03>;
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};
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interrupt-controller@10000000 {
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#address-cells = <0x00>;
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interrupts-extended = <0x31 0x0b 0x31 0x09>;
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compatible = "allwinner,sun20i-d1-plic\0thead,c900-plic";
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#interrupt-cells = <0x02>;
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reg = <0x10000000 0x4000000>;
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phandle = <0x03>;
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riscv,ndev = <0xaf>;
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interrupt-controller;
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};
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clock-controller@7010000 {
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#reset-cells = <0x01>;
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clock-names = "hosc\0losc\0iosc\0pll-periph";
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clocks = <0x05 0x06 0x00 0x06 0x02 0x04 0x06>;
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#clock-cells = <0x01>;
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compatible = "allwinner,sun20i-d1-r-ccu";
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reg = <0x7010000 0x400>;
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phandle = <0x30>;
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};
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clock-controller@2001000 {
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#reset-cells = <0x01>;
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clock-names = "hosc\0losc\0iosc";
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clocks = <0x05 0x06 0x00 0x06 0x02>;
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#clock-cells = <0x01>;
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compatible = "allwinner,sun20i-d1-ccu";
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reg = <0x2001000 0x1000>;
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phandle = <0x04>;
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};
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ethernet@4500000 {
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syscon = <0x19>;
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pinctrl-names = "default";
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phy-supply = <0x07>;
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phy-mode = "rgmii-id";
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pinctrl-0 = <0x1a>;
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clock-names = "stmmaceth";
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local-mac-address = [56 4a 5f a7 32 14];
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resets = <0x04 0x1e>;
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interrupts = <0x3e 0x04>;
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clocks = <0x04 0x4d>;
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compatible = "allwinner,sun20i-d1-emac\0allwinner,sun50i-a64-emac";
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status = "okay";
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interrupt-names = "macirq";
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reg = <0x4500000 0x10000>;
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phy-handle = <0x1b>;
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reset-names = "stmmaceth";
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mdio {
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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compatible = "snps,dwmac-mdio";
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ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <0x01>;
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phandle = <0x1b>;
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};
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};
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};
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serial@2500c00 {
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reg-io-width = <0x04>;
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resets = <0x04 0x15>;
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interrupts = <0x15 0x04>;
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clocks = <0x04 0x41>;
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dma-names = "tx\0rx";
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compatible = "snps,dw-apb-uart";
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status = "disabled";
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reg = <0x2500c00 0x400>;
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dmas = <0x09 0x11 0x09 0x11>;
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reg-shift = <0x02>;
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};
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pwm@2000c00 {
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pinctrl-names = "default";
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pinctrl-0 = <0x08>;
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clock-names = "bus\0hosc\0apb0";
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resets = <0x04 0x0d>;
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clocks = <0x04 0x2d 0x05 0x04 0x18>;
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#pwm-cells = <0x03>;
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compatible = "allwinner,sun20i-d1-pwm";
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status = "okay";
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reg = <0x2000c00 0x400>;
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phandle = <0x41>;
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};
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temperature-sensor@2009400 {
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vref-supply = <0x38>;
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nvmem-cells = <0x37>;
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clock-names = "bus\0mod";
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resets = <0x04 0x21>;
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interrupts = <0x4a 0x04>;
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clocks = <0x04 0x51 0x05>;
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#thermal-sensor-cells = <0x00>;
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compatible = "allwinner,sun20i-d1-ths";
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nvmem-cell-names = "calibration";
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reg = <0x2009400 0x400>;
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phandle = <0x3d>;
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};
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usb@4200400 {
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phy-names = "usb";
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resets = <0x04 0x2b>;
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interrupts = <0x32 0x04>;
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clocks = <0x04 0x64 0x04 0x62>;
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compatible = "allwinner,sun20i-d1-ohci\0generic-ohci";
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status = "okay";
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phys = <0x16 0x01>;
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reg = <0x4200400 0x100>;
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};
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power-controller@7001000 {
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resets = <0x30 0x02>;
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clocks = <0x30 0x04>;
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#power-domain-cells = <0x01>;
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compatible = "allwinner,sun20i-d1-ppu";
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reg = <0x7001000 0x1000>;
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};
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usb@4101000 {
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phy-names = "usb";
|
|
resets = <0x04 0x2a 0x04 0x2c>;
|
|
interrupts = <0x2e 0x04>;
|
|
clocks = <0x04 0x63 0x04 0x65 0x04 0x61>;
|
|
compatible = "allwinner,sun20i-d1-ehci\0generic-ehci";
|
|
status = "okay";
|
|
phys = <0x16 0x00>;
|
|
reg = <0x4101000 0x100>;
|
|
};
|
|
|
|
serial@2500000 {
|
|
reg-io-width = <0x04>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x0a>;
|
|
resets = <0x04 0x12>;
|
|
interrupts = <0x12 0x04>;
|
|
clocks = <0x04 0x3e>;
|
|
dma-names = "tx\0rx";
|
|
compatible = "snps,dw-apb-uart";
|
|
status = "okay";
|
|
reg = <0x2500000 0x400>;
|
|
dmas = <0x09 0x0e 0x09 0x0e>;
|
|
reg-shift = <0x02>;
|
|
};
|
|
|
|
efuse@3006000 {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x01>;
|
|
compatible = "allwinner,sun20i-d1-sid";
|
|
reg = <0x3006000 0x1000>;
|
|
|
|
bg-trim@28 {
|
|
bits = <0x10 0x08>;
|
|
reg = <0x28 0x04>;
|
|
phandle = <0x3a>;
|
|
};
|
|
|
|
ths-calib@14 {
|
|
reg = <0x14 0x04>;
|
|
phandle = <0x37>;
|
|
};
|
|
};
|
|
|
|
mmc@4021000 {
|
|
pinctrl-names = "default";
|
|
#address-cells = <0x01>;
|
|
pinctrl-0 = <0x13>;
|
|
clock-names = "ahb\0mmc";
|
|
cap-sd-highspeed;
|
|
vqmmc-supply = <0x07>;
|
|
no-mmc;
|
|
bus-width = <0x04>;
|
|
non-removable;
|
|
resets = <0x04 0x10>;
|
|
interrupts = <0x39 0x04>;
|
|
clocks = <0x04 0x3c 0x04 0x39>;
|
|
#size-cells = <0x00>;
|
|
vmmc-supply = <0x07>;
|
|
compatible = "allwinner,sun20i-d1-mmc";
|
|
status = "okay";
|
|
mmc-pwrseq = <0x12>;
|
|
reg = <0x4021000 0x1000>;
|
|
max-frequency = <0x8f0d180>;
|
|
reset-names = "ahb";
|
|
|
|
wifi@1 {
|
|
interrupts = <0x06 0x0a 0x08>;
|
|
interrupt-parent = <0x0e>;
|
|
interrupt-names = "host-wake";
|
|
reg = <0x01>;
|
|
};
|
|
};
|
|
|
|
clock-controller@5000000 {
|
|
#reset-cells = <0x01>;
|
|
clock-names = "bus\0mod";
|
|
resets = <0x04 0x01>;
|
|
clocks = <0x04 0x1c 0x04 0x1b>;
|
|
#clock-cells = <0x01>;
|
|
compatible = "allwinner,sun20i-d1-de2-clk\0allwinner,sun50i-h5-de2-clk";
|
|
reg = <0x5000000 0x10000>;
|
|
phandle = <0x1c>;
|
|
};
|
|
|
|
lcd-controller@5470000 {
|
|
clock-names = "ahb\0tcon-ch1";
|
|
resets = <0x04 0x35>;
|
|
interrupts = <0x6b 0x04>;
|
|
clocks = <0x04 0x73 0x1f 0x00>;
|
|
compatible = "allwinner,sun20i-d1-tcon-tv";
|
|
reg = <0x5470000 0x1000>;
|
|
reset-names = "lcd";
|
|
|
|
ports {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
|
|
port@0 {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
reg = <0x00>;
|
|
|
|
endpoint@1 {
|
|
remote-endpoint = <0x2e>;
|
|
reg = <0x01>;
|
|
phandle = <0x27>;
|
|
};
|
|
|
|
endpoint@0 {
|
|
remote-endpoint = <0x2d>;
|
|
reg = <0x00>;
|
|
phandle = <0x24>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <0x01>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x2f>;
|
|
phandle = <0x28>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
i2s@2034000 {
|
|
clock-names = "apb\0mod";
|
|
resets = <0x04 0x24>;
|
|
interrupts = <0x2c 0x04>;
|
|
clocks = <0x04 0x58 0x04 0x54>;
|
|
dma-names = "rx\0tx";
|
|
#sound-dai-cells = <0x00>;
|
|
compatible = "allwinner,sun20i-d1-i2s\0allwinner,sun50i-r329-i2s";
|
|
status = "disabled";
|
|
reg = <0x2034000 0x1000>;
|
|
dmas = <0x09 0x05 0x09 0x05>;
|
|
};
|
|
|
|
usb@4200000 {
|
|
phy-names = "usb";
|
|
resets = <0x04 0x2b 0x04 0x2d>;
|
|
interrupts = <0x31 0x04>;
|
|
clocks = <0x04 0x64 0x04 0x66 0x04 0x62>;
|
|
compatible = "allwinner,sun20i-d1-ehci\0generic-ehci";
|
|
status = "okay";
|
|
phys = <0x16 0x01>;
|
|
reg = <0x4200000 0x100>;
|
|
};
|
|
|
|
rtc@7090000 {
|
|
clock-names = "bus\0hosc\0ahb";
|
|
interrupts = <0xa0 0x04>;
|
|
clocks = <0x30 0x07 0x05 0x30 0x00>;
|
|
#clock-cells = <0x01>;
|
|
compatible = "allwinner,sun20i-d1-rtc\0allwinner,sun50i-r329-rtc";
|
|
reg = <0x7090000 0x400>;
|
|
phandle = <0x06>;
|
|
};
|
|
|
|
i2c@2502800 {
|
|
pinctrl-names = "default";
|
|
#address-cells = <0x01>;
|
|
pinctrl-0 = <0x0d>;
|
|
resets = <0x04 0x1a>;
|
|
interrupts = <0x1b 0x04>;
|
|
clocks = <0x04 0x46>;
|
|
#size-cells = <0x00>;
|
|
dma-names = "rx\0tx";
|
|
compatible = "allwinner,sun20i-d1-i2c\0allwinner,sun8i-v536-i2c\0allwinner,sun6i-a31-i2c";
|
|
status = "okay";
|
|
reg = <0x2502800 0x400>;
|
|
dmas = <0x09 0x2d 0x09 0x2d>;
|
|
|
|
gpio@38 {
|
|
gpio-controller;
|
|
gpio-line-names = "pin13 [gpio8]\0pin16 [gpio10]\0pin18 [gpio11]\0pin26 [gpio17]\0pin22 [gpio14]\0pin28 [gpio19]\0pin37 [gpio23]\0pin11 [gpio6]";
|
|
interrupts = <0x01 0x02 0x08>;
|
|
interrupt-parent = <0x0e>;
|
|
compatible = "nxp,pcf8574a";
|
|
#interrupt-cells = <0x02>;
|
|
reg = <0x38>;
|
|
#gpio-cells = <0x02>;
|
|
interrupt-controller;
|
|
};
|
|
};
|
|
|
|
timer@2050000 {
|
|
interrupts = <0x4b 0x04 0x4c 0x04>;
|
|
clocks = <0x05>;
|
|
compatible = "allwinner,sun20i-d1-timer\0allwinner,sun8i-a23-timer";
|
|
reg = <0x2050000 0xa0>;
|
|
};
|
|
|
|
pinctrl@2000000 {
|
|
clock-names = "apb\0hosc\0losc";
|
|
gpio-controller;
|
|
gpio-line-names = "\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0pin5 [gpio2/twi2-sck]\0pin3 [gpio1/twi2-sda]\0\0pin38 [gpio24/i2s2-din]\0pin40 [gpio25/i2s2-dout]\0pin12 [gpio7/i2s-clk]\0pin35 [gpio22/i2s2-lrck]\0\0pin8 [gpio4/uart0-txd]\0pin10 [gpio5/uart0-rxd]\0\0\0pin15 [gpio9]\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0pin31 [gpio21]\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0pin24 [gpio16/spi1-ce0]\0pin23 [gpio15/spi1-clk]\0pin19 [gpio12/spi1-mosi]\0pin21 [gpio13/spi1-miso]\0pin27 [gpio18/spi1-hold]\0pin29 [gpio20/spi1-wp]\0\0\0\0\0\0\0pin7 [gpio3/pwm]";
|
|
interrupts = <0x55 0x04 0x57 0x04 0x59 0x04 0x5b 0x04 0x5d 0x04 0x5f 0x04>;
|
|
clocks = <0x04 0x18 0x05 0x06 0x00>;
|
|
compatible = "allwinner,sun20i-d1-pinctrl";
|
|
#interrupt-cells = <0x03>;
|
|
vcc-pb-supply = <0x07>;
|
|
vcc-pc-supply = <0x07>;
|
|
reg = <0x2000000 0x800>;
|
|
phandle = <0x0e>;
|
|
vcc-pd-supply = <0x07>;
|
|
#gpio-cells = <0x03>;
|
|
vcc-pe-supply = <0x07>;
|
|
vcc-pf-supply = <0x07>;
|
|
vcc-pg-supply = <0x07>;
|
|
interrupt-controller;
|
|
|
|
rgmii-pe-pins {
|
|
function = "emac";
|
|
pins = "PE0\0PE1\0PE2\0PE3\0PE4\0PE5\0PE6\0PE7\0PE8\0PE9\0PE11\0PE12\0PE13\0PE14\0PE15";
|
|
phandle = <0x1a>;
|
|
};
|
|
|
|
uart1-pg8-rts-cts-pins {
|
|
function = "uart1";
|
|
pins = "PG8\0PG9";
|
|
phandle = <0x0c>;
|
|
};
|
|
|
|
can1-pins {
|
|
function = "can1";
|
|
pins = "PB4\0PB5";
|
|
phandle = <0x10>;
|
|
};
|
|
|
|
ledc-pc0-pin {
|
|
function = "ledc";
|
|
pins = "PC0";
|
|
phandle = <0x36>;
|
|
};
|
|
|
|
can0-pins {
|
|
function = "can0";
|
|
pins = "PB2\0PB3";
|
|
phandle = <0x0f>;
|
|
};
|
|
|
|
mmc1-pins {
|
|
function = "mmc1";
|
|
pins = "PG0\0PG1\0PG2\0PG3\0PG4\0PG5";
|
|
phandle = <0x13>;
|
|
};
|
|
|
|
mmc0-pins {
|
|
function = "mmc0";
|
|
pins = "PF0\0PF1\0PF2\0PF3\0PF4\0PF5";
|
|
phandle = <0x11>;
|
|
};
|
|
|
|
uart1-pg6-pins {
|
|
function = "uart1";
|
|
pins = "PG6\0PG7";
|
|
phandle = <0x0b>;
|
|
};
|
|
|
|
uart0-pb8-pins {
|
|
function = "uart0";
|
|
pins = "PB8\0PB9";
|
|
phandle = <0x0a>;
|
|
};
|
|
|
|
spi1-pd-pins {
|
|
function = "spi1";
|
|
pins = "PD10\0PD11\0PD12\0PD13\0PD14\0PD15";
|
|
phandle = <0x15>;
|
|
};
|
|
|
|
spi0-pins {
|
|
function = "spi0";
|
|
pins = "PC2\0PC3\0PC4\0PC5\0PC6\0PC7";
|
|
phandle = <0x14>;
|
|
};
|
|
|
|
pwm0-pd16-pin {
|
|
function = "pwm0";
|
|
pins = "PD16";
|
|
phandle = <0x08>;
|
|
};
|
|
|
|
i2c2-pb0-pins {
|
|
function = "i2c2";
|
|
pins = "PB0\0PB1";
|
|
phandle = <0x0d>;
|
|
};
|
|
};
|
|
|
|
usb@4100000 {
|
|
phy-names = "usb";
|
|
resets = <0x04 0x2e>;
|
|
interrupts = <0x2d 0x04>;
|
|
clocks = <0x04 0x67>;
|
|
extcon = <0x16 0x00>;
|
|
compatible = "allwinner,sun20i-d1-musb\0allwinner,sun8i-a33-musb";
|
|
status = "okay";
|
|
interrupt-names = "mc";
|
|
phys = <0x16 0x00>;
|
|
reg = <0x4100000 0x400>;
|
|
dr_mode = "otg";
|
|
};
|
|
|
|
phy@5451000 {
|
|
clock-names = "bus\0mod";
|
|
resets = <0x04 0x33>;
|
|
interrupts = <0x6c 0x04>;
|
|
clocks = <0x04 0x6f 0x04 0x6e>;
|
|
#phy-cells = <0x00>;
|
|
compatible = "allwinner,sun20i-d1-mipi-dphy\0allwinner,sun50i-a100-mipi-dphy";
|
|
reg = <0x5451000 0x1000>;
|
|
phandle = <0x20>;
|
|
};
|
|
|
|
phy@4100400 {
|
|
usb1_vbus-supply = <0x18>;
|
|
clock-names = "usb0_phy\0usb1_phy";
|
|
reg-names = "phy_ctrl\0pmu0\0pmu1";
|
|
resets = <0x04 0x28 0x04 0x29>;
|
|
clocks = <0x05 0x05>;
|
|
#phy-cells = <0x01>;
|
|
usb0_vbus_det-gpios = <0x0e 0x03 0x14 0x00>;
|
|
compatible = "allwinner,sun20i-d1-usb-phy";
|
|
status = "okay";
|
|
usb0_vbus-supply = <0x17>;
|
|
reg = <0x4100400 0x100 0x4101800 0x100 0x4200800 0x100>;
|
|
phandle = <0x16>;
|
|
reset-names = "usb0_reset\0usb1_reset";
|
|
usb0_id_det-gpios = <0x0e 0x03 0x15 0x00>;
|
|
};
|
|
|
|
mmc@4020000 {
|
|
pinctrl-names = "default";
|
|
#address-cells = <0x01>;
|
|
pinctrl-0 = <0x11>;
|
|
clock-names = "ahb\0mmc";
|
|
cap-sd-highspeed;
|
|
vqmmc-supply = <0x07>;
|
|
no-mmc;
|
|
bus-width = <0x04>;
|
|
resets = <0x04 0x0f>;
|
|
interrupts = <0x38 0x04>;
|
|
clocks = <0x04 0x3b 0x04 0x38>;
|
|
#size-cells = <0x00>;
|
|
vmmc-supply = <0x07>;
|
|
compatible = "allwinner,sun20i-d1-mmc";
|
|
status = "okay";
|
|
disable-wp;
|
|
reg = <0x4020000 0x1000>;
|
|
max-frequency = <0x8f0d180>;
|
|
reset-names = "ahb";
|
|
cd-gpios = <0x0e 0x05 0x06 0x00>;
|
|
};
|
|
|
|
watchdog@6011000 {
|
|
clock-names = "hosc\0losc";
|
|
interrupts = <0x93 0x04>;
|
|
clocks = <0x05 0x06 0x00>;
|
|
compatible = "allwinner,sun20i-d1-wdt";
|
|
reg = <0x6011000 0x20>;
|
|
};
|
|
|
|
dma-controller@3002000 {
|
|
clock-names = "bus\0mbus";
|
|
resets = <0x04 0x06>;
|
|
interrupts = <0x42 0x04>;
|
|
clocks = <0x04 0x25 0x04 0x30>;
|
|
dma-requests = <0x30>;
|
|
compatible = "allwinner,sun20i-d1-dma";
|
|
reg = <0x3002000 0x1000>;
|
|
phandle = <0x09>;
|
|
dma-channels = <0x10>;
|
|
#dma-cells = <0x01>;
|
|
};
|
|
|
|
tcon-top@5460000 {
|
|
clock-output-names = "tcon-top-tv0\0tcon-top-dsi";
|
|
clock-names = "bus\0tcon-tv0\0tve0\0dsi";
|
|
resets = <0x04 0x30>;
|
|
clocks = <0x04 0x69 0x04 0x72 0x04 0x74 0x04 0x70>;
|
|
#clock-cells = <0x01>;
|
|
compatible = "allwinner,sun20i-d1-tcon-top";
|
|
reg = <0x5460000 0x1000>;
|
|
phandle = <0x1f>;
|
|
|
|
ports {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
|
|
port@0 {
|
|
reg = <0x00>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x22>;
|
|
phandle = <0x1d>;
|
|
};
|
|
};
|
|
|
|
port@5 {
|
|
reg = <0x05>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x29>;
|
|
phandle = <0x34>;
|
|
};
|
|
};
|
|
|
|
port@3 {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
reg = <0x03>;
|
|
|
|
endpoint@2 {
|
|
remote-endpoint = <0x27>;
|
|
reg = <0x02>;
|
|
phandle = <0x2e>;
|
|
};
|
|
|
|
endpoint@0 {
|
|
remote-endpoint = <0x26>;
|
|
reg = <0x00>;
|
|
phandle = <0x2b>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
reg = <0x01>;
|
|
|
|
endpoint@2 {
|
|
remote-endpoint = <0x24>;
|
|
reg = <0x02>;
|
|
phandle = <0x2d>;
|
|
};
|
|
|
|
endpoint@0 {
|
|
remote-endpoint = <0x23>;
|
|
reg = <0x00>;
|
|
phandle = <0x2a>;
|
|
};
|
|
};
|
|
|
|
port@4 {
|
|
reg = <0x04>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x28>;
|
|
phandle = <0x2f>;
|
|
};
|
|
};
|
|
|
|
port@2 {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
reg = <0x02>;
|
|
|
|
endpoint@1 {
|
|
remote-endpoint = <0x25>;
|
|
reg = <0x01>;
|
|
phandle = <0x1e>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
serial@2501400 {
|
|
reg-io-width = <0x04>;
|
|
resets = <0x04 0x17>;
|
|
interrupts = <0x17 0x04>;
|
|
clocks = <0x04 0x43>;
|
|
dma-names = "tx\0rx";
|
|
compatible = "snps,dw-apb-uart";
|
|
status = "disabled";
|
|
reg = <0x2501400 0x400>;
|
|
dmas = <0x09 0x13 0x09 0x13>;
|
|
reg-shift = <0x02>;
|
|
};
|
|
|
|
spi@4026000 {
|
|
pinctrl-names = "default";
|
|
#address-cells = <0x01>;
|
|
pinctrl-0 = <0x15>;
|
|
clock-names = "ahb\0mod";
|
|
resets = <0x04 0x1d>;
|
|
interrupts = <0x20 0x04>;
|
|
clocks = <0x04 0x4b 0x04 0x49>;
|
|
#size-cells = <0x00>;
|
|
dma-names = "rx\0tx";
|
|
compatible = "allwinner,sun20i-d1-spi-dbi\0allwinner,sun50i-r329-spi-dbi\0allwinner,sun50i-r329-spi";
|
|
status = "okay";
|
|
reg = <0x4026000 0x1000>;
|
|
dmas = <0x09 0x17 0x09 0x17>;
|
|
};
|
|
|
|
keys@2009800 {
|
|
vref-supply = <0x38>;
|
|
resets = <0x04 0x2f>;
|
|
interrupts = <0x4d 0x04>;
|
|
clocks = <0x04 0x68>;
|
|
compatible = "allwinner,sun20i-d1-lradc\0allwinner,sun50i-r329-lradc";
|
|
status = "okay";
|
|
reg = <0x2009800 0x400>;
|
|
|
|
button-160 {
|
|
label = "OK";
|
|
channel = <0x00>;
|
|
linux,code = <0x160>;
|
|
voltage = <0x27100>;
|
|
};
|
|
};
|
|
|
|
phy@5510000 {
|
|
clock-names = "bus\0mod";
|
|
resets = <0x04 0x32>;
|
|
clocks = <0x04 0x6d 0x04 0x6a>;
|
|
#phy-cells = <0x00>;
|
|
compatible = "allwinner,sun20i-d1-hdmi-phy";
|
|
status = "okay";
|
|
reg = <0x5510000 0x10000>;
|
|
phandle = <0x32>;
|
|
reset-names = "phy";
|
|
};
|
|
|
|
adc@2009000 {
|
|
resets = <0x04 0x20>;
|
|
interrupts = <0x49 0x04>;
|
|
clocks = <0x04 0x50>;
|
|
#io-channel-cells = <0x01>;
|
|
compatible = "allwinner,sun20i-d1-gpadc";
|
|
status = "disabled";
|
|
reg = <0x2009000 0x400>;
|
|
};
|
|
|
|
i2c@2502400 {
|
|
#address-cells = <0x01>;
|
|
resets = <0x04 0x19>;
|
|
interrupts = <0x1a 0x04>;
|
|
clocks = <0x04 0x45>;
|
|
#size-cells = <0x00>;
|
|
dma-names = "rx\0tx";
|
|
compatible = "allwinner,sun20i-d1-i2c\0allwinner,sun8i-v536-i2c\0allwinner,sun6i-a31-i2c";
|
|
status = "disabled";
|
|
reg = <0x2502400 0x400>;
|
|
dmas = <0x09 0x2c 0x09 0x2c>;
|
|
};
|
|
|
|
i2s@2033000 {
|
|
clock-names = "apb\0mod";
|
|
resets = <0x04 0x23>;
|
|
interrupts = <0x2b 0x04>;
|
|
clocks = <0x04 0x57 0x04 0x53>;
|
|
dma-names = "rx\0tx";
|
|
#sound-dai-cells = <0x00>;
|
|
compatible = "allwinner,sun20i-d1-i2s\0allwinner,sun50i-r329-i2s";
|
|
status = "disabled";
|
|
reg = <0x2033000 0x1000>;
|
|
dmas = <0x09 0x04 0x09 0x04>;
|
|
};
|
|
|
|
lcd-controller@5461000 {
|
|
clock-output-names = "tcon-pixel-clock";
|
|
phy-names = "lvds0";
|
|
clock-names = "ahb\0tcon-ch0";
|
|
resets = <0x04 0x34 0x04 0x36>;
|
|
interrupts = <0x6a 0x04>;
|
|
clocks = <0x04 0x71 0x04 0x70>;
|
|
#clock-cells = <0x00>;
|
|
compatible = "allwinner,sun20i-d1-tcon-lcd";
|
|
phys = <0x20>;
|
|
reg = <0x5461000 0x1000>;
|
|
reset-names = "lcd\0lvds";
|
|
|
|
ports {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
|
|
port@0 {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
reg = <0x00>;
|
|
|
|
endpoint@1 {
|
|
remote-endpoint = <0x2b>;
|
|
reg = <0x01>;
|
|
phandle = <0x26>;
|
|
};
|
|
|
|
endpoint@0 {
|
|
remote-endpoint = <0x2a>;
|
|
reg = <0x00>;
|
|
phandle = <0x23>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
reg = <0x01>;
|
|
|
|
endpoint@1 {
|
|
remote-endpoint = <0x2c>;
|
|
reg = <0x01>;
|
|
phandle = <0x21>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
can@2504400 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x10>;
|
|
resets = <0x04 0x43>;
|
|
interrupts = <0x26 0x04>;
|
|
clocks = <0x04 0x92>;
|
|
compatible = "allwinner,sun20i-d1-can";
|
|
status = "disabled";
|
|
reg = <0x2504400 0x400>;
|
|
};
|
|
|
|
mixer@5200000 {
|
|
clock-names = "bus\0mod";
|
|
resets = <0x1c 0x01>;
|
|
clocks = <0x1c 0x01 0x1c 0x07>;
|
|
compatible = "allwinner,sun20i-d1-de2-mixer-1";
|
|
reg = <0x5200000 0x100000>;
|
|
phandle = <0x02>;
|
|
|
|
ports {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
|
|
port@1 {
|
|
reg = <0x01>;
|
|
|
|
endpoint {
|
|
remote-endpoint = <0x1e>;
|
|
phandle = <0x25>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
audio-codec@2030000 {
|
|
#address-cells = <0x01>;
|
|
clock-names = "bus\0adc\0dac\0hosc\0losc";
|
|
resets = <0x04 0x27>;
|
|
widgets = "Microphone\0Headset Microphone\0Headphone\0Headphone Jack";
|
|
interrupts = <0x29 0x04>;
|
|
clocks = <0x04 0x60 0x04 0x5f 0x04 0x5e 0x05 0x06 0x00>;
|
|
#size-cells = <0x01>;
|
|
routing = "Headphone Jack\0HPOUTL\0Headphone Jack\0HPOUTR\0LINEINL\0HPOUTL\0LINEINR\0HPOUTR\0MICIN3\0Headset Microphone\0Headset Microphone\0HBIAS";
|
|
avcc-supply = <0x38>;
|
|
dma-names = "rx\0tx";
|
|
#sound-dai-cells = <0x00>;
|
|
compatible = "allwinner,sun20i-d1-codec\0simple-mfd\0syscon";
|
|
status = "okay";
|
|
reg = <0x2030000 0x1000>;
|
|
dmas = <0x09 0x07 0x09 0x07>;
|
|
hpvcc-supply = <0x39>;
|
|
|
|
regulators@2030348 {
|
|
nvmem-cells = <0x3a>;
|
|
compatible = "allwinner,sun20i-d1-analog-ldos";
|
|
nvmem-cell-names = "bg_trim";
|
|
reg = <0x2030348 0x04>;
|
|
|
|
hpldo {
|
|
regulator-max-microvolt = <0x1b7740>;
|
|
regulator-min-microvolt = <0x1b7740>;
|
|
phandle = <0x39>;
|
|
hpldoin-supply = <0x07>;
|
|
};
|
|
|
|
aldo {
|
|
regulator-max-microvolt = <0x1b7740>;
|
|
regulator-always-on;
|
|
regulator-min-microvolt = <0x1b7740>;
|
|
phandle = <0x38>;
|
|
vdd33-supply = <0x07>;
|
|
};
|
|
};
|
|
};
|
|
|
|
serial@2500800 {
|
|
reg-io-width = <0x04>;
|
|
resets = <0x04 0x14>;
|
|
interrupts = <0x14 0x04>;
|
|
clocks = <0x04 0x40>;
|
|
dma-names = "tx\0rx";
|
|
compatible = "snps,dw-apb-uart";
|
|
status = "disabled";
|
|
reg = <0x2500800 0x400>;
|
|
dmas = <0x09 0x10 0x09 0x10>;
|
|
reg-shift = <0x02>;
|
|
};
|
|
|
|
led-controller@2008000 {
|
|
pinctrl-names = "default";
|
|
#address-cells = <0x01>;
|
|
pinctrl-0 = <0x36>;
|
|
clock-names = "bus\0mod";
|
|
resets = <0x04 0x3b>;
|
|
interrupts = <0x24 0x04>;
|
|
clocks = <0x04 0x7b 0x04 0x7a>;
|
|
#size-cells = <0x00>;
|
|
dma-names = "tx";
|
|
compatible = "allwinner,sun20i-d1-ledc\0allwinner,sun50i-a100-ledc";
|
|
status = "okay";
|
|
reg = <0x2008000 0x400>;
|
|
dmas = <0x09 0x2a>;
|
|
|
|
multi-led@0 {
|
|
function = "status";
|
|
color = <0x09>;
|
|
reg = <0x00>;
|
|
};
|
|
};
|
|
|
|
i2c@2502c00 {
|
|
#address-cells = <0x01>;
|
|
resets = <0x04 0x1b>;
|
|
interrupts = <0x1c 0x04>;
|
|
clocks = <0x04 0x47>;
|
|
#size-cells = <0x00>;
|
|
dma-names = "rx\0tx";
|
|
compatible = "allwinner,sun20i-d1-i2c\0allwinner,sun8i-v536-i2c\0allwinner,sun6i-a31-i2c";
|
|
status = "disabled";
|
|
reg = <0x2502c00 0x400>;
|
|
dmas = <0x09 0x2e 0x09 0x2e>;
|
|
};
|
|
};
|
|
|
|
usbvbus {
|
|
regulator-max-microvolt = <0x4c4b40>;
|
|
gpio = <0x0e 0x03 0x13 0x00>;
|
|
enable-active-high;
|
|
regulator-min-microvolt = <0x4c4b40>;
|
|
regulator-name = "usbvbus";
|
|
compatible = "regulator-fixed";
|
|
phandle = <0x17>;
|
|
vin-supply = <0x18>;
|
|
};
|
|
|
|
opp-table-cpu {
|
|
compatible = "operating-points-v2";
|
|
phandle = <0x3b>;
|
|
|
|
opp-1080000000 {
|
|
opp-microvolt = <0xdbba0 0xdbba0 0x10c8e0>;
|
|
opp-hz = <0x00 0x3c14dc00>;
|
|
};
|
|
|
|
opp-408000000 {
|
|
opp-microvolt = <0xdbba0 0xdbba0 0x10c8e0>;
|
|
opp-hz = <0x00 0x18519600>;
|
|
};
|
|
};
|
|
|
|
aliases {
|
|
ethernet0 = "/soc/ethernet@4500000";
|
|
spi0 = "/soc/spi@4025000";
|
|
ethernet1 = "/soc/mmc@4021000/wifi@1";
|
|
serial0 = "/soc/serial@2500000";
|
|
};
|
|
|
|
display-engine {
|
|
allwinner,pipelines = <0x01 0x02>;
|
|
compatible = "allwinner,sun20i-d1-display-engine";
|
|
status = "okay";
|
|
};
|
|
|
|
chosen {
|
|
linux,uefi-mmap-size = <0x6b8>;
|
|
u-boot,version = "2024.01-rc1";
|
|
bootargs = "BOOT_IMAGE=/boot/vmlinuz-6.8.0-31-generic root=LABEL=cloudimg-rootfs ro efi=debug earlycon";
|
|
boot-hartid = <0x00>;
|
|
linux,uefi-mmap-start = <0x00 0x77e32068>;
|
|
linux,uefi-mmap-desc-size = <0x28>;
|
|
linux,uefi-mmap-desc-ver = <0x01>;
|
|
linux,uefi-secure-boot = <0x02>;
|
|
linux,uefi-system-table = <0x00 0x7ff59d38>;
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
vcc-3v3 {
|
|
regulator-max-microvolt = <0x325aa0>;
|
|
regulator-min-microvolt = <0x325aa0>;
|
|
regulator-name = "vcc-3v3";
|
|
compatible = "regulator-fixed";
|
|
phandle = <0x07>;
|
|
vin-supply = <0x18>;
|
|
};
|
|
|
|
vcc {
|
|
regulator-max-microvolt = <0x4c4b40>;
|
|
regulator-min-microvolt = <0x4c4b40>;
|
|
regulator-name = "vcc";
|
|
compatible = "regulator-fixed";
|
|
phandle = <0x18>;
|
|
};
|
|
|
|
pmu {
|
|
riscv,event-to-mhpmcounters = <0x03 0x03 0x08 0x04 0x04 0x10 0x05 0x05 0x200 0x06 0x06 0x100 0x10000 0x10000 0x4000 0x10001 0x10001 0x8000 0x10002 0x10002 0x10000 0x10003 0x10003 0x20000 0x10019 0x10019 0x40 0x10021 0x10021 0x20>;
|
|
riscv,raw-event-to-mhpmcounters = <0x00 0x01 0xffffffff 0xffffffff 0x08 0x00 0x02 0xffffffff 0xffffffff 0x10 0x00 0x03 0xffffffff 0xffffffff 0x20 0x00 0x04 0xffffffff 0xffffffff 0x40 0x00 0x05 0xffffffff 0xffffffff 0x80 0x00 0x06 0xffffffff 0xffffffff 0x100 0x00 0x07 0xffffffff 0xffffffff 0x200 0x00 0x0b 0xffffffff 0xffffffff 0x2000 0x00 0x0c 0xffffffff 0xffffffff 0x4000 0x00 0x0d 0xffffffff 0xffffffff 0x8000 0x00 0x0e 0xffffffff 0xffffffff 0x10000 0x00 0x0f 0xffffffff 0xffffffff 0x20000>;
|
|
compatible = "riscv,pmu";
|
|
riscv,event-to-mhpmevent = <0x03 0x00 0x01 0x04 0x00 0x02 0x05 0x00 0x07 0x06 0x00 0x06 0x10000 0x00 0x0c 0x10001 0x00 0x0d 0x10002 0x00 0x0e 0x10003 0x00 0x0f 0x10019 0x00 0x04 0x10021 0x00 0x03>;
|
|
};
|
|
|
|
dcxo-clk {
|
|
clock-output-names = "dcxo";
|
|
#clock-cells = <0x00>;
|
|
clock-frequency = <0x16e3600>;
|
|
compatible = "fixed-clock";
|
|
phandle = <0x05>;
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
timebase-frequency = <0x16e3600>;
|
|
|
|
cpu@0 {
|
|
cpu-supply = <0x3c>;
|
|
clocks = <0x04 0x84>;
|
|
d-cache-block-size = <0x40>;
|
|
device_type = "cpu";
|
|
compatible = "thead,c906\0riscv";
|
|
mmu-type = "riscv,sv39";
|
|
d-cache-size = <0x8000>;
|
|
riscv,isa-base = "rv64i";
|
|
i-cache-size = <0x8000>;
|
|
riscv,isa-extensions = "i\0m\0a\0f\0d\0c\0zicntr\0zicsr\0zifencei\0zihpm";
|
|
reg = <0x00>;
|
|
phandle = <0x3f>;
|
|
d-cache-sets = <0x100>;
|
|
i-cache-block-size = <0x40>;
|
|
operating-points-v2 = <0x3b>;
|
|
i-cache-sets = <0x80>;
|
|
riscv,isa = "rv64imafdc";
|
|
#cooling-cells = <0x02>;
|
|
|
|
interrupt-controller {
|
|
compatible = "riscv,cpu-intc";
|
|
#interrupt-cells = <0x01>;
|
|
phandle = <0x31>;
|
|
interrupt-controller;
|
|
};
|
|
};
|
|
};
|
|
|
|
reserved-memory {
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x01>;
|
|
ranges;
|
|
|
|
mmode_resv0@40040000 {
|
|
reg = <0x40040000 0x20000>;
|
|
phandle = <0x43>;
|
|
no-map;
|
|
};
|
|
|
|
mmode_resv1@40000000 {
|
|
reg = <0x40000000 0x40000>;
|
|
phandle = <0x42>;
|
|
no-map;
|
|
};
|
|
};
|
|
};
|