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SiFive Composable cache is a L3 share cache of the core complex. Add this driver to support the share cache maintenance operations via the MMIO registers. Co-developed-by: Samuel Holland <samuel.holland@sifive.com> Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Co-developed-by: Nick Hu <nick.hu@sifive.com> Signed-off-by: Nick Hu <nick.hu@sifive.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20251020-cache-upstream-v7-3-69a132447d8a@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org>
24 lines
312 B
Plaintext
24 lines
312 B
Plaintext
# SPDX-License-Identifier: BSD-2-Clause
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menu "Cache Support"
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config FDT_CACHE
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bool "FDT based cache drivers"
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depends on FDT
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select CACHE
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default n
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if FDT_CACHE
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config FDT_CACHE_SIFIVE_CCACHE
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bool "SiFive CCACHE FDT cache driver"
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default n
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endif
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config CACHE
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bool "Cache support"
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default n
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endmenu
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