mirror of
https://github.com/riscv-software-src/opensbi
synced 2025-11-04 05:50:22 +00:00
5b9960379f
Currently, the ACLINT MSWI size check is forcing size to be at least 0x4000. This is inappropriate check because most systems will never utilize full 16KB for a single ACLINT MSWI device so instead we should check that ACLINT MSWI size is enough for on the associated HARTs. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Dong Du <Dd_nirvana@sjtu.edu.cn> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
101 lines
2.3 KiB
C
101 lines
2.3 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2021 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_atomic.h>
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#include <sbi/riscv_io.h>
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#include <sbi/sbi_domain.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_hartmask.h>
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#include <sbi/sbi_ipi.h>
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#include <sbi/sbi_timer.h>
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#include <sbi_utils/ipi/aclint_mswi.h>
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static struct aclint_mswi_data *mswi_hartid2data[SBI_HARTMASK_MAX_BITS];
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static void mswi_ipi_send(u32 target_hart)
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{
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u32 *msip;
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struct aclint_mswi_data *mswi;
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if (SBI_HARTMASK_MAX_BITS <= target_hart)
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return;
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mswi = mswi_hartid2data[target_hart];
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if (!mswi)
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return;
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/* Set ACLINT IPI */
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msip = (void *)mswi->addr;
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writel(1, &msip[target_hart - mswi->first_hartid]);
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}
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static void mswi_ipi_clear(u32 target_hart)
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{
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u32 *msip;
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struct aclint_mswi_data *mswi;
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if (SBI_HARTMASK_MAX_BITS <= target_hart)
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return;
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mswi = mswi_hartid2data[target_hart];
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if (!mswi)
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return;
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/* Clear ACLINT IPI */
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msip = (void *)mswi->addr;
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writel(0, &msip[target_hart - mswi->first_hartid]);
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}
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static struct sbi_ipi_device aclint_mswi = {
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.name = "aclint-mswi",
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.ipi_send = mswi_ipi_send,
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.ipi_clear = mswi_ipi_clear
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};
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int aclint_mswi_warm_init(void)
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{
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/* Clear IPI for current HART */
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mswi_ipi_clear(current_hartid());
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return 0;
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}
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int aclint_mswi_cold_init(struct aclint_mswi_data *mswi)
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{
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u32 i;
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int rc;
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unsigned long pos, region_size;
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struct sbi_domain_memregion reg;
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/* Sanity checks */
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if (!mswi || (mswi->addr & (ACLINT_MSWI_ALIGN - 1)) ||
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(mswi->size < (mswi->hart_count * sizeof(u32))) ||
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(mswi->first_hartid >= SBI_HARTMASK_MAX_BITS) ||
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(mswi->hart_count > ACLINT_MSWI_MAX_HARTS))
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return SBI_EINVAL;
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/* Update MSWI hartid table */
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for (i = 0; i < mswi->hart_count; i++)
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mswi_hartid2data[mswi->first_hartid + i] = mswi;
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/* Add MSWI regions to the root domain */
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for (pos = 0; pos < mswi->size; pos += ACLINT_MSWI_ALIGN) {
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region_size = ((mswi->size - pos) < ACLINT_MSWI_ALIGN) ?
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(mswi->size - pos) : ACLINT_MSWI_ALIGN;
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sbi_domain_memregion_init(mswi->addr + pos, region_size,
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SBI_DOMAIN_MEMREGION_MMIO, ®);
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rc = sbi_domain_root_add_memregion(®);
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if (rc)
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return rc;
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}
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sbi_ipi_set_device(&aclint_mswi);
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return 0;
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}
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