mirror of
https://github.com/riscv-software-src/opensbi
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1207c7568f
The current RISC-V CMO only defines how to flush a cache block. However, certain use cases, such as power management, may require flushing the entire cache. Therefore, a framework is being introduced to allow vendors to flush the entire cache using their own methods. Signed-off-by: Nick Hu <nick.hu@sifive.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20251020-cache-upstream-v7-1-69a132447d8a@sifive.com Signed-off-by: Anup Patel <anup@brainfault.org>
47 lines
740 B
C
47 lines
740 B
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2025 SiFive Inc.
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*/
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#include <sbi/sbi_error.h>
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#include <sbi_utils/cache/cache.h>
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static SBI_LIST_HEAD(cache_list);
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struct cache_device *cache_find(u32 id)
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{
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struct cache_device *dev;
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sbi_list_for_each_entry(dev, &cache_list, node) {
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if (dev->id == id)
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return dev;
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}
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return NULL;
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}
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int cache_add(struct cache_device *dev)
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{
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if (!dev)
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return SBI_ENODEV;
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if (cache_find(dev->id))
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return SBI_EALREADY;
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sbi_list_add(&dev->node, &cache_list);
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return SBI_OK;
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}
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int cache_flush_all(struct cache_device *dev)
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{
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if (!dev)
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return SBI_ENODEV;
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if (!dev->ops || !dev->ops->cache_flush_all)
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return SBI_ENOTSUPP;
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return dev->ops->cache_flush_all(dev);
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}
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