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	We extend all PLIC functions to have a "struct plic_data *" parameter pointing to PLIC details. This allows platforms to use these functions for multiple PLIC instances. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
		
			
				
	
	
		
			101 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			101 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * SPDX-License-Identifier: BSD-2-Clause
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|  *
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|  * Copyright (c) 2019 Western Digital Corporation or its affiliates.
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|  *
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|  * Authors:
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|  *   Anup Patel <anup.patel@wdc.com>
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|  */
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| 
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| #include <sbi/riscv_io.h>
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| #include <sbi/riscv_encoding.h>
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| #include <sbi/sbi_console.h>
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| #include <sbi/sbi_error.h>
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| #include <sbi/sbi_string.h>
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| #include <sbi_utils/irqchip/plic.h>
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| 
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| #define PLIC_PRIORITY_BASE 0x0
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| #define PLIC_PENDING_BASE 0x1000
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| #define PLIC_ENABLE_BASE 0x2000
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| #define PLIC_ENABLE_STRIDE 0x80
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| #define PLIC_CONTEXT_BASE 0x200000
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| #define PLIC_CONTEXT_STRIDE 0x1000
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| 
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| static void plic_set_priority(struct plic_data *plic, u32 source, u32 val)
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| {
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| 	volatile void *plic_priority = (void *)plic->addr +
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| 			PLIC_PRIORITY_BASE + 4 * source;
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| 	writel(val, plic_priority);
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| }
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| 
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| void plic_set_thresh(struct plic_data *plic, u32 cntxid, u32 val)
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| {
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| 	volatile void *plic_thresh;
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| 
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| 	if (!plic)
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| 		return;
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| 
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| 	plic_thresh = (void *)plic->addr +
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| 		      PLIC_CONTEXT_BASE + PLIC_CONTEXT_STRIDE * cntxid;
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| 	writel(val, plic_thresh);
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| }
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| 
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| void plic_set_ie(struct plic_data *plic, u32 cntxid, u32 word_index, u32 val)
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| {
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| 	volatile void *plic_ie;
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| 
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| 	if (!plic)
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| 		return;
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| 
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| 	plic_ie = (void *)plic->addr +
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| 		   PLIC_ENABLE_BASE + PLIC_ENABLE_STRIDE * cntxid;
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| 	writel(val, plic_ie + word_index * 4);
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| }
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| 
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| int plic_warm_irqchip_init(struct plic_data *plic,
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| 			   int m_cntx_id, int s_cntx_id)
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| {
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| 	size_t i, ie_words;
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| 
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| 	if (!plic)
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| 		return SBI_EINVAL;
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| 
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| 	ie_words = plic->num_src / 32 + 1;
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| 
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| 	/* By default, disable all IRQs for M-mode of target HART */
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| 	if (m_cntx_id > -1) {
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| 		for (i = 0; i < ie_words; i++)
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| 			plic_set_ie(plic, m_cntx_id, i, 0);
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| 	}
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| 
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| 	/* By default, disable all IRQs for S-mode of target HART */
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| 	if (s_cntx_id > -1) {
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| 		for (i = 0; i < ie_words; i++)
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| 			plic_set_ie(plic, s_cntx_id, i, 0);
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| 	}
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| 
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| 	/* By default, disable M-mode threshold */
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| 	if (m_cntx_id > -1)
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| 		plic_set_thresh(plic, m_cntx_id, 0x7);
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| 
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| 	/* By default, disable S-mode threshold */
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| 	if (s_cntx_id > -1)
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| 		plic_set_thresh(plic, s_cntx_id, 0x7);
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| 
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| 	return 0;
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| }
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| 
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| int plic_cold_irqchip_init(struct plic_data *plic)
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| {
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| 	int i;
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| 
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| 	if (!plic)
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| 		return SBI_EINVAL;
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| 
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| 	/* Configure default priorities of all IRQs */
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| 	for (i = 1; i <= plic->num_src; i++)
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| 		plic_set_priority(plic, i, 0);
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| 
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| 	return 0;
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| }
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