mirror of
https://github.com/riscv-software-src/opensbi
synced 2025-11-04 05:50:22 +00:00
d30bb68448
We can have multiple matching DT nodes of the same FDT irqchip driver so in this case we should call cold_init() for all matching DT nodes instead of just first matching DT node. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
121 lines
2.7 KiB
C
121 lines
2.7 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2020 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <libfdt.h>
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#include <sbi/riscv_asm.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_hartmask.h>
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#include <sbi_utils/fdt/fdt_helper.h>
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#include <sbi_utils/irqchip/fdt_irqchip.h>
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#include <sbi_utils/irqchip/plic.h>
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#define PLIC_MAX_NR 16
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static unsigned long plic_count = 0;
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static struct plic_data plic[PLIC_MAX_NR];
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static struct plic_data *plic_hartid2data[SBI_HARTMASK_MAX_BITS];
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static int plic_hartid2context[SBI_HARTMASK_MAX_BITS][2];
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static int irqchip_plic_warm_init(void)
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{
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u32 hartid = current_hartid();
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return plic_warm_irqchip_init(plic_hartid2data[hartid],
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plic_hartid2context[hartid][0],
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plic_hartid2context[hartid][1]);
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}
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static int irqchip_plic_update_hartid_table(void *fdt, int nodeoff,
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struct plic_data *pd)
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{
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const fdt32_t *val;
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u32 phandle, hwirq, hartid;
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int i, err, count, cpu_offset, cpu_intc_offset;
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val = fdt_getprop(fdt, nodeoff, "interrupts-extended", &count);
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if (!val || count < sizeof(fdt32_t))
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return SBI_EINVAL;
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count = count / sizeof(fdt32_t);
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for (i = 0; i < count; i += 2) {
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phandle = fdt32_to_cpu(val[i]);
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hwirq = fdt32_to_cpu(val[i + 1]);
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cpu_intc_offset = fdt_node_offset_by_phandle(fdt, phandle);
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if (cpu_intc_offset < 0)
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continue;
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cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset);
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if (cpu_intc_offset < 0)
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continue;
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err = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
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if (err)
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continue;
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if (SBI_HARTMASK_MAX_BITS <= hartid)
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continue;
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plic_hartid2data[hartid] = pd;
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switch (hwirq) {
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case IRQ_M_EXT:
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plic_hartid2context[hartid][0] = i / 2;
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break;
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case IRQ_S_EXT:
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plic_hartid2context[hartid][1] = i / 2;
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break;
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}
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}
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return 0;
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}
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static int irqchip_plic_cold_init(void *fdt, int nodeoff,
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const struct fdt_match *match)
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{
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int i, rc;
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struct plic_data *pd;
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if (PLIC_MAX_NR <= plic_count)
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return SBI_ENOSPC;
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pd = &plic[plic_count++];
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rc = fdt_parse_plic_node(fdt, nodeoff, pd);
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if (rc)
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return rc;
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rc = plic_cold_irqchip_init(pd);
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if (rc)
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return rc;
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if (plic_count == 1) {
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for (i = 0; i < SBI_HARTMASK_MAX_BITS; i++) {
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plic_hartid2data[i] = NULL;
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plic_hartid2context[i][0] = -1;
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plic_hartid2context[i][1] = -1;
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}
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}
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return irqchip_plic_update_hartid_table(fdt, nodeoff, pd);
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}
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static const struct fdt_match irqchip_plic_match[] = {
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{ .compatible = "riscv,plic0" },
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{ .compatible = "sifive,plic-1.0.0" },
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{ },
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};
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struct fdt_irqchip fdt_irqchip_plic = {
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.match_table = irqchip_plic_match,
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.cold_init = irqchip_plic_cold_init,
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.warm_init = irqchip_plic_warm_init,
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.exit = NULL,
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};
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