mirror of
https://github.com/riscv-software-src/opensbi
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823345ecae
The sbi_current_hartid() being a regular function is quite expensive because for callers it is a function call instead of a direct CSR read. This patch converts sbi_current_hartid() into a macro in riscv_asm.h. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
160 lines
3.3 KiB
C
160 lines
3.3 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_atomic.h>
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#include <sbi/riscv_io.h>
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#include <sbi_utils/sys/clint.h>
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static u32 clint_ipi_hart_count;
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static volatile void *clint_ipi_base;
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static volatile u32 *clint_ipi;
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void clint_ipi_send(u32 target_hart)
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{
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if (clint_ipi_hart_count <= target_hart)
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return;
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/* Set CLINT IPI */
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writel(1, &clint_ipi[target_hart]);
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}
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void clint_ipi_clear(u32 target_hart)
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{
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if (clint_ipi_hart_count <= target_hart)
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return;
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/* Clear CLINT IPI */
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writel(0, &clint_ipi[target_hart]);
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}
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int clint_warm_ipi_init(void)
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{
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u32 hartid = current_hartid();
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if (!clint_ipi_base)
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return -1;
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/* Clear CLINT IPI */
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clint_ipi_clear(hartid);
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return 0;
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}
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int clint_cold_ipi_init(unsigned long base, u32 hart_count)
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{
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/* Figure-out CLINT IPI register address */
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clint_ipi_hart_count = hart_count;
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clint_ipi_base = (void *)base;
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clint_ipi = (u32 *)clint_ipi_base;
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return 0;
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}
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static u32 clint_time_hart_count;
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static volatile void *clint_time_base;
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static volatile u64 *clint_time_val;
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static volatile u64 *clint_time_cmp;
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#if __riscv_xlen != 32
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static u64 clint_time_rd64(volatile u64 *addr)
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{
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return readq_relaxed(addr);
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}
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static void clint_time_wr64(u64 value, volatile u64 *addr)
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{
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writeq_relaxed(value, addr);
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}
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#endif
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static u64 clint_time_rd32(volatile u64 *addr)
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{
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u32 lo, hi;
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do {
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hi = readl_relaxed((u32 *)addr + 1);
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lo = readl_relaxed((u32 *)addr);
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} while (hi != readl_relaxed((u32 *)addr + 1));
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return ((u64)hi << 32) | (u64)lo;
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}
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static void clint_time_wr32(u64 value, volatile u64 *addr)
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{
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u32 mask = -1U;
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writel_relaxed(value & mask, (void *)(addr));
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writel_relaxed(value >> 32, (void *)(addr) + 0x04);
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}
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static u64 (*clint_time_rd)(volatile u64 *addr) = clint_time_rd32;
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static void (*clint_time_wr)(u64 value, volatile u64 *addr) = clint_time_wr32;
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u64 clint_timer_value(void)
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{
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/* Read CLINT Time Value */
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return clint_time_rd(clint_time_val);
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}
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void clint_timer_event_stop(void)
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{
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u32 target_hart = current_hartid();
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if (clint_time_hart_count <= target_hart)
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return;
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/* Clear CLINT Time Compare */
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clint_time_wr(-1ULL, &clint_time_cmp[target_hart]);
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}
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void clint_timer_event_start(u64 next_event)
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{
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u32 target_hart = current_hartid();
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if (clint_time_hart_count <= target_hart)
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return;
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/* Program CLINT Time Compare */
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clint_time_wr(next_event, &clint_time_cmp[target_hart]);
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}
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int clint_warm_timer_init(void)
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{
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u32 target_hart = current_hartid();
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if (clint_time_hart_count <= target_hart || !clint_time_base)
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return -1;
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/* Clear CLINT Time Compare */
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clint_time_wr(-1ULL, &clint_time_cmp[target_hart]);
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return 0;
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}
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int clint_cold_timer_init(unsigned long base, u32 hart_count,
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bool has_64bit_mmio)
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{
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/* Figure-out CLINT Time register address */
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clint_time_hart_count = hart_count;
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clint_time_base = (void *)base;
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clint_time_val = (u64 *)(clint_time_base + 0xbff8);
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clint_time_cmp = (u64 *)(clint_time_base + 0x4000);
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/* Override read/write accessors for 64bit MMIO */
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#if __riscv_xlen != 32
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if (has_64bit_mmio) {
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clint_time_rd = clint_time_rd64;
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clint_time_wr = clint_time_wr64;
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}
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#endif
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return 0;
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}
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