mirror of
https://github.com/riscv-software-src/opensbi
synced 2025-11-03 21:48:45 +00:00
70a474d2c2
Some older toolchains may not have all the csr's defined. Update all the csr functions to use the CSR_ #define values instead of the toolchain defined values. Suggested-by: Olof Johansson <olof@lixom.net> Signed-off-by: Atish Patra <atish.patra@wdc.com>
74 lines
1.4 KiB
C
74 lines
1.4 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_encoding.h>
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#include <sbi/sbi_platform.h>
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#include <sbi/sbi_timer.h>
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#if __riscv_xlen == 32
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u64 get_ticks(void)
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{
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u32 lo, hi, tmp;
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__asm__ __volatile__ (
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"1:\n"
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"rdtimeh %0\n"
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"rdtime %1\n"
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"rdtimeh %2\n"
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"bne %0, %2, 1b"
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: "=&r" (hi), "=&r" (lo), "=&r" (tmp));
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return ((u64)hi << 32) | lo;
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}
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#else
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u64 get_ticks(void)
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{
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unsigned long n;
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__asm__ __volatile__ (
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"rdtime %0"
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: "=r" (n));
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return n;
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}
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#endif
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u64 sbi_timer_value(struct sbi_scratch *scratch)
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{
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struct sbi_platform *plat = sbi_platform_ptr(scratch);
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if (sbi_platform_has_timer_value(plat))
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return sbi_platform_timer_value(plat);
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else
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return get_ticks();
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}
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void sbi_timer_event_stop(struct sbi_scratch *scratch)
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{
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sbi_platform_timer_event_stop(sbi_platform_ptr(scratch));
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}
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void sbi_timer_event_start(struct sbi_scratch *scratch, u64 next_event)
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{
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sbi_platform_timer_event_start(sbi_platform_ptr(scratch),
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next_event);
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csr_clear(CSR_MIP, MIP_STIP);
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csr_set(CSR_MIE, MIP_MTIP);
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}
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void sbi_timer_process(struct sbi_scratch *scratch)
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{
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csr_clear(CSR_MIE, MIP_MTIP);
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csr_set(CSR_MIP, MIP_STIP);
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}
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int sbi_timer_init(struct sbi_scratch *scratch, bool cold_boot)
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{
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return sbi_platform_timer_init(sbi_platform_ptr(scratch),
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cold_boot);
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}
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