mirror of
				https://github.com/riscv-software-src/opensbi
				synced 2025-10-31 03:58:22 +00:00 
			
		
		
		
	Beautify multi-line printing. Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
		
			
				
	
	
		
			90 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			90 lines
		
	
	
		
			2.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * SPDX-License-Identifier: BSD-3-Clause
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|  *
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|  * Copyright (c) 2023 Andes Technology Corporation
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|  *
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|  * Authors:
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|  *   Yu Chien Peter Lin <peterlin@andestech.com>
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|  */
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| 
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| #include <sbi_utils/sys/atcsmu.h>
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| #include <sbi/riscv_io.h>
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| #include <sbi/sbi_console.h>
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| #include <sbi/sbi_error.h>
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| #include <sbi/sbi_bitops.h>
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| 
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| inline int smu_set_wakeup_events(struct smu_data *smu, u32 events, u32 hartid)
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| {
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| 	if (smu) {
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| 		writel(events, (void *)(smu->addr + PCSm_WE_OFFSET(hartid)));
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| 		return 0;
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| 	} else
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| 		return SBI_EINVAL;
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| }
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| 
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| inline bool smu_support_sleep_mode(struct smu_data *smu, u32 sleep_mode,
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| 				   u32 hartid)
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| {
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| 	u32 pcs_cfg;
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| 
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| 	if (!smu) {
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| 		sbi_printf("%s(): Failed to access smu_data\n", __func__);
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| 		return false;
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| 	}
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| 
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| 	pcs_cfg = readl((void *)(smu->addr + PCSm_CFG_OFFSET(hartid)));
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| 
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| 	switch (sleep_mode) {
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| 	case LIGHTSLEEP_MODE:
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| 		if (EXTRACT_FIELD(pcs_cfg, PCS_CFG_LIGHT_SLEEP) == 0) {
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| 			sbi_printf("SMU: hart%d (PCS%d) does not support light sleep mode\n",
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| 				   hartid, hartid + 3);
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| 			return false;
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| 		}
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| 		break;
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| 	case DEEPSLEEP_MODE:
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| 		if (EXTRACT_FIELD(pcs_cfg, PCS_CFG_DEEP_SLEEP) == 0) {
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| 			sbi_printf("SMU: hart%d (PCS%d) does not support deep sleep mode\n",
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| 				   hartid, hartid + 3);
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| 			return false;
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| 		}
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| 		break;
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| 	}
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| 
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| 	return true;
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| }
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| 
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| inline int smu_set_command(struct smu_data *smu, u32 pcs_ctl, u32 hartid)
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| {
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| 	if (smu) {
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| 		writel(pcs_ctl, (void *)(smu->addr + PCSm_CTL_OFFSET(hartid)));
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| 		return 0;
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| 	} else
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| 		return SBI_EINVAL;
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| }
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| 
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| inline int smu_set_reset_vector(struct smu_data *smu, ulong wakeup_addr,
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| 				u32 hartid)
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| {
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| 	u32 vec_lo, vec_hi;
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| 	u64 reset_vector;
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| 
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| 	if (!smu)
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| 		return SBI_EINVAL;
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| 
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| 	writel(wakeup_addr, (void *)(smu->addr + HARTn_RESET_VEC_LO(hartid)));
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| 	writel((u64)wakeup_addr >> 32,
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| 	       (void *)(smu->addr + HARTn_RESET_VEC_HI(hartid)));
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| 
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| 	vec_lo = readl((void *)(smu->addr + HARTn_RESET_VEC_LO(hartid)));
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| 	vec_hi = readl((void *)(smu->addr + HARTn_RESET_VEC_HI(hartid)));
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| 	reset_vector = ((u64)vec_hi << 32) | vec_lo;
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| 
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| 	if (reset_vector != (u64)wakeup_addr) {
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| 		sbi_printf("hart%d (PCS%d): Failed to program the reset vector.\n",
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| 			   hartid, hartid + 3);
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| 		return SBI_EFAIL;
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| 	} else
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| 		return 0;
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| }
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