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https://github.com/riscv-software-src/opensbi
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This patch adds atcsmu support for Andes AE350 platforms. The SMU provides system management capabilities, including clock, reset and power control based on power domain partitions. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
60 lines
1.8 KiB
C
60 lines
1.8 KiB
C
/*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright (c) 2023 Andes Technology Corporation
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*/
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#ifndef _SYS_ATCSMU_H
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#define _SYS_ATCSMU_H
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#include <sbi/sbi_types.h>
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/* clang-format off */
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#define PCS0_WE_OFFSET 0x90
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#define PCSm_WE_OFFSET(i) ((i + 3) * 0x20 + PCS0_WE_OFFSET)
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#define PCS0_CTL_OFFSET 0x94
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#define PCSm_CTL_OFFSET(i) ((i + 3) * 0x20 + PCS0_CTL_OFFSET)
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#define PCS_CTL_CMD_SHIFT 0
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#define PCS_CTL_PARAM_SHIFT 3
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#define SLEEP_CMD 0x3
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#define WAKEUP_CMD (0x0 | (1 << PCS_CTL_PARAM_SHIFT))
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#define LIGHTSLEEP_MODE 0
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#define DEEPSLEEP_MODE 1
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#define LIGHT_SLEEP_CMD (SLEEP_CMD | (LIGHTSLEEP_MODE << PCS_CTL_PARAM_SHIFT))
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#define DEEP_SLEEP_CMD (SLEEP_CMD | (DEEPSLEEP_MODE << PCS_CTL_PARAM_SHIFT))
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#define PCS0_CFG_OFFSET 0x80
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#define PCSm_CFG_OFFSET(i) ((i + 3) * 0x20 + PCS0_CFG_OFFSET)
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#define PCS_CFG_LIGHT_SLEEP_SHIFT 2
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#define PCS_CFG_LIGHT_SLEEP (1 << PCS_CFG_LIGHT_SLEEP_SHIFT)
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#define PCS_CFG_DEEP_SLEEP_SHIFT 3
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#define PCS_CFG_DEEP_SLEEP (1 << PCS_CFG_DEEP_SLEEP_SHIFT)
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#define RESET_VEC_LO_OFFSET 0x50
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#define RESET_VEC_HI_OFFSET 0x60
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#define RESET_VEC_8CORE_OFFSET 0x1a0
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#define HARTn_RESET_VEC_LO(n) (RESET_VEC_LO_OFFSET + \
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((n) < 4 ? 0 : RESET_VEC_8CORE_OFFSET) + \
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((n) * 0x4))
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#define HARTn_RESET_VEC_HI(n) (RESET_VEC_HI_OFFSET + \
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((n) < 4 ? 0 : RESET_VEC_8CORE_OFFSET) + \
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((n) * 0x4))
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#define PCS_MAX_NR 8
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#define FLASH_BASE 0x80000000ULL
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/* clang-format on */
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struct smu_data {
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unsigned long addr;
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};
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int smu_set_wakeup_events(struct smu_data *smu, u32 events, u32 hartid);
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bool smu_support_sleep_mode(struct smu_data *smu, u32 sleep_mode, u32 hartid);
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int smu_set_command(struct smu_data *smu, u32 pcs_ctl, u32 hartid);
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int smu_set_reset_vector(struct smu_data *smu, ulong wakeup_addr, u32 hartid);
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#endif /* _SYS_ATCSMU_H */
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