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sunxi: Add support for Bananapi M2 Ultra
The Bananapi M2 Ultra is the first publicly available development board featuring the R40 SoC. This patch add barebone dtsi/dts files for the R40 and Bananapi M2 Ultra, as well as a defconfig for it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Chen-Yu Tsai
Maxime Ripard
parent
0918648d82
commit
10d8bc5a59
@ -304,6 +304,8 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
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sun8i-h3-orangepi-plus2e.dtb \
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sun8i-h3-orangepi-plus2e.dtb \
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sun8i-h3-nanopi-neo.dtb \
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sun8i-h3-nanopi-neo.dtb \
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sun8i-h3-nanopi-neo-air.dtb
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sun8i-h3-nanopi-neo-air.dtb
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dtb-$(CONFIG_MACH_SUN8I_R40) += \
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sun8i-r40-bananapi-m2-ultra.dtb
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dtb-$(CONFIG_MACH_SUN50I_H5) += \
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dtb-$(CONFIG_MACH_SUN50I_H5) += \
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sun50i-h5-orangepi-pc2.dtb
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sun50i-h5-orangepi-pc2.dtb
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dtb-$(CONFIG_MACH_SUN50I) += \
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dtb-$(CONFIG_MACH_SUN50I) += \
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69
arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
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69
arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
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@ -0,0 +1,69 @@
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/*
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* Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "sun8i-r40.dtsi"
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/ {
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model = "Banana Pi BPI-M2-Ultra";
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compatible = "sinovoip,bpi-m2-ultra", "allwinner,sun8i-r40";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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status = "okay";
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pb_pins>;
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status = "okay";
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};
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183
arch/arm/dts/sun8i-r40.dtsi
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183
arch/arm/dts/sun8i-r40.dtsi
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@ -0,0 +1,183 @@
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/*
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* Copyright 2016 Chen-Yu Tsai
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*
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* Chen-Yu Tsai <wens@csie.org>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&gic>;
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aliases {
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};
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chosen {
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};
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clocks {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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osc24M: osc24M_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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};
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osc32k: osc32k_clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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clock-output-names = "osc32k";
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};
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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compatible = "arm,cortex-a7";
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device_type = "cpu";
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reg = <0>;
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};
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cpu@1 {
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compatible = "arm,cortex-a7";
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device_type = "cpu";
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reg = <1>;
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};
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cpu@2 {
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compatible = "arm,cortex-a7";
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device_type = "cpu";
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reg = <2>;
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};
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cpu@3 {
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compatible = "arm,cortex-a7";
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device_type = "cpu";
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reg = <3>;
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};
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0x40000000 0x80000000>;
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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pio: pinctrl@1c20800 {
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compatible = "allwinner,sun8i-r40-pinctrl";
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reg = <0x01c20800 0x400>;
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interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
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/* apb should be replaced once CCU is implemented */
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clocks = <&osc24M>, <&osc24M>, <&osc32k>;
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clock-names = "apb", "hosc", "losc";
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <3>;
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#gpio-cells = <3>;
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i2c0_pins: i2c0_pins {
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pins = "PB0", "PB1";
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function = "i2c0";
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bias-pull-up;
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};
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uart0_pb_pins: uart0_pb_pins {
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pins = "PB22", "PB23";
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function = "uart0";
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bias-pull-up;
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};
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};
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uart0: serial@1c28000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x01c28000 0x400>;
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interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
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reg-shift = <2>;
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reg-io-width = <4>;
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clocks = <&osc24M>;
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status = "disabled";
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};
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i2c0: i2c@1c2ac00 {
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compatible = "allwinner,sun6i-a31-i2c";
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reg = <0x01c2ac00 0x400>;
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&osc24M>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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gic: interrupt-controller@1c81000 {
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compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
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reg = <0x01c81000 0x1000>,
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<0x01c82000 0x1000>,
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<0x01c84000 0x2000>,
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<0x01c86000 0x2000>;
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interrupt-controller;
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#interrupt-cells = <3>;
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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};
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};
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timer {
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compatible = "arm,armv7-timer";
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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clock-frequency = <24000000>;
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arm,cpu-registers-not-fw-configured;
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};
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};
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@ -109,6 +109,12 @@ M: Paul Kocialkowski <contact@paulk.fr>
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S: Maintained
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S: Maintained
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F: configs/Ampe_A76_defconfig
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F: configs/Ampe_A76_defconfig
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BANANAPI M2 ULTRA BOARD
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M: Chen-Yu Tsai <wens@csie.org>
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S: Maintained
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F: configs/Bananapi_M2_Ultra_defconfig
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F: arch/arm/dts/sun8i-r40-bananapi-m2-ultra.dts
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COLOMBUS BOARD
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COLOMBUS BOARD
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M: Maxime Ripard <maxime.ripard@free-electrons.com>
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M: Maxime Ripard <maxime.ripard@free-electrons.com>
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S: Maintained
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S: Maintained
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15
configs/Bananapi_M2_Ultra_defconfig
Normal file
15
configs/Bananapi_M2_Ultra_defconfig
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@ -0,0 +1,15 @@
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CONFIG_ARM=y
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CONFIG_ARCH_SUNXI=y
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CONFIG_MACH_SUN8I_R40=y
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CONFIG_DRAM_CLK=576
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CONFIG_DRAM_ZQ=3881979
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CONFIG_DRAM_ODT_EN=y
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CONFIG_MMC0_CD_PIN="PH13"
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CONFIG_MMC_SUNXI_SLOT_EXTRA=2
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CONFIG_DEFAULT_DEVICE_TREE="sun8i-r40-bananapi-m2-ultra"
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# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
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CONFIG_SPL=y
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CONFIG_SPL_I2C_SUPPORT=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_FLASH is not set
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# CONFIG_CMD_FPGA is not set
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Loading…
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Reference in New Issue
Block a user