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rockchip: spl: change call condition rockchip_stimer_init()

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The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE
defined. Currently only rk3188 has an exception in SPL. Make this more
generic and compile code inside the function rockchip_stimer_init()
only when CONFIG_ROCKCHIP_STIMER_BASE is available.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Johan Jonker 2022-04-09 18:55:03 +02:00 committed by Kever Yang
parent 54562045e5
commit 12a716422f
1 changed files with 4 additions and 4 deletions
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8
arch/arm/mach-rockchip/spl.c
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@ -71,7 +71,6 @@ u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
return MMCSD_MODE_RAW;
}
#if !defined(CONFIG_ROCKCHIP_RK3188)
#define TIMER_LOAD_COUNT_L 0x00
#define TIMER_LOAD_COUNT_H 0x04
#define TIMER_CONTROL_REG 0x10
@ -81,6 +80,7 @@ u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
__weak void rockchip_stimer_init(void)
{
#if defined(CONFIG_ROCKCHIP_STIMER_BASE)
/* If Timer already enabled, don't re-init it */
u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
@ -95,8 +95,8 @@ __weak void rockchip_stimer_init(void)
writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
TIMER_CONTROL_REG);
}
#endif
}
__weak int board_early_init_f(void)
{
@ -133,9 +133,9 @@ void board_init_f(ulong dummy)
hang();
}
arch_cpu_init();
#if !defined(CONFIG_ROCKCHIP_RK3188)
rockchip_stimer_init();
#endif
#ifdef CONFIG_SYS_ARCH_TIMER
/* Init ARM arch timer in arch/arm/cpu/armv7/arch_timer.c */
timer_init();