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arm: dts: imx8m: update binman ddr firmware node name

Browse Source 
We are migrating to use binman symbols, the current names are
inconsistent across different boards, so unify them.

Also add `type = "blob-ext";`, since the new names are not valid binman
types.

Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
[Alper: Edit commit message]
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
This commit is contained in:
Peng Fan 2022-07-26 16:41:20 +08:00 committed by Stefano Babic
parent 6ec65c8558
commit 25daa2cdda
10 changed files with 58 additions and 38 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
arch/arm/dts/imx8mm-u-boot.dtsi
View File

@ -39,25 +39,25 @@
filename = "u-boot-spl.bin"; filename = "u-boot-spl.bin";
}; };
1d-imem { ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin"; filename = "lpddr4_pmu_train_1d_imem.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext"; type = "blob-ext";
}; };
1d-dmem { ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin"; filename = "lpddr4_pmu_train_1d_dmem.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext"; type = "blob-ext";
}; };
2d-imem { ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin"; filename = "lpddr4_pmu_train_2d_imem.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext"; type = "blob-ext";
}; };
2d-dmem { ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin"; filename = "lpddr4_pmu_train_2d_dmem.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext"; type = "blob-ext";

12
arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
View File

@ -147,24 +147,28 @@
align-end = <4>; align-end = <4>;
}; };
blob_1: blob-ext@1 { ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin"; filename = "lpddr4_pmu_train_1d_imem.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext";
}; };
blob_2: blob-ext@2 { ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin"; filename = "lpddr4_pmu_train_1d_dmem.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext";
}; };
blob_3: blob-ext@3 { ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin"; filename = "lpddr4_pmu_train_2d_imem.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext";
}; };
blob_4: blob-ext@4 { ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin"; filename = "lpddr4_pmu_train_2d_dmem.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext";
}; };
}; };

4
arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
View File

@ -111,13 +111,13 @@
filename = "u-boot-spl.bin"; filename = "u-boot-spl.bin";
}; };
1d-imem { ddr-1d-imem-fw {
filename = "ddr3_imem_1d.bin"; filename = "ddr3_imem_1d.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext"; type = "blob-ext";
}; };
1d_dmem { ddr-1d-dmem-fw {
filename = "ddr3_dmem_1d.bin"; filename = "ddr3_dmem_1d.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext"; type = "blob-ext";

12
arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
View File

@ -155,24 +155,28 @@
align-end = <4>; align-end = <4>;
}; };
blob_1: blob-ext@1 { ddr-1d-imem-fw {
filename = "ddr4_imem_1d_201810.bin"; filename = "ddr4_imem_1d_201810.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext";
}; };
blob_2: blob-ext@2 { ddr-1d-dmem-fw {
filename = "ddr4_dmem_1d_201810.bin"; filename = "ddr4_dmem_1d_201810.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext";
}; };
blob_3: blob-ext@3 { ddr-2d-imem-fw {
filename = "ddr4_imem_2d_201810.bin"; filename = "ddr4_imem_2d_201810.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext";
}; };
blob_4: blob-ext@4 { ddr-2d-dmem-fw {
filename = "ddr4_dmem_2d_201810.bin"; filename = "ddr4_dmem_2d_201810.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext";
}; };
}; };

12
arch/arm/dts/imx8mn-evk-u-boot.dtsi
View File

@ -36,24 +36,28 @@
align-end = <4>; align-end = <4>;
}; };
blob_1: blob-ext@1 { ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin"; filename = "lpddr4_pmu_train_1d_imem.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext";
}; };
blob_2: blob-ext@2 { ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin"; filename = "lpddr4_pmu_train_1d_dmem.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext";
}; };
blob_3: blob-ext@3 { ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin"; filename = "lpddr4_pmu_train_2d_imem.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext";
}; };
blob_4: blob-ext@4 { ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin"; filename = "lpddr4_pmu_train_2d_dmem.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext";
}; };
}; };

8
arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
View File

@ -130,25 +130,25 @@
filename = "u-boot-spl.bin"; filename = "u-boot-spl.bin";
}; };
1d-imem { ddr-1d-imem-fw {
filename = "ddr4_imem_1d.bin"; filename = "ddr4_imem_1d.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext"; type = "blob-ext";
}; };
1d_dmem { ddr-1d-dmem-fw {
filename = "ddr4_dmem_1d.bin"; filename = "ddr4_dmem_1d.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext"; type = "blob-ext";
}; };
2d_imem { ddr-2d-imem-fw {
filename = "ddr4_imem_2d.bin"; filename = "ddr4_imem_2d.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext"; type = "blob-ext";
}; };
2d_dmem { ddr-2d-dmem-fw {
filename = "ddr4_dmem_2d.bin"; filename = "ddr4_dmem_2d.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext"; type = "blob-ext";

8
arch/arm/dts/imx8mn-venice-u-boot.dtsi
View File

@ -126,25 +126,25 @@
filename = "u-boot-spl.bin"; filename = "u-boot-spl.bin";
}; };
1d-imem { ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin"; filename = "lpddr4_pmu_train_1d_imem.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext"; type = "blob-ext";
}; };
1d_dmem { ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin"; filename = "lpddr4_pmu_train_1d_dmem.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext"; type = "blob-ext";
}; };
2d_imem { ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin"; filename = "lpddr4_pmu_train_2d_imem.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext"; type = "blob-ext";
}; };
2d_dmem { ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin"; filename = "lpddr4_pmu_train_2d_dmem.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext"; type = "blob-ext";

12
arch/arm/dts/imx8mp-u-boot.dtsi
View File

@ -61,24 +61,28 @@
align-end = <4>; align-end = <4>;
}; };
blob_1: blob-ext@1 { ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem_202006.bin"; filename = "lpddr4_pmu_train_1d_imem_202006.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext";
}; };
blob_2: blob-ext@2 { ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem_202006.bin"; filename = "lpddr4_pmu_train_1d_dmem_202006.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext";
}; };
blob_3: blob-ext@3 { ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem_202006.bin"; filename = "lpddr4_pmu_train_2d_imem_202006.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext";
}; };
blob_4: blob-ext@4 { ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem_202006.bin"; filename = "lpddr4_pmu_train_2d_dmem_202006.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext";
}; };
}; };

12
arch/arm/dts/imx8mq-cm-u-boot.dtsi
View File

@ -28,24 +28,28 @@
align-end = <4>; align-end = <4>;
}; };
blob_1: blob-ext@1 { ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin"; filename = "lpddr4_pmu_train_1d_imem.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext";
}; };
blob_2: blob-ext@2 { ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin"; filename = "lpddr4_pmu_train_1d_dmem.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext";
}; };
blob_3: blob-ext@3 { ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin"; filename = "lpddr4_pmu_train_2d_imem.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext";
}; };
blob_4: blob-ext@4 { ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin"; filename = "lpddr4_pmu_train_2d_dmem.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext";
}; };
}; };

8
arch/arm/dts/imx8mq-u-boot.dtsi
View File

@ -46,25 +46,25 @@
filename = "u-boot-spl.bin"; filename = "u-boot-spl.bin";
}; };
1d-imem { ddr-1d-imem-fw {
filename = "lpddr4_pmu_train_1d_imem.bin"; filename = "lpddr4_pmu_train_1d_imem.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext"; type = "blob-ext";
}; };
1d-dmem { ddr-1d-dmem-fw {
filename = "lpddr4_pmu_train_1d_dmem.bin"; filename = "lpddr4_pmu_train_1d_dmem.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext"; type = "blob-ext";
}; };
2d-imem { ddr-2d-imem-fw {
filename = "lpddr4_pmu_train_2d_imem.bin"; filename = "lpddr4_pmu_train_2d_imem.bin";
size = <0x8000>; size = <0x8000>;
type = "blob-ext"; type = "blob-ext";
}; };
2d-dmem { ddr-2d-dmem-fw {
filename = "lpddr4_pmu_train_2d_dmem.bin"; filename = "lpddr4_pmu_train_2d_dmem.bin";
size = <0x4000>; size = <0x4000>;
type = "blob-ext"; type = "blob-ext";