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microblaze: Optimize register usage in relocate_code

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There are additional operations which can be done simpler that's why
improve logic around relocation address r7 handling and _start symbol.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c8b60f72f1605c2ba6b4b7be1893d7e6ec3d8597.1655299267.git.michal.simek@amd.com
This commit is contained in:
Michal Simek 2022-06-24 14:15:00 +02:00
parent 532ad5f841
commit 3041b512eb
1 changed files with 2 additions and 5 deletions
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7
arch/microblaze/cpu/start.S
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@ -271,7 +271,6 @@ relocate_code:
mts rshr, r1 mts rshr, r1
addi r31, r6, 0 /* Start to use new GD */ addi r31, r6, 0 /* Start to use new GD */
add r23, r0, r7 /* Move reloc addr to r23 */
/* Relocate text and data - r12 temp value */ /* Relocate text and data - r12 temp value */
addi r21, r0, _start addi r21, r0, _start
addi r22, r0, _end /* Include BSS too */ addi r22, r0, _end /* Include BSS too */
@ -280,15 +279,13 @@ relocate_code:
rsub r6, r21, r22 rsub r6, r21, r22
or r5, r0, r0 or r5, r0, r0
1: lw r12, r21, r5 /* Load u-boot data */ 1: lw r12, r21, r5 /* Load u-boot data */
sw r12, r23, r5 /* Write zero to loc */ sw r12, r7, r5 /* Write zero to loc */
cmp r12, r5, r6 /* Check if we have reach the end */ cmp r12, r5, r6 /* Check if we have reach the end */
bneid r12, 1b bneid r12, 1b
addi r5, r5, 4 /* Increment to next loc - relocate code */ addi r5, r5, 4 /* Increment to next loc - relocate code */
/* R23 points to the base address. */ /* R23 points to the base address. */
add r23, r0, r7 /* Move reloc addr to r23 */ rsub r23, r21, r7 /* keep - this is already here gd->reloc_off */
addi r24, r0, _start /* Get reloc offset */
rsub r23, r24, r23 /* keep - this is already here gd->reloc_off */
/* Setup vectors with post-relocation symbols */ /* Setup vectors with post-relocation symbols */
add r5, r0, r23 /* load gd->reloc_off to r5 */ add r5, r0, r23 /* load gd->reloc_off to r5 */