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Merge tag 'u-boot-rockchip-20200607' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip

Browse Source 
- revive rk3399 puma board to adapt mainline dts;
- Fix rk3399-evb stdout path;
- Enable PCIe for rk3399: Rockpro64, firefly, pinebookpro;
- Add rk3328 Rock-pi-e board;
- Enable SPI boot for rockpro64 and roc-pc-rk3399;
This commit is contained in:
Tom Rini 2020-06-08 08:51:30 -04:00
commit 325b83e040
30 changed files with 829 additions and 257 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
Makefile
View File

@ -1438,22 +1438,15 @@ u-boot-with-spl.bin: $(SPL_IMAGE) $(SPL_PAYLOAD) FORCE
ifeq ($(CONFIG_ARCH_ROCKCHIP),y)
# rockchip image type
ifeq ($(CONFIG_SPL_SPI_LOAD),y)
ROCKCHIP_IMG_TYPE := rkspi
else
ROCKCHIP_IMG_TYPE := rksd
endif
# TPL + SPL
ifeq ($(CONFIG_SPL)$(CONFIG_TPL),yy)
MKIMAGEFLAGS_u-boot-tpl-rockchip.bin = -n $(CONFIG_SYS_SOC) -T $(ROCKCHIP_IMG_TYPE)
MKIMAGEFLAGS_u-boot-tpl-rockchip.bin = -n $(CONFIG_SYS_SOC) -T rksd
tpl/u-boot-tpl-rockchip.bin: tpl/u-boot-tpl.bin FORCE
$(call if_changed,mkimage)
idbloader.img: tpl/u-boot-tpl-rockchip.bin spl/u-boot-spl.bin FORCE
$(call if_changed,cat)
else
MKIMAGEFLAGS_idbloader.img = -n $(CONFIG_SYS_SOC) -T $(ROCKCHIP_IMG_TYPE)
MKIMAGEFLAGS_idbloader.img = -n $(CONFIG_SYS_SOC) -T rksd
idbloader.img: spl/u-boot-spl.bin FORCE
$(call if_changed,mkimage)
endif

7
arch/arm/dts/Makefile
View File

@ -107,7 +107,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \
dtb-$(CONFIG_ROCKCHIP_RK3328) += \
rk3328-evb.dtb \
rk3328-roc-cc.dtb \
rk3328-rock64.dtb
rk3328-rock64.dtb \
rk3328-rock-pi-e.dtb
dtb-$(CONFIG_ROCKCHIP_RK3368) += \
rk3368-lion.dtb \
@ -130,9 +131,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
rk3399-nanopi-neo4.dtb \
rk3399-orangepi.dtb \
rk3399-pinebook-pro.dtb \
rk3399-puma-ddr1333.dtb \
rk3399-puma-ddr1600.dtb \
rk3399-puma-ddr1866.dtb \
rk3399-puma-haikou.dtb \
rk3399-roc-pc.dtb \
rk3399-roc-pc-mezzanine.dtb \
rk3399-rock-pi-4.dtb \

33
arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi Normal file
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@ -0,0 +1,33 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2020 Radxa
*/
#include "rk3328-u-boot.dtsi"
#include "rk3328-sdram-ddr3-666.dtsi"
&gpio0 {
u-boot,dm-spl;
};
&pinctrl {
u-boot,dm-spl;
};
&sdmmc0m1_gpio {
u-boot,dm-spl;
};
&pcfg_pull_up_4ma {
u-boot,dm-spl;
};
&usb_host0_xhci {
vbus-supply = <&vcc5v0_host_xhci>;
status = "okay";
};
/* Need this and all the pinctrl/gpio stuff above to set pinmux */
&vcc_sd {
u-boot,dm-spl;
};

267
arch/arm/dts/rk3328-rock-pi-e.dts Normal file
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@ -0,0 +1,267 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* (C) Copyright 2020 Radxa
*/
/dts-v1/;
#include "rk3328.dtsi"
/ {
model = "Radxa Rockpi E";
compatible = "radxa,rock-pi-e", "rockchip,rk3328";
chosen {
stdout-path = "serial2:1500000n8";
};
gmac_clkin: external-gmac-clock {
compatible = "fixed-clock";
clock-frequency = <125000000>;
clock-output-names = "gmac_clkin";
#clock-cells = <0>;
};
vcc_sd: sdmmc-regulator {
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0m1_gpio>;
regulator-name = "vcc_sd";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_io>;
};
vcc5v0_host_xhci: vcc5v0-host-xhci-drv {
compatible = "regulator-fixed";
enable-active-high;
regulator-name = "vcc5v0_host_xhci";
gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
vcc_sys: vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
};
&cpu0 {
cpu-supply = <&vdd_arm>;
};
&cpu1 {
cpu-supply = <&vdd_arm>;
};
&cpu2 {
cpu-supply = <&vdd_arm>;
};
&cpu3 {
cpu-supply = <&vdd_arm>;
};
&emmc {
bus-width = <8>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
supports-emmc;
disable-wp;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
vmmc-supply = <&vcc_io>;
vqmmc-supply = <&vcc18_emmc>;
status = "okay";
};
&gmac2io {
assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
clock_in_out = "input";
phy-supply = <&vcc_io>;
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&rgmiim1_pins>;
snps,force_thresh_dma_mode;
snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
tx_delay = <0x26>;
rx_delay = <0x11>;
status = "okay";
};
&i2c1 {
status = "okay";
rk805: rk805@18 {
compatible = "rockchip,rk805";
status = "okay";
reg = <0x18>;
interrupt-parent = <&gpio2>;
interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
#clock-cells = <1>;
clock-output-names = "xin32k", "rk805-clkout2";
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l>;
rockchip,system-power-controller;
wakeup-source;
vcc1-supply = <&vcc_sys>;
vcc2-supply = <&vcc_sys>;
vcc3-supply = <&vcc_sys>;
vcc4-supply = <&vcc_sys>;
vcc5-supply = <&vcc_io>;
vcc6-supply = <&vcc_sys>;
regulators {
vdd_logic: DCDC_REG1 {
regulator-name = "vdd_logic";
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1450000>;
regulator-ramp-delay = <12500>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1000000>;
};
};
vdd_arm: DCDC_REG2 {
regulator-name = "vdd_arm";
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1450000>;
regulator-ramp-delay = <12500>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <950000>;
};
};
vcc_ddr: DCDC_REG3 {
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc_io: DCDC_REG4 {
regulator-name = "vcc_io";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcc_18: LDO_REG1 {
regulator-name = "vcc_18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcc18_emmc: LDO_REG2 {
regulator-name = "vcc18_emmc";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vdd_10: LDO_REG3 {
regulator-name = "vdd_10";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1000000>;
};
};
};
};
};
&io_domains {
status = "okay";
vccio1-supply = <&vcc_io>;
vccio2-supply = <&vcc18_emmc>;
vccio3-supply = <&vcc_io>;
vccio4-supply = <&vcc_io>;
vccio5-supply = <&vcc_io>;
vccio6-supply = <&vcc_io>;
pmuio-supply = <&vcc_io>;
};
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
card-detect-delay = <200>;
disable-wp;
max-frequency = <150000000>;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
supports-sd;
vmmc-supply = <&vcc_sd>;
status = "okay";
};
&saradc {
status = "okay";
};
&uart2 {
status = "okay";
};
&usb20_otg {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};

1
arch/arm/dts/rk3399-evb-u-boot.dtsi
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@ -8,6 +8,7 @@
/ {
chosen {
stdout-path = "serial2:1500000n8";
u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
};
};

4
arch/arm/dts/rk3399-puma-ddr1333-u-boot.dtsi
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@ -1,4 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
#include "rk3399-puma-u-boot.dtsi"
#include "rk3399-sdram-ddr3-1333.dtsi"

8
arch/arm/dts/rk3399-puma-ddr1333.dts
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@ -1,8 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
*/
/dts-v1/;
#include "rk3399-puma.dtsi"

4
arch/arm/dts/rk3399-puma-ddr1600-u-boot.dtsi
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@ -1,4 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
#include "rk3399-puma-u-boot.dtsi"
#include "rk3399-sdram-ddr3-1600.dtsi"

9
arch/arm/dts/rk3399-puma-ddr1600.dts
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@ -1,9 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
*/
/dts-v1/;
#include "rk3399-puma.dtsi"
#include "rk3399-u-boot.dtsi"

4
arch/arm/dts/rk3399-puma-ddr1866-u-boot.dtsi
View File

@ -1,4 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
#include "rk3399-puma-u-boot.dtsi"
#include "rk3399-sdram-ddr3-1866.dtsi"

8
arch/arm/dts/rk3399-puma-ddr1866.dts
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@ -1,8 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
* (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
*/
/dts-v1/;
#include "rk3399-puma.dtsi"

41
arch/arm/dts/rk3399-puma-u-boot.dtsi → arch/arm/dts/rk3399-puma-haikou-u-boot.dtsi
View File

@ -1,25 +1,36 @@
// SPDX-License-Identifier: GPL-2.0+
#include "rk3399-u-boot.dtsi"
#ifdef CONFIG_TARGET_PUMA_RK3399_RAM_DDR3_1333
#include "rk3399-sdram-ddr3-1333.dtsi"
#endif
#ifdef CONFIG_TARGET_PUMA_RK3399_RAM_DDR3_1600
#include "rk3399-sdram-ddr3-1600.dtsi"
#endif
#ifdef CONFIG_TARGET_PUMA_RK3399_RAM_DDR3_1866
#include "rk3399-sdram-ddr3-1866.dtsi"
#endif
/ {
config {
u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */
u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */
u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */
u-boot,boot-led = "module_led";
sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
};
config {
u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */
u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */
u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */
u-boot,boot-led = "module_led";
sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
};
chosen {
stdout-path = "serial0:115200n8";
u-boot,spl-boot-order = \
chosen {
stdout-path = "serial0:115200n8";
u-boot,spl-boot-order = \
"same-as-spl", &norflash, &sdhci, &sdmmc;
};
};
aliases {
spi0 = &spi1;
spi1 = &spi5;
};
aliases {
spi0 = &spi1;
spi1 = &spi5;
};
/*
* The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module

271
arch/arm/dts/rk3399-puma-haikou.dts Normal file
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@ -0,0 +1,271 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
*/
/dts-v1/;
#include "rk3399-puma.dtsi"
/ {
model = "Theobroma Systems RK3399-Q7 SoM";
compatible = "tsd,rk3399-puma-haikou", "rockchip,rk3399";
chosen {
stdout-path = "serial0:115200n8";
};
leds {
pinctrl-0 = <&led_pin_module>, <&led_sd_haikou>;
sd-card-led {
label = "sd_card_led";
gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
};
};
i2s0-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "Haikou,I2S-codec";
simple-audio-card,mclk-fs = <512>;
simple-audio-card,codec {
clocks = <&sgtl5000_clk>;
sound-dai = <&sgtl5000>;
};
simple-audio-card,cpu {
bitclock-master;
frame-master;
sound-dai = <&i2s0>;
};
};
sgtl5000_clk: sgtl5000-oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24576000>;
};
dc_12v: dc-12v {
compatible = "regulator-fixed";
regulator-name = "dc_12v";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
vcc3v3_baseboard: vcc3v3-baseboard {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_baseboard";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&dc_12v>;
};
vcc5v0_baseboard: vcc5v0-baseboard {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_baseboard";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&dc_12v>;
};
vcc5v0_otg: vcc5v0-otg-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&otg_vbus_drv>;
regulator-name = "vcc5v0_otg";
regulator-always-on;
};
vdda_codec: vdda-codec {
compatible = "regulator-fixed";
regulator-name = "vdda_codec";
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_baseboard>;
};
vddd_codec: vddd-codec {
compatible = "regulator-fixed";
regulator-name = "vddd_codec";
regulator-boot-on;
regulator-min-microvolt = <1600000>;
regulator-max-microvolt = <1600000>;
vin-supply = <&vcc5v0_baseboard>;
};
};
&hdmi {
ddc-i2c-bus = <&i2c3>;
status = "okay";
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
};
&i2c2 {
status = "okay";
clock-frequency = <400000>;
};
&i2c3 {
i2c-scl-rising-time-ns = <450>;
i2c-scl-falling-time-ns = <15>;
status = "okay";
};
&i2c4 {
status = "okay";
clock-frequency = <400000>;
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&sgtl5000_clk>;
#sound-dai-cells = <0>;
VDDA-supply = <&vdda_codec>;
VDDIO-supply = <&vdda_codec>;
VDDD-supply = <&vddd_codec>;
status = "okay";
};
};
&i2c6 {
status = "okay";
clock-frequency = <400000>;
};
&pcie_phy {
status = "okay";
};
&pcie0 {
ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
num-lanes = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_clkreqn_cpm>;
status = "okay";
};
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&haikou_pin_hog>;
hog {
haikou_pin_hog: haikou-pin-hog {
rockchip,pins =
/* LID_BTN */
<0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>,
/* BATLOW# */
<0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>,
/* SLP_BTN# */
<0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>,
/* BIOS_DISABLE# */
<0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
leds {
led_sd_haikou: led-sd-gpio {
rockchip,pins =
<1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb2 {
otg_vbus_drv: otg-vbus-drv {
rockchip,pins =
<0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pwm0 {
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
disable-wp;
max-frequency = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
vmmc-supply = <&vcc3v3_baseboard>;
status = "okay";
};
&spi5 {
status = "okay";
};
&tcphy0 {
status = "okay";
};
&u2phy0 {
status = "okay";
};
&usbdrd3_0 {
status = "okay";
};
&usbdrd_dwc3_0 {
dr_mode = "otg";
status = "okay";
};
&u2phy0_host {
phy-supply = <&vcc5v0_otg>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
status = "okay";
};
&uart2 {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&vopb {
status = "okay";
};
&vopb_mmu {
status = "okay";
};
&vopl {
status = "okay";
};
&vopl_mmu {
status = "okay";
};

4
arch/arm/dts/rk3399-puma.dtsi
View File

@ -101,7 +101,7 @@
vcc5v0_host: vcc5v0-host-regulator {
compatible = "regulator-fixed";
gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>;
enable-active-low;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
@ -157,7 +157,7 @@
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
tx_delay = <0x10>;

12
arch/arm/dts/rk3399-roc-pc-u-boot.dtsi
View File

@ -12,7 +12,11 @@
};
chosen {
u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
u-boot,spl-boot-order = "same-as-spl", &spi_flash, &sdhci, &sdmmc;
};
config {
u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */
};
vcc_hub_en: vcc_hub_en-regulator {
@ -40,6 +44,12 @@
vin-supply = <&vcc_vbus_typec0>;
};
&spi1 {
spi_flash: flash@0 {
u-boot,dm-pre-reloc;
};
};
&vdd_log {
regulator-min-microvolt = <430000>;
regulator-init-microvolt = <950000>;

12
arch/arm/dts/rk3399-rockpro64-u-boot.dtsi
View File

@ -11,7 +11,17 @@
};
chosen {
u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
u-boot,spl-boot-order = "same-as-spl", &spi_flash, &sdmmc, &sdhci;
};
config {
u-boot,spl-payload-offset = <0x60000>; /* @ 384KB */
};
};
&spi1 {
spi_flash: flash@0 {
u-boot,dm-pre-reloc;
};
};

7
board/rockchip/evb_rk3328/MAINTAINERS
View File

@ -17,3 +17,10 @@ M: Matwey V. Kornilov <matwey.kornilov@gmail.com>
S: Maintained
F: configs/rock64-rk3328_defconfig
F: arch/arm/dts/rk3328-rock64-u-boot.dtsi
ROCKPIE-RK3328
M: Banglang Huang <banglang.huang@foxmail.com>
S: Maintained
F: configs/rock-pi-e-rk3328_defconfig
F: arch/arm/dts/rk3328-rock-pi-e.dts
F: arch/arm/dts/rk3328-rock-pi-e-u-boot.dtsi

15
board/theobroma-systems/puma_rk3399/Kconfig
View File

@ -18,4 +18,19 @@ config ENV_SIZE
config ENV_OFFSET
default 0x3fc000 if ENV_IS_IN_SPI_FLASH
choice
prompt "Theobroma Systems RK3399-Q7 DDR Option"
default TARGET_PUMA_RK3399_RAM_DDR3_1333
config TARGET_PUMA_RK3399_RAM_DDR3_1333
bool "DDR3-1333MHz"
config TARGET_PUMA_RK3399_RAM_DDR3_1600
bool "DDR3-1600MHz"
config TARGET_PUMA_RK3399_RAM_DDR3_1866
bool "DDR3-1866MHz"
endchoice
endif

94
board/theobroma-systems/puma_rk3399/fit_spl_atf.sh
View File

@ -1,94 +0,0 @@
#!/bin/sh
#
# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
#
# Based on the board/sunxi/mksunxi_fit_atf.sh
#
# Script to generate FIT image source for 64-bit puma boards with
# U-Boot proper, ATF, PMU firmware and devicetree.
#
# usage: $0 <dt_name> [<dt_name> [<dt_name] ...]
[ -z "$BL31" ] && BL31="bl31.bin"
if [ ! -f $BL31 ]; then
echo "WARNING: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2
echo "Please read Building section in doc/README.rockchip" >&2
BL31=/dev/null
fi
[ -z "$PMUM0" ] && PMUM0="rk3399m0.bin"
if [ ! -f $PMUM0 ]; then
echo "WARNING: PMUM0 file $PMUM0 NOT found, resulting binary is non-functional" >&2
echo "Please read Building section in doc/README.rockchip" >&2
PMUM0=/dev/null
fi
cat << __HEADER_EOF
/* SPDX-License-Identifier: GPL-2.0+ OR X11 */
/*
* Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
*
* Minimal dts for a SPL FIT image payload.
*/
/dts-v1/;
/ {
description = "FIT image with U-Boot proper, ATF bl31, M0 Firmware, DTB";
#address-cells = <1>;
images {
uboot {
description = "U-Boot (64-bit)";
data = /incbin/("u-boot-nodtb.bin");
type = "standalone";
arch = "arm64";
compression = "none";
load = <0x4a000000>;
};
atf {
description = "ARM Trusted Firmware";
data = /incbin/("$BL31");
type = "firmware";
arch = "arm64";
os = "arm-trusted-firmware";
compression = "none";
load = <0x1000>;
entry = <0x1000>;
};
pmu {
description = "Cortex-M0 firmware";
data = /incbin/("$PMUM0");
type = "pmu-firmware";
compression = "none";
load = <0x180000>;
};
fdt {
description = "RK3399-Q7 (Puma) flat device-tree";
data = /incbin/("$1");
type = "flat_dt";
compression = "none";
};
__HEADER_EOF
cat << __CONF_HEADER_EOF
};
configurations {
default = "conf";
conf {
description = "Theobroma Systems RK3399-Q7 (Puma) SoM";
firmware = "atf";
loadables = "uboot", "pmu";
fdt = "fdt";
};
__CONF_HEADER_EOF
cat << __ITS_EOF
};
};
__ITS_EOF

93
board/theobroma-systems/puma_rk3399/puma-rk3399.c
View File

@ -114,22 +114,22 @@ static int setup_boottargets(void)
int misc_init_r(void)
{
const u32 cpuid_offset = 0x7;
const u32 cpuid_length = 0x10;
u8 cpuid[cpuid_length];
int ret;
const u32 cpuid_offset = 0x7;
const u32 cpuid_length = 0x10;
u8 cpuid[cpuid_length];
int ret;
ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
if (ret)
return ret;
ret = rockchip_cpuid_from_efuse(cpuid_offset, cpuid_length, cpuid);
if (ret)
return ret;
ret = rockchip_cpuid_set(cpuid, cpuid_length);
if (ret)
return ret;
ret = rockchip_cpuid_set(cpuid, cpuid_length);
if (ret)
return ret;
ret = rockchip_setup_macaddr();
if (ret)
return ret;
ret = rockchip_setup_macaddr();
if (ret)
return ret;
setup_iodomain();
setup_boottargets();
@ -152,70 +152,3 @@ void get_board_serial(struct tag_serialnr *serialnr)
serialnr->low = (u32)(serial & 0xffffffff);
}
#endif
/**
* Switch power at an external regulator (for our root hub).
*
* @param ctrl pointer to the xHCI controller
* @param port port number as in the control message (one-based)
* @param enable boolean indicating whether to enable or disable power
* @return returns 0 on success, an error-code on failure
*/
static int board_usb_port_power_set(struct udevice *dev, int port,
bool enable)
{
#if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(DM_REGULATOR)
/* We start counting ports at 0, while USB counts from 1. */
int index = port - 1;
const char *regname = NULL;
struct udevice *regulator;
const char *prop = "tsd,usb-port-power";
int ret;
debug("%s: ctrl '%s' port %d enable %s\n", __func__,
dev_read_name(dev), port, enable ? "true" : "false");
ret = dev_read_string_index(dev, prop, index, &regname);
if (ret < 0) {
debug("%s: ctrl '%s' port %d: no entry in '%s'\n",
__func__, dev_read_name(dev), port, prop);
return ret;
}
ret = regulator_get_by_platname(regname, &regulator);
if (ret) {
debug("%s: ctrl '%s' port %d: could not get regulator '%s'\n",
__func__, dev_read_name(dev), port, regname);
return ret;
}
regulator_set_enable(regulator, enable);
return 0;
#else
return -ENOTSUPP;
#endif
}
void usb_hub_reset_devices(struct usb_hub_device *hub, int port)
{
struct udevice *dev = hub->pusb_dev->dev;
struct udevice *ctrl;
/* We are only interested in our root-hubs */
if (usb_hub_is_root_hub(dev) == false)
return;
ctrl = usb_get_bus(dev);
if (!ctrl) {
debug("%s: could not retrieve ctrl for hub\n", __func__);
return;
}
/*
* To work around an incompatibility between the single-threaded
* USB stack in U-Boot and (a strange low-power mode of) the USB
* hub we have on-module, we need to delay powering on the hub
* until the first time the port is probed.
*/
board_usb_port_power_set(ctrl, port, true);
}

4
configs/firefly-rk3399_defconfig
View File

@ -19,6 +19,7 @@ CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
@ -38,10 +39,13 @@ CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_DM_RESET=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYSRESET=y

4
configs/pinebook-pro-rk3399_defconfig
View File

@ -23,6 +23,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
@ -47,12 +48,15 @@ CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_ETH=y
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PMIC_FAN53555=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM_RK3399_LPDDR4=y
CONFIG_DM_RESET=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_ROCKCHIP_SPI=y

8
configs/puma-rk3399_defconfig
View File

@ -14,7 +14,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_SPL_TEXT_BASE=0xff8c2000
CONFIG_DEBUG_UART=y
CONFIG_SPL_FIT_GENERATOR="board/theobroma-systems/puma_rk3399/fit_spl_atf.sh"
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb"
CONFIG_MISC_INIT_R=y
CONFIG_DISPLAY_BOARDINFO_LATE=y
@ -39,7 +38,7 @@ CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_LIVE=y
CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-ddr1600"
CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-haikou"
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
@ -60,6 +59,8 @@ CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_DM_PMIC_FAN53555=y
CONFIG_PMIC_RK8XX=y
CONFIG_SPL_DM_REGULATOR=y
@ -68,6 +69,7 @@ CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_DM_RESET=y
CONFIG_DM_RTC=y
CONFIG_RTC_ISL1208=y
CONFIG_DEBUG_UART_SHIFT=2
@ -78,6 +80,8 @@ CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y

9
configs/roc-pc-mezzanine-rk3399_defconfig
View File

@ -1,18 +1,23 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_ENV_SIZE=0x6000
CONFIG_ENV_OFFSET=0x460000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_ROC_PC_RK3399=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_SPL_SPI_LOAD=y
CONFIG_TPL=y
CONFIG_TPL_GPIO_SUPPORT=y
CONFIG_CMD_BOOTZ=y
@ -25,7 +30,7 @@ CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-mezzanine"
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y

9
configs/roc-pc-rk3399_defconfig
View File

@ -1,18 +1,23 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_ENV_SIZE=0x6000
CONFIG_ENV_OFFSET=0x460000
CONFIG_ENV_SECT_SIZE=0x1000
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_ROC_PC_RK3399=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb"
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_SPL_SPI_LOAD=y
CONFIG_TPL=y
CONFIG_TPL_GPIO_SUPPORT=y
CONFIG_CMD_BOOTZ=y
@ -24,7 +29,7 @@ CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc"
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y

104
configs/rock-pi-e-rk3328_defconfig Normal file
View File

@ -0,0 +1,104 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_ROCKCHIP_RK3328=y
CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
CONFIG_TPL_LIBCOMMON_SUPPORT=y
CONFIG_TPL_LIBGENERIC_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL_STACK_R_ADDR=0x4000000
CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xFF130000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SMBIOS_PRODUCT_NAME="rock-pi-e_rk3328"
CONFIG_DEBUG_UART=y
CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
# CONFIG_ANDROID_BOOT_IMAGE is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-rock-pi-e.dtb"
CONFIG_MISC_INIT_R=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_TPL_SYS_MALLOC_SIMPLE=y
CONFIG_SPL_STACK_R=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_SPL_ATF=y
CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_TPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock-pi-e"
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_TPL_OF_PLATDATA=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_TPL_DM=y
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_TPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
CONFIG_TPL_SYSCON=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_FASTBOOT_BUF_ADDR=0x800800
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_SF_DEFAULT_SPEED=20000000
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_RK8XX=y
CONFIG_SPL_DM_REGULATOR=y
CONFIG_REGULATOR_PWM=y
CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_TPL_RAM=y
CONFIG_DM_RESET=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_SYSRESET=y
# CONFIG_TPL_SYSRESET is not set
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC2=y
CONFIG_USB_DWC3=y
# CONFIG_USB_DWC3_GADGET is not set
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_TPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y
CONFIG_SMBIOS_MANUFACTURER="radxa"

10
configs/rockpro64-rk3399_defconfig
View File

@ -1,12 +1,15 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_ENV_SIZE=0x8000
CONFIG_ENV_OFFSET=0x3F8000
CONFIG_ROCKCHIP_RK3399=y
CONFIG_TARGET_ROCKPRO64_RK3399=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_DEBUG_UART_BASE=0xFF1A0000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEBUG_UART=y
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rockpro64.dtb"
CONFIG_MISC_INIT_R=y
@ -14,17 +17,19 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_STACK_R=y
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
CONFIG_SPL_SPI_LOAD=y
CONFIG_TPL=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_PCI=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIME=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64"
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_SYS_I2C_ROCKCHIP=y
@ -39,10 +44,13 @@ CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PMIC_RK8XX=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK8XX=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_DM_RESET=y
CONFIG_RAM_RK3399_LPDDR4=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_SHIFT=2

27
doc/board/rockchip/rockchip.rst
View File

@ -48,6 +48,7 @@ List of mainline supported rockchip boards:
- Rockchip Evb-RK3328 (evb-rk3328)
- Pine64 Rock64 (rock64-rk3328)
- Firefly-RK3328 (roc-cc-rk3328)
- Radxa Rockpi E (rock-pi-e-rk3328)
* rk3368
- GeekBox (geekbox)
- PX5 EVB (evb-px5)
@ -162,6 +163,30 @@ Program the flash::
Note: for rockchip 32-bit platforms the U-Boot proper image
is u-boot-dtb.img
SPI
^^^
Generating idbloader for SPI boot would require to input a multi image
image format to mkimage tool instead of concerting (like for MMC boot).
SPL-alone SPI boot image::
./tools/mkimage -n rk3399 -T rkspi -d spl/u-boot-spl.bin idbloader.img
TPL+SPL SPI boot image::
./tools/mkimage -n rk3399 -T rkspi -d tpl/u-boot-tpl.bin:spl/u-boot-spl.bin idbloader.img
Copy SPI boot images into SD card and boot from SD::
sf probe
load mmc 1:1 $kernel_addr_r idbloader.img
sf erase 0 +$filesize
sf write $kernel_addr_r 0 ${filesize}
load mmc 1:1 ${kernel_addr_r} u-boot.itb
sf erase 0x60000 +$filesize
sf write $kernel_addr_r 0x60000 ${filesize}
TODO
----
@ -171,4 +196,4 @@ TODO
- Add missing SoC's with it boards list
.. Jagan Teki <jagan@amarulasolutions.com>
.. Sunday 24 May 2020 10:08:41 PM IST
.. Tuesday 02 June 2020 12:18:57 AM IST

4
include/configs/roc-pc-rk3399.h
View File

@ -13,10 +13,6 @@
#include <configs/rk3399_common.h>
#if defined(CONFIG_ENV_IS_IN_MMC)
# define CONFIG_SYS_MMC_ENV_DEV 0
#endif
#define SDRAM_BANK_SIZE (2UL << 30)
#endif

2
include/configs/rockpro64_rk3399.h
View File

@ -13,8 +13,6 @@
#include <configs/rk3399_common.h>
#define CONFIG_SYS_MMC_ENV_DEV 0
#define SDRAM_BANK_SIZE (2UL << 30)
#define CONFIG_USB_OHCI_NEW