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AMD/Xilinx changes for v2025.01-rc5

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- Fix reset issue for SOM
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Merge tag 'xilinx-for-v2025.01-rc5' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

AMD/Xilinx changes for v2025.01-rc5

- Fix reset issue for SOM
This commit is contained in:
Tom Rini 2024-12-12 09:20:52 -06:00
commit 39adaa54cc
1 changed files with 6 additions and 0 deletions
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6
drivers/video/zynqmp/zynqmp_dpsub.c
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@ -11,6 +11,7 @@
#include <dm.h>
#include <errno.h>
#include <generic-phy.h>
#include <reset.h>
#include <stdlib.h>
#include <video.h>
#include <wait_bit.h>
@ -2093,10 +2094,15 @@ static int zynqmp_dpsub_probe(struct udevice *dev)
{
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
struct zynqmp_dpsub_priv *priv = dev_get_priv(dev);
struct reset_ctl_bulk resets;
struct clk clk;
int ret;
int mode = RGBA8888;
ret = reset_get_bulk(dev, &resets);
if (!ret)
reset_deassert_bulk(&resets);
ret = clk_get_by_name(dev, "dp_apb_clk", &clk);
if (ret < 0) {
dev_err(dev, "failed to get clock\n");