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AMD/Xilinx changes for v2025.01-rc1 v2

Browse Source 
.mailmap:
 - Switch Padmarao's email to AMD one
 
 zynq_spi:
 - Make update_stripe static
 
 xilinx:
 - Update DT description for EMMCs
 
 zynqmp:
 - Update logic around RPUs and tcm handling
 - Update bootmenu selection for Kria
 - Add description for SC vm-p-b1369
 - Fix comment about file location in zynqmp-p-a2197-00-revA.dts
 
 versal:
 - Fix logic around USB boot
 
 versal2:
 - Disable useless features for Mini configurations
 
 versal-net:
 - Get rid of current-speed DT property from mini configuration
 
 microblaze:
 - Fix scriptaddr location
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZxuweAAKCRDKSWXLKUoM
 IY1iAKCH/GKJHEXFfLvr0OGuO6c1SX9+ZQCfTjRAHrL186X6LUgjOpmtmsrVK1c=
 =4gY0
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2025.01-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

AMD/Xilinx changes for v2025.01-rc1 v2

.mailmap:
- Switch Padmarao's email to AMD one

zynq_spi:
- Make update_stripe static

xilinx:
- Update DT description for EMMCs

zynqmp:
- Update logic around RPUs and tcm handling
- Update bootmenu selection for Kria
- Add description for SC vm-p-b1369
- Fix comment about file location in zynqmp-p-a2197-00-revA.dts

versal:
- Fix logic around USB boot

versal2:
- Disable useless features for Mini configurations

versal-net:
- Get rid of current-speed DT property from mini configuration

microblaze:
- Fix scriptaddr location

# -----BEGIN PGP SIGNATURE-----
#
# iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCZxuweAAKCRDKSWXLKUoM
# IY1iAKCH/GKJHEXFfLvr0OGuO6c1SX9+ZQCfTjRAHrL186X6LUgjOpmtmsrVK1c=
# =4gY0
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 25 Oct 2024 08:51:36 AM CST
# gpg:                using DSA key 1B3CD4CCBD79989413D1C31ECA4965CB294A0C21
# gpg: Good signature from "Michal Simek <monstr@monstr.eu>" [full]
# gpg:                 aka "Michal Simek (Xilinx) <michals@xilinx.com>" [full]
# gpg:                 aka "Michal Simek (Xilinx) <michal.simek@xilinx.com>" [full]
# gpg:                 aka "Michal Simek (AMD) <michal.simek@amd.com>" [unknown]
This commit is contained in:
Tom Rini 2024-10-25 11:55:23 -06:00
commit 3fbc657669
33 changed files with 551 additions and 45 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
.mailmap
View File

@ -89,6 +89,7 @@ Neil Armstrong <neil.armstrong@linaro.org> <narmstrong@baylibre.com>
Nicolas Saenz Julienne <nsaenz@kernel.org> <nsaenzjulienne@suse.de>
This contributor prefers not to receive mails <noreply@example.com> <pali@kernel.org>
This contributor prefers not to receive mails <noreply@example.com> <pali.rohar@gmail.com>
Padmarao Begari <padmarao.begari@amd.com> <padmarao.begari@microchip.com>
Patrice Chotard <patrice.chotard@foss.st.com> <patrice.chotard@st.com>
Patrick Delaunay <patrick.delaunay@foss.st.com> <patrick.delaunay@st.com>
Paul Burton <paul.burton@mips.com> <paul.burton@imgtec.com>

2
arch/arm/dts/Makefile
View File

@ -327,6 +327,7 @@ zynqmp-sc-vpk120-revB-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vpk120-revB.dtbo
zynqmp-sc-vpk180-revA-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vpk180-revA.dtbo
zynqmp-sc-vpk180-revB-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vpk180-revB.dtbo
zynqmp-sc-vn-p-b2197-00-revA-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vn-p-b2197-00-revA.dtbo
zynqmp-sc-vm-p-b1369-00-revA-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vm-p-m1369-00-revA.dtbo
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vek280-revA.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vek280-revB.dtb
@ -335,6 +336,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vpk120-revB.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vpk180-revA.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vpk180-revB.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vn-p-b2197-00-revA.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sc-vm-p-b1369-00-revA.dtb
zynqmp-sm-k26-revA-sck-kv-g-revA-dtbs := zynqmp-sm-k26-revA.dtb zynqmp-sck-kv-g-revA.dtbo
zynqmp-sm-k26-revA-sck-kv-g-revB-dtbs := zynqmp-sm-k26-revA.dtb zynqmp-sck-kv-g-revB.dtbo

3
arch/arm/dts/versal-mini-emmc0.dts
View File

@ -40,6 +40,9 @@
status = "okay";
non-removable;
disable-wp;
no-sd;
no-sdio;
cap-mmc-hw-reset;
bus-width = <8>;
reg = <0x0 0xf1040000 0x0 0x10000>;
clock-names = "clk_xin", "clk_ahb";

3
arch/arm/dts/versal-mini-emmc1.dts
View File

@ -40,6 +40,9 @@
status = "okay";
non-removable;
disable-wp;
no-sd;
no-sdio;
cap-mmc-hw-reset;
bus-width = <8>;
reg = <0x0 0xf1050000 0x0 0x10000>;
clock-names = "clk_xin", "clk_ahb";

3
arch/arm/dts/versal-net-mini-emmc.dts
View File

@ -54,6 +54,9 @@
status = "okay";
non-removable;
disable-wp;
no-sd;
no-sdio;
cap-mmc-hw-reset;
bus-width = <8>;
reg = <0 0xf1050000 0 0x10000>;
clock-names = "clk_xin", "clk_ahb";

1
arch/arm/dts/versal-net-mini.dts
View File

@ -60,7 +60,6 @@
clock-names = "uartclk", "apb_pclk";
clocks = <&clk1>, <&clk1>;
clock = <1000000>;
current-speed = <115200>;
skip-init;
};
};

3
arch/arm/dts/zynq-dlc20-rev1.0.dts
View File

@ -83,6 +83,9 @@
bootph-all;
status = "okay"; /* EMMC MTFC4GACAJCN - MIO40-MIO45 */
non-removable;
no-sd;
no-sdio;
cap-mmc-hw-reset;
bus-width = <4>;
};

3
arch/arm/dts/zynq-minized.dts
View File

@ -92,6 +92,9 @@
&sdhci1 {
status = "okay";
non-removable;
no-sd;
no-sdio;
cap-mmc-hw-reset;
bus-width = <4>;
max-frequency = <12000000>;

3
arch/arm/dts/zynqmp-dlc21-revA.dts
View File

@ -60,6 +60,9 @@
status = "okay";
non-removable;
disable-wp;
no-sd;
no-sdio;
cap-mmc-hw-reset;
bus-width = <8>;
xlnx,mio-bank = <0>;
};

3
arch/arm/dts/zynqmp-g-a2197-00-revA.dts
View File

@ -68,6 +68,9 @@
status = "okay";
non-removable;
disable-wp;
no-sd;
no-sdio;
cap-mmc-hw-reset;
bus-width = <8>;
xlnx,mio-bank = <0>;
};

3
arch/arm/dts/zynqmp-m-a2197-01-revA.dts
View File

@ -88,6 +88,9 @@
status = "okay";
non-removable;
disable-wp;
no-sd;
no-sdio;
cap-mmc-hw-reset;
bus-width = <8>;
xlnx,mio-bank = <0>; /* FIXME tap delay */
};

3
arch/arm/dts/zynqmp-m-a2197-02-revA.dts
View File

@ -84,6 +84,9 @@
status = "okay";
non-removable;
disable-wp;
no-sd;
no-sdio;
cap-mmc-hw-reset;
bus-width = <8>;
xlnx,mio-bank = <0>; /* FIXME tap delay */
};

3
arch/arm/dts/zynqmp-m-a2197-03-revA.dts
View File

@ -84,6 +84,9 @@
status = "okay";
non-removable;
disable-wp;
no-sd;
no-sdio;
cap-mmc-hw-reset;
bus-width = <8>;
xlnx,mio-bank = <0>; /* FIXME tap delay */
};

3
arch/arm/dts/zynqmp-mini-emmc0.dts
View File

@ -52,6 +52,9 @@
compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
status = "disabled";
non-removable;
no-sd;
no-sdio;
cap-mmc-hw-reset;
bus-width = <8>;
reg = <0x0 0xff160000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb";

3
arch/arm/dts/zynqmp-mini-emmc1.dts
View File

@ -52,6 +52,9 @@
compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
status = "disabled";
non-removable;
no-sd;
no-sdio;
cap-mmc-hw-reset;
bus-width = <8>;
reg = <0x0 0xff170000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb";

47
arch/arm/dts/zynqmp-p-a2197-00-revA.dts
View File

@ -60,6 +60,9 @@
status = "okay";
non-removable;
disable-wp;
no-sd;
no-sdio;
cap-mmc-hw-reset;
bus-width = <8>;
xlnx,mio-bank = <0>;
};
@ -155,7 +158,7 @@
reg = <0>;
/* On connector J98 */
reg_vcc_fmc: tps544@7 { /* u80 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x7>;
regulator-name = "reg_vcc_fmc";
regulator-min-microvolt = <1800000>;
@ -163,15 +166,15 @@
/* enable-gpio = <&gpio0 23 0x4>; optional */
};
reg_vcc_ram: tps544@8 { /* u83 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x8>;
};
reg_vcc_pslp: tps544@9 { /* u85 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x9>;
};
reg_vcc_psfp: tps544@a { /* u86 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0xa>;
};
reg_vccint: tps53681@60 { /* u70 - FIXME name - don't know what it does - also vcc_io_soc */
@ -212,75 +215,75 @@
reg = <2>;
/* On connector J104 */
reg_vccaus: tps544@d { /* u88 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0xd>;
};
reg_vccaux_fmc: tps544@e { /* u90 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0xe>;
};
reg_vcco_500: tps544@f { /* u93 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0xf>;
};
reg_vcco_501: tps544@10 { /* u95 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x10>;
};
reg_vcco_502: tps544@11 { /* u97 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x11>;
};
reg_vcco_503: tps544@12 { /* u99 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x12>;
};
reg_vcc1v8: tps544@13 { /* u101 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x13>;
};
reg_vcc3v3: tps544@14 { /* u102 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x14>;
};
reg_vcc1v2_ddr4: tps544@15 { /* u104 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x15>;
};
reg_vcc1v1_lp4: tps544@16 { /* u106 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x16>;
};
reg_vcc1_1V8_lp4: tps544@17 { /* u108 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x17>;
};
reg_vadj_fmc: tps544@19 { /* u109 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x19>;
};
reg_mgtyavcc: tps544@1a { /* u111 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x1a>;
};
reg_mgtyavtt: tps544@1b { /* u114 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x1b>;
};
reg_mgtyvccaux: tps544@1c { /* u115 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x1c>;
};
reg_util_1v13: tps544@1d { /* u117 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x1d>;
};
reg_util_1v8: tps544@1e { /* u118 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x1e>;
};
reg_util_2v5: tps544@1f { /* u119 - FIXME name - don't know what it does */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus.rst - wiring is missing */
reg = <0x1f>;
};
};

3
arch/arm/dts/zynqmp-sc-revB.dts
View File

@ -288,6 +288,9 @@
status = "okay";
non-removable;
disable-wp;
no-sd;
no-sdio;
cap-mmc-hw-reset;
bus-width = <8>;
xlnx,mio-bank = <0>;
};

400
arch/arm/dts/zynqmp-sc-vm-p-m1369-00-revA.dtso Normal file
View File

@ -0,0 +1,400 @@
// SPDX-License-Identifier: GPL-2.0
/*
* dts file for Xilinx ZynqMP VM-P-M1369-00
*
* Copyright (C) 2024, Advanced Micro Devices, Inc.
*
* Michal Simek <michal.simek@amd.com>
*/
#include <dt-bindings/gpio/gpio.h>
/dts-v1/;
/plugin/;
&{/} {
compatible = "xlnx,zynqmp-sc-vm-p-m1369-revA",
"xlnx,zynqmp-sc-vm-p-m1369", "xlnx,zynqmp";
ina226-u19 {
compatible = "iio-hwmon";
io-channels = <&vcc_soc_ina 0>, <&vcc_soc_ina 1>, <&vcc_soc_ina 2>;
};
ina226-u287 {
compatible = "iio-hwmon";
io-channels = <&vcc_ram_ina 0>, <&vcc_ram_ina 1>, <&vcc_ram_ina 2>;
};
ina226-u288 {
compatible = "iio-hwmon";
io-channels = <&vcc_pslp_ina 0>, <&vcc_pslp_ina 1>, <&vcc_pslp_ina 2>;
};
ina226-u289 {
compatible = "iio-hwmon";
io-channels = <&vccaux_ina 0>, <&vccaux_ina 1>, <&vccaux_ina 2>;
};
ina226-u290 {
compatible = "iio-hwmon";
io-channels = <&vccaux_pmc_ina 0>, <&vccaux_pmc_ina 1>, <&vccaux_pmc_ina 2>;
};
ina226-u291 {
compatible = "iio-hwmon";
io-channels = <&vcco_500_ina 0>, <&vcco_500_ina 1>, <&vcco_500_ina 2>;
};
ina226-u292 {
compatible = "iio-hwmon";
io-channels = <&vcco_501_ina 0>, <&vcco_501_ina 1>, <&vcco_501_ina 2>;
};
ina226-u293 {
compatible = "iio-hwmon";
io-channels = <&vcco_502_ina 0>, <&vcco_502_ina 1>, <&vcco_502_ina 2>;
};
ina226-u294 {
compatible = "iio-hwmon";
io-channels = <&vcco_503_ina 0>, <&vcco_503_ina 1>, <&vcco_503_ina 2>;
};
ina226-u295 {
compatible = "iio-hwmon";
io-channels = <&vcc_ddr5_rdimm_ina 0>, <&vcc_ddr5_rdimm_ina 1>, <&vcc_ddr5_rdimm_ina 2>;
};
ina226-u298 {
compatible = "iio-hwmon";
io-channels = <&lp5_1v0_ina 0>, <&lp5_1v0_ina 1>, <&lp5_1v0_ina 2>;
};
ina226-u296 {
compatible = "iio-hwmon";
io-channels = <&vcc_fmc_ina 0>, <&vcc_fmc_ina 1>, <&vcc_fmc_ina 2>;
};
ina226-u299 {
compatible = "iio-hwmon";
io-channels = <&gtm_avcc_ina 0>, <&gtm_avcc_ina 1>, <&gtm_avcc_ina 2>;
};
ina226-u300 {
compatible = "iio-hwmon";
io-channels = <&gtm_avtt_ina 0>, <&gtm_avtt_ina 1>, <&gtm_avtt_ina 2>;
};
ina226-u301 {
compatible = "iio-hwmon";
io-channels = <&gtm_avccaux_ina 0>, <&gtm_avccaux_ina 1>, <&gtm_avccaux_ina 2>;
};
ina226-u297 {
compatible = "iio-hwmon";
io-channels = <&vcc_mipi_ina 0>, <&vcc_mipi_ina 1>, <&vcc_mipi_ina 2>;
};
};
&i2c1 { /* i2c_main bus */
#address-cells = <1>;
#size-cells = <0>;
/* u97 eeprom at 0x54 described in sc-revB - WP protection via BOARD_EEPROM_WP - J1801 */
/* i2c_main_1 - u72 - j108 - disable translation, add 8 */
/* J133 - OE for u91@55 + 8 - 161,132813MHz - QSFP56G_0 */
qsfp56g_0_clk: clock-controller@5d {
compatible = "renesas,proxo-xp";
reg = <0x5d>;
#clock-cells = <0>;
clock-output-names = "qsfp56g_0_clk";
};
/* J134 - OE for u92@57 + 8 - 322,265625MHz - QSFP56G_1 */
qsfp56g_1_clk: clock-controller@5f {
compatible = "renesas,proxo-xp";
reg = <0x5f>;
#clock-cells = <0>;
clock-output-names = "qsfp56g_1_clk";
};
/* i2c_main_2 - u74 - j110 - disable translation, add 9 */
/* J210 - OE for u164@50 + 9 - 320MHz - CH2_LP5 */
ch2_lpddr5_refclk: clock-controller@59 {
compatible = "renesas,proxo-xp";
reg = <0x59>;
#clock-cells = <0>;
clock-output-names = "ch2_lpddr5_refclk";
};
/* i2c_main_3 - u76 - j112 - disable translation, add 6 */
/* J231 - OE for u165@50 + 6 - 320MHz - _RDIMM */
ddr5_dimm1_refclk: clock-controller@56 {
compatible = "renesas,proxo-xp";
reg = <0x56>;
#clock-cells = <0>;
clock-output-names = "ddr5_udimm_refclk";
};
/* i2c_main_4 - u73 - j109 - disable translation, add 5 */
/* J117 - OE for u82@50 + 5 - 33,3333MHz - PS_REFCLK */
ps_refclk: clock-controller@55 {
compatible = "renesas,proxo-xp";
reg = <0x55>;
#clock-cells = <0>;
clock-output-names = "ps_refclk";
};
/* J71 - selection to LP_I2C_SCL_J or LP_I2C_PMC_SCL_J */
/* J70 - selection to LP_I2C_SDA_J or LP_I2C_PMC_SDA_J */
/* this should be SW controlable too */
};
&i2c0 {
#address-cells = <1>;
#size-cells = <0>;
/* u134 tps544b25 but connected to J178 connector */
/* u48/IMx3112/0x77 - 1:2 multiplexer - also accessed from Versal NET */
/* Connection DDR5_UDIMM - SPD can be from 0x50-0x57 */
/* FIXME gpio should handle SYSCTLR_PMBUS_ALERT and also INA226_PMBUS_ALERT */
/* Access to i2c_pmc bus via u49 with OE j100 or via SYSCTLR_I2C_PMC_EN */
/* ina226_pmbus - J103 - disable INA226_PMBUS */
vcc_soc_ina: power-monitor@40 { /* u19 */
compatible = "ti,ina226";
#io-channel-cells = <1>;
reg = <0x40>;
shunt-resistor = <1000>; /* R222 */
};
vcc_ram_ina: power-monitor@41 { /* u287 */
compatible = "ti,ina226";
#io-channel-cells = <1>;
reg = <0x41>;
shunt-resistor = <1000>; /* R32981 */
};
vcc_pslp_ina: power-monitor@42 { /* u288 */
compatible = "ti,ina226";
#io-channel-cells = <1>;
reg = <0x42>;
shunt-resistor = <1000>; /* R32984 */
};
vccaux_ina: power-monitor@43 { /* u289 */
compatible = "ti,ina226";
#io-channel-cells = <1>;
reg = <0x43>;
shunt-resistor = <1000>; /* R32987 */
};
vccaux_pmc_ina: power-monitor@44 { /* u290 */
compatible = "ti,ina226";
#io-channel-cells = <1>;
reg = <0x44>;
shunt-resistor = <1000>; /* R32990 */
};
vcco_500_ina: power-monitor@45 { /* u291 */
compatible = "ti,ina226";
#io-channel-cells = <1>;
reg = <0x45>;
shunt-resistor = <1000>; /* R32993 */
};
vcco_501_ina: power-monitor@46 { /* u292 */
compatible = "ti,ina226";
#io-channel-cells = <1>;
reg = <0x46>;
shunt-resistor = <1000>; /* R32996 */
};
vcco_502_ina: power-monitor@47 { /* u293 */
compatible = "ti,ina226";
#io-channel-cells = <1>;
reg = <0x47>;
shunt-resistor = <1000>; /* R32999 */
};
vcco_503_ina: power-monitor@48 { /* u294 */
compatible = "ti,ina226";
#io-channel-cells = <1>;
reg = <0x48>;
shunt-resistor = <1000>; /* R33002 */
};
vcc_ddr5_rdimm_ina: power-monitor@49 { /* u295 */
compatible = "ti,ina226";
#io-channel-cells = <1>;
reg = <0x49>;
shunt-resistor = <1000>; /* R33005 */
};
lp5_1v0_ina: power-monitor@4a { /* u298 */
compatible = "ti,ina226";
#io-channel-cells = <1>;
reg = <0x4a>;
shunt-resistor = <1000>; /* R33014 */
};
vcc_fmc_ina: power-monitor@4b { /* u296 */
compatible = "ti,ina226";
#io-channel-cells = <1>;
reg = <0x4b>;
shunt-resistor = <1000>; /* R33008 */
};
gtm_avcc_ina: power-monitor@4c { /* u299 */
compatible = "ti,ina226";
#io-channel-cells = <1>;
reg = <0x4c>;
shunt-resistor = <1000>; /* R33017 */
};
gtm_avtt_ina: power-monitor@4d { /* u300 */
compatible = "ti,ina226";
#io-channel-cells = <1>;
reg = <0x4d>;
shunt-resistor = <1000>; /* R33020 */
};
gtm_avccaux_ina: power-monitor@4e { /* u301 */
compatible = "ti,ina226";
#io-channel-cells = <1>;
reg = <0x4e>;
shunt-resistor = <1000>; /* R33023 */
};
vcc_mipi_ina: power-monitor@4f { /* u297 */
compatible = "ti,ina226";
#io-channel-cells = <1>;
reg = <0x4f>;
shunt-resistor = <1000>; /* R33011 */
};
/* pmbus - j105 - disable main PMBUS - also going to j102 connector */
vcc_pslp: regulator@15 { /* u24 */
compatible = "ti,tps546b24a";
reg = <0x15>;
};
vccaux_pmc: regulator@17 { /* u26 */
compatible = "ti,tps546b24a";
reg = <0x17>;
};
vcco_500: regulator@18 { /* u27 */
compatible = "ti,tps546b24a";
reg = <0x18>;
};
vcco_501: regulator@19 { /* u28 */
compatible = "ti,tps546b24a";
reg = <0x19>;
};
vcco_502: regulator@1a { /* u29 */
compatible = "ti,tps546b24a";
reg = <0x1a>;
};
vcco_503: regulator@1b { /* u30 */
compatible = "ti,tps546b24a";
reg = <0x1b>;
};
vcc_ddr5_rdimm: regulator@1c { /* u31 */
compatible = "ti,tps546b24a";
reg = <0x1c>;
};
gtm_avcc: regulator@22 { /* u37 */
compatible = "ti,tps546b24a";
reg = <0x22>;
};
gtm_avtt: regulator@20 { /* u38 */
compatible = "ti,tps546b24a";
reg = <0x20>;
};
gtm_avccaux: regulator@21 { /* u39 */
compatible = "ti,tps546b24a";
reg = <0x21>;
};
vccint_gt: regulator@2a { /* u44 */
compatible = "ti,tps546b24a";
reg = <0x2a>;
};
util_1v8: regulator@2b { /* u1839 */
compatible = "ti,tps546b24a";
reg = <0x2b>;
};
vcc_pmc: regulator@2c { /* u46 */
compatible = "ti,tps546b24a";
reg = <0x2c>;
};
/* pmbus via U62 as ext_pmbus - disable via j104 */
vccint: regulator@10 { /* u18 */
compatible = "ti,tps546b24";
reg = <0x10>;
};
vccsoc: regulator@11 { /* u20 */
compatible = "ti,tps546b24";
reg = <0x11>;
};
vcc_io: regulator@12 { /* u21 */
compatible = "ti,tps546b24";
reg = <0x12>;
};
vcc_psfp: regulator@13 { /* u22 */
compatible = "ti,tps546b24";
reg = <0x13>;
};
vcc_ram: regulator@14 { /* u23 */
compatible = "ti,tps546b24";
reg = <0x14>;
};
vccaux: regulator@16 { /* u25 */
compatible = "ti,tps546b24";
reg = <0x16>;
};
lp5_1v0: regulator@1d { /* u32 */
compatible = "ti,tps546b24";
reg = <0x1d>;
};
vcc_fmc: regulator@1e { /* u33 */
compatible = "ti,tps546b24";
reg = <0x1e>;
};
lp5_vdd1: regulator@25 { /* u40 */
compatible = "ti,tps546b24";
reg = <0x25>;
};
lp5_vdd2: regulator@26 { /* u41 */
compatible = "ti,tps546b24";
reg = <0x26>;
};
lp5_vddq: regulator@27 { /* u42 */
compatible = "ti,tps546b24";
reg = <0x27>;
};
vcco_hdio: regulator@29 { /* u43 */
compatible = "ti,tps546b24";
reg = <0x29>;
};
vcc_mipi: regulator@1f { /* u47 */
compatible = "ti,tps546b24";
reg = <0x1f>;
};
/* connected via J425 connector
ucd90320: power-sequencer@73 { // u16
compatible = "ti,ucd90320";
reg = <0x73>;
};*/
};

3
arch/arm/dts/zynqmp-sm-k26-revA.dts
View File

@ -247,6 +247,9 @@
pinctrl-0 = <&pinctrl_sdhci0_default>;
non-removable;
disable-wp;
no-sd;
no-sdio;
cap-mmc-hw-reset;
bus-width = <8>;
xlnx,mio-bank = <0>;
assigned-clock-rates = <187498123>;

3
arch/arm/dts/zynqmp-topic-miamimp-xilinx-xdp-v1r1.dts
View File

@ -93,6 +93,9 @@
status = "okay";
non-removable;
disable-wp; /* We don't have a write-protect detection */
no-sd;
no-sdio;
cap-mmc-hw-reset;
bus-width = <8>;
xlnx,mio-bank = <0>;
};

3
arch/arm/dts/zynqmp-vpk120-revA.dts
View File

@ -105,6 +105,9 @@
status = "okay";
non-removable;
disable-wp;
no-sd;
no-sdio;
cap-mmc-hw-reset;
bus-width = <8>;
xlnx,mio-bank = <0>;
};

3
arch/arm/dts/zynqmp-zcu100-revC.dts
View File

@ -509,6 +509,9 @@
xlnx,mio-bank = <0>;
non-removable;
disable-wp;
no-sd;
no-sdio;
cap-mmc-hw-reset;
cap-power-off-card;
mmc-pwrseq = <&sdio_pwrseq>;
vqmmc-supply = <&wmmcsdio_fixed>;

23
arch/arm/mach-zynqmp/cpu.c
View File

@ -112,19 +112,32 @@ u64 get_page_table_size(void)
return 0x14000;
}
#if defined(CONFIG_SYS_MEM_RSVD_FOR_MMU) || defined(CONFIG_DEFINE_TCM_OCM_MMAP)
#if defined(CONFIG_DEFINE_TCM_OCM_MMAP)
void tcm_init(u8 mode)
{
puts("WARNING: Initializing TCM overwrites TCM content\n");
initialize_tcm(mode);
memset((void *)ZYNQMP_TCM_BASE_ADDR, 0, ZYNQMP_TCM_SIZE);
int ret;
ret = check_tcm_mode(mode);
if (!ret) {
puts("WARNING: Initializing TCM overwrites TCM content\n");
initialize_tcm(mode);
memset((void *)ZYNQMP_TCM_BASE_ADDR, 0, ZYNQMP_TCM_SIZE);
}
if (ret == -EACCES)
printf("ERROR: Split to lockstep mode required reset/disable cpu\n");
/* Ignore if ret is -EAGAIN, trying to initialize same mode again */
}
#endif
#ifdef CONFIG_SYS_MEM_RSVD_FOR_MMU
int arm_reserve_mmu(void)
{
tcm_init(TCM_LOCK);
puts("WARNING: Initializing TCM overwrites TCM content\n");
initialize_tcm(TCM_LOCK);
memset((void *)ZYNQMP_TCM_BASE_ADDR, 0, ZYNQMP_TCM_SIZE);
gd->arch.tlb_size = PGTABLE_SIZE;
gd->arch.tlb_addr = ZYNQMP_TCM_BASE_ADDR;

3
arch/arm/mach-zynqmp/include/mach/sys_proto.h
View File

@ -48,9 +48,10 @@ enum {
unsigned int zynqmp_get_silicon_version(void);
int check_tcm_mode(bool mode);
void initialize_tcm(bool mode);
void mem_map_fill(void);
#if defined(CONFIG_SYS_MEM_RSVD_FOR_MMU) || defined(CONFIG_DEFINE_TCM_OCM_MMAP)
#if defined(CONFIG_DEFINE_TCM_OCM_MMAP)
void tcm_init(u8 mode);
#endif

24
arch/arm/mach-zynqmp/mp.c
View File

@ -12,7 +12,9 @@
#include <asm/arch/hardware.h>
#include <asm/arch/sys_proto.h>
#include <asm/io.h>
#include <linux/bitfield.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/string.h>
#define LOCK 0
@ -264,6 +266,28 @@ void initialize_tcm(bool mode)
}
}
int check_tcm_mode(bool mode)
{
u32 tmp, cpu_state;
bool mode_prev;
tmp = readl(&rpu_base->rpu_glbl_ctrl);
mode_prev = FIELD_GET(ZYNQMP_RPU_GLBL_CTRL_SPLIT_LOCK_MASK, tmp);
tmp = readl(&crlapb_base->rst_lpd_top);
cpu_state = FIELD_GET(ZYNQMP_CRLAPB_RST_LPD_R50_RST_MASK |
ZYNQMP_CRLAPB_RST_LPD_R51_RST_MASK, tmp);
cpu_state = cpu_state ? false : true;
if ((mode_prev == SPLIT && mode == LOCK) && cpu_state)
return -EACCES;
if (mode_prev == mode)
return -EAGAIN;
return 0;
}
static void mark_r5_used(u32 nr, u8 mode)
{
u32 mask = 0;

16
arch/arm/mach-zynqmp/zynqmp.c
View File

@ -151,14 +151,12 @@ static int do_zynqmp_tcm_init(struct cmd_tbl *cmdtp, int flag, int argc,
if (argc != cmdtp->maxargs)
return CMD_RET_USAGE;
if (strcmp(argv[2], "lockstep") && strcmp(argv[2], "split")) {
printf("mode param should be lockstep or split\n");
return CMD_RET_FAILURE;
}
mode = hextoul(argv[2], NULL);
if (mode != TCM_LOCK && mode != TCM_SPLIT) {
printf("Mode should be either 0(lock)/1(split)\n");
if (!strcmp(argv[2], "lockstep") || !strcmp(argv[2], "0")) {
mode = TCM_LOCK;
} else if (!strcmp(argv[2], "split") || !strcmp(argv[2], "1")) {
mode = TCM_SPLIT;
} else {
printf("Mode should be either lockstep/split\n");
return CMD_RET_FAILURE;
}
@ -429,7 +427,7 @@ U_BOOT_LONGHELP(zynqmp,
" initialized before accessing to avoid ECC\n"
" errors. mode specifies in which mode TCM has\n"
" to be initialized. Supported modes will be\n"
" lock(0)/split(1)\n"
" lockstep(0)/split(1)\n"
#endif
"zynqmp pmufw address size - load PMU FW configuration object\n"
"zynqmp pmufw node <id> - load PMU FW configuration object, <id> in dec\n"

2
board/xilinx/microblaze-generic/microblaze-generic.c
View File

@ -57,7 +57,7 @@ int board_late_init(void)
max_size = gd->start_addr_sp - CONFIG_STACK_SIZE;
max_size = round_down(max_size, SZ_16M);
status |= env_set_hex("scriptaddr", max_size + SZ_2M);
status |= env_set_hex("scriptaddr", (max_size - gd->ram_base) + SZ_2M);
status |= env_set_hex("pxefile_addr_r", max_size + SZ_1M);

3
board/xilinx/zynqmp/zynqmp_kria.env
View File

@ -51,8 +51,7 @@ som_mmc_boot=setenv boot_targets mmc0 && run distro_bootcmd
# To disable bootmenu set enable_bootmenu=0
enable_bootmenu=1
check_cc_for_default_boot=if test ${card1_name} = SCK-KV-G || test ${card1_name} = SCK-KR-G || test ${card1_name} = SCK-KD-G; then setenv bootmenu_default 1; else setenv bootmenu_default 0; fi
som_bootmenu=if test ${enable_bootmenu} = 1; then run check_cc_for_default_boot; bootmenu; else run som_mmc_boot; fi
som_bootmenu=if test ${enable_bootmenu} = 1; then bootmenu; else run som_mmc_boot; fi
k26_starter=SMK-K26-XCL2G
k24_starter=SMK-K24-XCL2G

3
configs/amd_versal2_mini_defconfig
View File

@ -22,6 +22,7 @@ CONFIG_SYS_MEMTEST_START=0x00000000
CONFIG_SYS_MEMTEST_END=0x00001000
# CONFIG_EXPERT is not set
CONFIG_REMAKE_ELF=y
# CONFIG_EFI_LOADER is not set
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_AUTOBOOT is not set
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
@ -35,6 +36,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SYS_PROMPT="versal2> "
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTM is not set
# CONFIG_CMD_BOOTI is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_FDT is not set
@ -75,3 +77,4 @@ CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_ARM_DCC=y
CONFIG_PL01X_SERIAL=y
# CONFIG_GZIP is not set
# CONFIG_LMB is not set

3
configs/amd_versal2_mini_ospi_defconfig
View File

@ -20,6 +20,7 @@ CONFIG_SYS_MEM_RSVD_FOR_MMU=y
CONFIG_DEBUG_UART=y
# CONFIG_EXPERT is not set
CONFIG_REMAKE_ELF=y
# CONFIG_EFI_LOADER is not set
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_AUTOBOOT is not set
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
@ -33,6 +34,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SYS_PROMPT="versal2> "
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTM is not set
# CONFIG_CMD_BOOTI is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_FDT is not set
@ -82,3 +84,4 @@ CONFIG_HAS_CQSPI_REF_CLK=y
CONFIG_CQSPI_REF_CLK=200000000
CONFIG_CADENCE_OSPI_VERSAL=y
# CONFIG_GZIP is not set
# CONFIG_LMB is not set

4
configs/amd_versal2_mini_qspi_defconfig
View File

@ -20,6 +20,7 @@ CONFIG_SYS_MEM_RSVD_FOR_MMU=y
CONFIG_DEBUG_UART=y
# CONFIG_EXPERT is not set
CONFIG_REMAKE_ELF=y
# CONFIG_EFI_LOADER is not set
# CONFIG_LEGACY_IMAGE_FORMAT is not set
# CONFIG_AUTOBOOT is not set
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
@ -33,6 +34,7 @@ CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_SYS_PROMPT="versal2> "
# CONFIG_CMD_CONSOLE is not set
# CONFIG_CMD_BOOTD is not set
# CONFIG_CMD_BOOTM is not set
# CONFIG_CMD_BOOTI is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_FDT is not set
@ -62,7 +64,6 @@ CONFIG_NO_NET=y
# CONFIG_I2C is not set
# CONFIG_INPUT is not set
# CONFIG_MMC is not set
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
# CONFIG_SPI_FLASH_LOCK is not set
CONFIG_SPI_FLASH_STMICRO=y
@ -77,3 +78,4 @@ CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_ZYNQMP_GQSPI=y
# CONFIG_GZIP is not set
# CONFIG_LMB is not set

2
drivers/spi/zynq_qspi.c
View File

@ -734,7 +734,7 @@ static int zynq_qspi_set_mode(struct udevice *bus, uint mode)
return 0;
}
bool update_stripe(const struct spi_mem_op *op)
static bool update_stripe(const struct spi_mem_op *op)
{
if (op->cmd.opcode == SPINOR_OP_BE_4K ||
op->cmd.opcode == SPINOR_OP_CHIP_ERASE ||

11
include/configs/xilinx_versal.h
View File

@ -48,6 +48,12 @@
# define BOOT_TARGET_DEVICES_MMC(func)
#endif
#if defined(CONFIG_USB_STORAGE)
# define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
#else
# define BOOT_TARGET_DEVICES_USB(func)
#endif
#if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP)
# define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
#else
@ -85,7 +91,7 @@
"jtag "
#define BOOT_TARGET_DEVICES_USB_DFU(func) \
func(USB_DFU, usb_dfu, 0) func(USB_DFU, usb_dfu, 1)
func(USB_DFU, usb_dfu, 0)
#define BOOTENV_DEV_USB_DFU(devtypeu, devtypel, instance) \
"bootcmd_" #devtypel #instance "=setenv dfu_alt_info boot.scr ram " \
@ -99,7 +105,7 @@
""
#define BOOT_TARGET_DEVICES_USB_THOR(func) \
func(USB_THOR, usb_thor, 0) func(USB_THOR, usb_thor, 1)
func(USB_THOR, usb_thor, 0)
#define BOOTENV_DEV_USB_THOR(devtypeu, devtypel, instance) \
"bootcmd_" #devtypel #instance "=setenv dfu_alt_info boot.scr ram " \
@ -118,6 +124,7 @@
BOOT_TARGET_DEVICES_XSPI(func) \
BOOT_TARGET_DEVICES_USB_DFU(func) \
BOOT_TARGET_DEVICES_USB_THOR(func) \
BOOT_TARGET_DEVICES_USB(func) \
BOOT_TARGET_DEVICES_PXE(func) \
BOOT_TARGET_DEVICES_DHCP(func)