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rockchip: rk3308-rock-s0: Fix SD-card boot on v1.1 hw revision

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BootROM leave GPIO4_D6 configured as SDMMC_PWREN function and DW MMC
driver set PWREN high in dwmci_init().

However, HW revision prior to v1.2 must pull GPIO4_D6 low to access
sdmmc. For HW revision v1.2 the state of GPIO4_D6 has no impact.

Upstream Linux commit 26c100232b09 "arm64: dts: rockchip: Fix sdmmc
access on rk3308-rock-s0 v1.1 boards" fixed this issue by adding a
vcc_sd regulator.

Include the new vcc_sd regulator in SPL and enable required Kconfig
options to set GPIO4_D6 low to fix reading sdmmc on v1.1 hw revision.

Fixes: 25438c40a007 ("board: rockchip: Add Radxa ROCK S0")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Jonas Karlman 2025-02-20 18:31:28 +00:00 committed by Kever Yang
parent b78f8677cd
commit 4871db6082
2 changed files with 14 additions and 0 deletions
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12
arch/arm/dts/rk3308-rock-s0-u-boot.dtsi
View File

@ -7,6 +7,14 @@
bootph-some-ram;
};
&gpio4 {
bootph-pre-ram;
};
&sdmmc_2030 {
bootph-pre-ram;
};
&uart0 {
bootph-all;
clock-frequency = <24000000>;
@ -16,6 +24,10 @@
bootph-all;
};
&vcc_sd {
bootph-pre-ram;
};
&vdd_core {
regulator-init-microvolt = <1015000>;
};

2
configs/rock-s0-rk3308_defconfig
View File

@ -2,6 +2,7 @@ CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3308-rock-s0"
CONFIG_DM_RESET=y
CONFIG_ROCKCHIP_RK3308=y
@ -53,6 +54,7 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PINCTRL=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_SPL_DM_REGULATOR_FIXED=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_BAUDRATE=1500000