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arm: socfpga: Fix with the correct polling on bit is set
Commit 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10") Polling on wrong cleared bit. Fix with correct polling on bit is set. Fixes: 2baa997240d ("arm: socfpga: Add FPGA driver support for Arria 10") Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
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@ -111,12 +111,12 @@ static int wait_for_nconfig_pin_and_nstatus_pin(void)
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unsigned long mask = ALT_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN_SET_MSK |
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unsigned long mask = ALT_FPGAMGR_IMGCFG_STAT_F2S_NCONFIG_PIN_SET_MSK |
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ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK;
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ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK;
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/* Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop until de-asserted,
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/*
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* timeout at 1000ms
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* Poll until f2s_nconfig_pin and f2s_nstatus_pin; loop until
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* de-asserted, timeout at 1000ms
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*/
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*/
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return wait_for_bit_le32(&fpga_manager_base->imgcfg_stat,
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return wait_for_bit_le32(&fpga_manager_base->imgcfg_stat, mask,
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mask,
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true, FPGA_TIMEOUT_MSEC, false);
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false, FPGA_TIMEOUT_MSEC, false);
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}
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}
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static int wait_for_f2s_nstatus_pin(unsigned long value)
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static int wait_for_f2s_nstatus_pin(unsigned long value)
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