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clk/qcom: apq8016: add support for USB_HS clocks

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The newer "register map for simple gate clocks" support added for qcom
clocks is used. As a result gcc_apq8016 now has a mixture of the old and
new styles. I didn't (and still don't!) feel comfortable enough in this
area to update the existing code.

Signed-off-by: Sam Day <me@samcday.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
This commit is contained in:
Sam Day 2024-05-06 10:26:54 +00:00 committed by Caleb Connolly
parent 79237af79b
commit 4fb4bb08e7
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1 changed files with 32 additions and 0 deletions
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32
drivers/clk/qcom/clock-apq8016.c
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@ -16,6 +16,8 @@
#include "clock-qcom.h" #include "clock-qcom.h"
#define USB_HS_SYSTEM_CLK_CMD_RCGR 0x41010
/* Clocks: (from CLK_CTL_BASE) */ /* Clocks: (from CLK_CTL_BASE) */
#define GPLL0_STATUS (0x2101C) #define GPLL0_STATUS (0x2101C)
#define APCS_GPLL_ENA_VOTE (0x45000) #define APCS_GPLL_ENA_VOTE (0x45000)
@ -51,6 +53,11 @@ static struct vote_clk gcc_blsp1_ahb_clk = {
.vote_bit = BIT(10), .vote_bit = BIT(10),
}; };
static const struct gate_clk apq8016_clks[] = {
GATE_CLK(GCC_USB_HS_AHB_CLK, 0x41008, 0x00000001),
GATE_CLK(GCC_USB_HS_SYSTEM_CLK, 0x41004, 0x00000001),
};
/* SDHCI */ /* SDHCI */
static int apq8016_clk_init_sdc(struct msm_clk_priv *priv, int slot, uint rate) static int apq8016_clk_init_sdc(struct msm_clk_priv *priv, int slot, uint rate)
{ {
@ -116,13 +123,38 @@ static ulong apq8016_clk_set_rate(struct clk *clk, ulong rate)
case GCC_BLSP1_UART2_APPS_CLK: /* UART2 */ case GCC_BLSP1_UART2_APPS_CLK: /* UART2 */
apq8016_clk_init_uart(priv->base, clk->id); apq8016_clk_init_uart(priv->base, clk->id);
return 7372800; return 7372800;
case GCC_USB_HS_SYSTEM_CLK:
if (rate != 80000000)
log_warning("Unexpected rate %ld requested for USB_HS_SYSTEM_CLK\n",
rate);
clk_rcg_set_rate_mnd(priv->base, USB_HS_SYSTEM_CLK_CMD_RCGR,
10, 0, 0, CFG_CLK_SRC_GPLL0, 0);
return rate;
default: default:
return 0; return 0;
} }
} }
static int apq8016_clk_enable(struct clk *clk)
{
struct msm_clk_priv *priv = dev_get_priv(clk->dev);
if (priv->data->num_clks < clk->id) {
log_warning("%s: unknown clk id %lu\n", __func__, clk->id);
return 0;
}
debug("%s: clk %s\n", __func__, apq8016_clks[clk->id].name);
qcom_gate_clk_en(priv, clk->id);
return 0;
}
static struct msm_clk_data apq8016_clk_data = { static struct msm_clk_data apq8016_clk_data = {
.set_rate = apq8016_clk_set_rate, .set_rate = apq8016_clk_set_rate,
.clks = apq8016_clks,
.num_clks = ARRAY_SIZE(apq8016_clks),
.enable = apq8016_clk_enable,
}; };
static const struct udevice_id gcc_apq8016_of_match[] = { static const struct udevice_id gcc_apq8016_of_match[] = {