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arm: apple: Add M1 Ultra support
The M1 Ultra consists of two M1 Max dies. The second die's I/O is at a consistent offset of 0x2000000000. Signed-off-by: Janne Grunau <j@jannau.net> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
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@ -177,6 +177,171 @@ static struct mm_region t6000_mem_map[] = {
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}
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};
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/* Apple M1 Ultra */
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static struct mm_region t6002_mem_map[] = {
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{
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/* I/O */
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.virt = 0x280000000,
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.phys = 0x280000000,
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.size = SZ_1G,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* I/O */
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.virt = 0x380000000,
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.phys = 0x380000000,
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.size = SZ_1G,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* I/O */
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.virt = 0x580000000,
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.phys = 0x580000000,
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.size = SZ_512M,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* PCIE */
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.virt = 0x5a0000000,
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.phys = 0x5a0000000,
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.size = SZ_512M,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
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PTE_BLOCK_INNER_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* PCIE */
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.virt = 0x5c0000000,
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.phys = 0x5c0000000,
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.size = SZ_1G,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
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PTE_BLOCK_INNER_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* I/O */
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.virt = 0x700000000,
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.phys = 0x700000000,
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.size = SZ_1G,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* I/O */
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.virt = 0xb00000000,
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.phys = 0xb00000000,
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.size = SZ_1G,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* I/O */
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.virt = 0xf00000000,
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.phys = 0xf00000000,
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.size = SZ_1G,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* I/O */
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.virt = 0x1300000000,
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.phys = 0x1300000000,
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.size = SZ_1G,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* I/O */
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.virt = 0x2280000000,
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.phys = 0x2280000000,
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.size = SZ_1G,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* I/O */
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.virt = 0x2380000000,
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.phys = 0x2380000000,
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.size = SZ_1G,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* I/O */
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.virt = 0x2580000000,
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.phys = 0x2580000000,
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.size = SZ_512M,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* PCIE */
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.virt = 0x25a0000000,
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.phys = 0x25a0000000,
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.size = SZ_512M,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
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PTE_BLOCK_INNER_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* PCIE */
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.virt = 0x25c0000000,
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.phys = 0x25c0000000,
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.size = SZ_1G,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRE) |
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PTE_BLOCK_INNER_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* I/O */
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.virt = 0x2700000000,
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.phys = 0x2700000000,
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.size = SZ_1G,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* I/O */
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.virt = 0x2b00000000,
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.phys = 0x2b00000000,
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.size = SZ_1G,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* I/O */
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.virt = 0x2f00000000,
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.phys = 0x2f00000000,
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.size = SZ_1G,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* I/O */
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.virt = 0x3300000000,
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.phys = 0x3300000000,
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.size = SZ_1G,
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.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
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PTE_BLOCK_NON_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* RAM */
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.virt = 0x10000000000,
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.phys = 0x10000000000,
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.size = 16UL * SZ_1G,
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.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
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PTE_BLOCK_INNER_SHARE
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}, {
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/* Framebuffer */
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.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
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PTE_BLOCK_INNER_SHARE |
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PTE_BLOCK_PXN | PTE_BLOCK_UXN
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}, {
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/* List terminator */
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0,
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}
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};
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struct mm_region *mem_map;
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int board_init(void)
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@ -216,6 +381,8 @@ void build_mem_map(void)
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mem_map = t6000_mem_map;
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else if (of_machine_is_compatible("apple,t6001"))
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mem_map = t6000_mem_map;
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else if (of_machine_is_compatible("apple,t6002"))
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mem_map = t6002_mem_map;
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else
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panic("Unsupported SoC\n");
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