mirror of
https://github.com/smaeul/u-boot.git
synced 2025-10-14 04:46:01 +01:00
sunxi: Add a U-Boot port for the Lichee RV and its dock
Signed-off-by: Jisheng Zhang <jszhang@kernel.org> [Samuel: licheepi -> lichee; drop DRAM size; other changes] Signed-off-by: Samuel Holland <samuel@sholland.org>
This commit is contained in:
Jisheng Zhang
Samuel Holland
parent
4b375703ff
commit
66de75ee48
@ -7,7 +7,10 @@ dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb
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dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
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dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb
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dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
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dtb-$(CONFIG_TARGET_SUNXI) += sun20i-d1-nezha.dtb
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dtb-$(CONFIG_TARGET_SUNXI) += \
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sun20i-d1-lichee-rv.dtb \
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sun20i-d1-lichee-rv-dock.dtb \
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sun20i-d1-nezha.dtb
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include $(srctree)/scripts/Makefile.dts
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147
arch/riscv/dts/sun20i-d1-lichee-rv-dock.dts
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147
arch/riscv/dts/sun20i-d1-lichee-rv-dock.dts
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@ -0,0 +1,147 @@
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// SPDX-License-Identifier: (GPL-2.0+ or MIT)
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// Copyright (C) 2022 Jisheng Zhang <jszhang@kernel.org>
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// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
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#include <dt-bindings/input/input.h>
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#include "sun20i-d1-lichee-rv.dts"
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/ {
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model = "Sipeed Lichee RV Dock";
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compatible = "sipeed,lichee-rv-dock", "sipeed,lichee-rv",
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"allwinner,sun20i-d1";
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aliases {
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mmc1 = &mmc1;
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};
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dmic-card {
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compatible = "simple-audio-card";
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#address-cells = <1>;
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#size-cells = <0>;
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simple-audio-card,dai-link@0 {
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format = "pdm";
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frame-master = <&link0_cpu>;
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bitclock-master = <&link0_cpu>;
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link0_cpu: cpu {
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sound-dai = <&dmic>;
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};
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link0_codec: codec {
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sound-dai = <&dmic_codec>;
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};
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};
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};
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dmic_codec: dmic-codec {
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compatible = "dmic-codec";
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num-channels = <2>;
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#sound-dai-cells = <0>;
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};
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hdmi_connector: connector {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con_in: endpoint {
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// FIXME: remote-endpoint = <&hdmi_out_con>;
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};
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};
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};
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wifi_pwrseq: wifi-pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&gpio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */
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};
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};
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&codec {
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allwinner,routing = "Internal Speaker", "HPOUTL",
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"Internal Speaker", "HPOUTR",
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"LINEINL", "HPOUTL",
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"LINEINR", "HPOUTR",
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"MICIN3", "Internal Microphone",
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"Internal Microphone", "HBIAS";
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allwinner,widgets = "Microphone", "Internal Microphone",
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"Speaker", "Internal Speaker";
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status = "okay";
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};
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&dmic {
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pinctrl-0 = <&dmic_pb11_d0_pin>, <&dmic_pe17_clk_pin>;
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pinctrl-names = "default";
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status = "okay";
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};
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&ehci1 {
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status = "okay";
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};
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&gpio {
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dmic_pb11_d0_pin: dmic-pb11-d0-pin {
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pins = "PB11";
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function = "dmic";
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};
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dmic_pe17_clk_pin: dmic-pe17-clk-pin {
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pins = "PE17";
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function = "dmic";
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};
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ledc_pc0_pin: ledc-pc0-pin {
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pins = "PC0";
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function = "ledc";
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};
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};
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&ledc {
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pinctrl-0 = <&ledc_pc0_pin>;
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pinctrl-names = "default";
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status = "okay";
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led@0 {
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reg = <0x0>;
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color = <LED_COLOR_ID_RGB>;
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function = LED_FUNCTION_STATUS;
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};
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};
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&lradc {
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wakeup-source;
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status = "okay";
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button-220 {
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label = "OK";
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linux,code = <KEY_OK>;
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channel = <0>;
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voltage = <220000>;
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};
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};
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&mmc1 {
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bus-width = <4>;
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mmc-pwrseq = <&wifi_pwrseq>;
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non-removable;
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vmmc-supply = <®_vcc_3v3>;
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vqmmc-supply = <®_vcc_3v3>;
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pinctrl-0 = <&mmc1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&ohci1 {
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status = "okay";
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};
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&uart1 {
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pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&usbphy {
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usb1_vbus-supply = <®_vcc>;
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};
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88
arch/riscv/dts/sun20i-d1-lichee-rv.dts
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88
arch/riscv/dts/sun20i-d1-lichee-rv.dts
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@ -0,0 +1,88 @@
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// SPDX-License-Identifier: (GPL-2.0+ or MIT)
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// Copyright (C) 2022 Jisheng Zhang <jszhang@kernel.org>
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// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include "sun20i-d1.dtsi"
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#include "sun20i-d1-common-regulators.dtsi"
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/ {
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model = "Sipeed Lichee RV";
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compatible = "sipeed,lichee-rv", "allwinner,sun20i-d1";
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aliases {
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mmc0 = &mmc0;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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leds {
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compatible = "gpio-leds";
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led-0 {
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function = LED_FUNCTION_STATUS;
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gpios = <&gpio 2 1 GPIO_ACTIVE_HIGH>; /* PC1 */
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};
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};
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reg_vdd_cpu: vdd-cpu {
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compatible = "regulator-fixed";
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regulator-name = "vdd-cpu";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <900000>;
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vin-supply = <®_vcc>;
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};
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};
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&cpu0 {
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cpu-supply = <®_vdd_cpu>;
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};
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&ehci0 {
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status = "okay";
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};
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&mmc0 {
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broken-cd;
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bus-width = <4>;
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disable-wp;
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vmmc-supply = <®_vcc_3v3>;
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vqmmc-supply = <®_vcc_3v3>;
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pinctrl-0 = <&mmc0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&ohci0 {
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status = "okay";
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};
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&spi0 {
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pinctrl-0 = <&spi0_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&uart0 {
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pinctrl-0 = <&uart0_pb8_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&usb_otg {
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dr_mode = "otg";
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status = "okay";
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};
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&usbphy {
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usb0_vbus-supply = <®_vcc>;
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usb0_vbus_det-gpios = <&gpio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
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status = "okay";
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};
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24
configs/lichee_rv_defconfig
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24
configs/lichee_rv_defconfig
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CONFIG_RISCV=y
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CONFIG_DEFAULT_DEVICE_TREE="sun20i-d1-lichee-rv"
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CONFIG_TARGET_SUNXI=y
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CONFIG_ARCH_RV64I=y
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CONFIG_RISCV_SMODE=y
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# CONFIG_SPL_SMP is not set
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CONFIG_SYS_LOAD_ADDR=0x4a000000
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CONFIG_CMD_CLK=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_LSBLK=y
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CONFIG_CMD_SPI=y
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CONFIG_CMD_WDT=y
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CONFIG_CMD_TIMER=y
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CONFIG_CMD_REGULATOR=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_SPI=y
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CONFIG_USB=y
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CONFIG_DM_USB_GADGET=y
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CONFIG_USB_MUSB_GADGET=y
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CONFIG_USB_GADGET=y
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CONFIG_USB_GADGET_DOWNLOAD=y
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CONFIG_USB_FUNCTION_MASS_STORAGE=y
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