mirror of
https://github.com/smaeul/u-boot.git
synced 2025-10-17 14:18:14 +01:00
rockchip: rk3399: Configure sdmmc regulator pinctrl in SPL
A few boards have shown to be required to properly configure pinctrl for the fixed regulator gpio pin used by sdmmc before being able to read from SD-cards. Include the related gpio, regulator and pinctrl nodes and enable related Kconfig options so that pinctrl can be configured in SPL for boards that may be affected by such issue. Also change to imply SPL_DM_SEQ_ALIAS for all boards because it must be enabled for working gpio usage in SPL after a future DT sync. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
parent
100f489f58
commit
6e44d4fd9b
@ -5,6 +5,18 @@
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#include "rk3399-u-boot.dtsi"
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&gpio0 {
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bootph-pre-ram;
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};
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&sdmmc {
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pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_cd>;
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};
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&sdmmc0_pwr_h {
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bootph-pre-ram;
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};
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&vcc3v0_sd {
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bootph-pre-ram;
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};
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@ -6,6 +6,18 @@
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#include "rk3399-u-boot.dtsi"
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#include "rk3399-sdram-ddr3-1333.dtsi"
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&gpio0 {
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bootph-pre-ram;
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};
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&sdmmc0_pwr_h {
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bootph-pre-ram;
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};
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&vcc3v0_sd {
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bootph-pre-ram;
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};
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&vdd_log {
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regulator-init-microvolt = <950000>;
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};
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@ -10,6 +10,10 @@
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rockchip,panel = <&edp_panel>;
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};
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&gpio0 {
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bootph-pre-ram;
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};
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&sdhci {
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max-frequency = <25000000>;
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};
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@ -18,11 +22,19 @@
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max-frequency = <20000000>;
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};
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&sdmmc0_pwr_h_pin {
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bootph-pre-ram;
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};
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&spiflash {
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bootph-pre-ram;
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bootph-some-ram;
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};
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&vcc3v0_sd {
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bootph-pre-ram;
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};
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&vdd_log {
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regulator-init-microvolt = <950000>;
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};
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@ -32,6 +32,10 @@
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vin-supply = <&vcc_vbus_typec0>;
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};
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&gpio4 {
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bootph-pre-ram;
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};
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&spi1 {
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flash@0 {
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bootph-pre-ram;
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@ -39,6 +43,14 @@
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};
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};
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&vcc3v0_sd {
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bootph-pre-ram;
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};
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&vcc3v0_sd_en {
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bootph-pre-ram;
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};
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&vcc5v0_host {
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regulator-always-on;
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};
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@ -28,11 +28,19 @@
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};
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};
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&gpio0 {
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bootph-pre-ram;
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};
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&sdhci {
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cap-mmc-highspeed;
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mmc-ddr-1_8v;
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};
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&sdmmc0_pwr_h {
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bootph-pre-ram;
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};
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&spi1 {
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flash@0 {
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bootph-pre-ram;
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@ -40,6 +48,10 @@
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};
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};
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&vcc3v0_sd {
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bootph-pre-ram;
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};
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&vdd_center {
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regulator-min-microvolt = <950000>;
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regulator-max-microvolt = <950000>;
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@ -277,6 +277,7 @@ config ROCKCHIP_RK3399
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imply ROCKCHIP_COMMON_BOARD
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imply ROCKCHIP_EFUSE
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imply ROCKCHIP_SDRAM_COMMON
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imply SPL_DM_SEQ_ALIAS
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imply SPL_FIT_SIGNATURE
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imply SPL_ROCKCHIP_COMMON_BOARD
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imply SYS_BOOTCOUNT_SINGLEWORD if BOOTCOUNT_LIMIT
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@ -61,7 +61,6 @@ CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_I2C_CROS_EC_TUNNEL=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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@ -62,7 +62,6 @@ CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_I2C_CROS_EC_TUNNEL=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_COUNTER_FREQUENCY=24000000
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SPL_GPIO=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_OFFSET=0x3F8000
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CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopc-t4"
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@ -42,6 +43,7 @@ CONFIG_GMAC_ROCKCHIP=y
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CONFIG_NVME_PCI=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_SPL_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_BAUDRATE=1500000
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_COUNTER_FREQUENCY=24000000
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SPL_GPIO=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_OFFSET=0x3F8000
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CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4-2gb"
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@ -38,6 +39,7 @@ CONFIG_ETH_DESIGNWARE=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_SPL_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_BAUDRATE=1500000
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_COUNTER_FREQUENCY=24000000
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SPL_GPIO=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_OFFSET=0x3F8000
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CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4"
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@ -38,6 +39,7 @@ CONFIG_ETH_DESIGNWARE=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_SPL_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_BAUDRATE=1500000
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_COUNTER_FREQUENCY=24000000
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SPL_GPIO=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_OFFSET=0x3F8000
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CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4b"
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@ -38,6 +39,7 @@ CONFIG_ETH_DESIGNWARE=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_SPL_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_BAUDRATE=1500000
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_COUNTER_FREQUENCY=24000000
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SPL_GPIO=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_OFFSET=0x3F8000
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CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-neo4"
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@ -38,6 +39,7 @@ CONFIG_ETH_DESIGNWARE=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_SPL_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_BAUDRATE=1500000
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_COUNTER_FREQUENCY=24000000
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SPL_GPIO=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_OFFSET=0x3F8000
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CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4s"
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@ -38,6 +39,7 @@ CONFIG_ETH_DESIGNWARE=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_SPL_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_RAM_ROCKCHIP_LPDDR4=y
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_COUNTER_FREQUENCY=24000000
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SPL_GPIO=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_OFFSET=0x3F8000
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CONFIG_DEFAULT_DEVICE_TREE="rk3399-orangepi"
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@ -38,6 +39,7 @@ CONFIG_ETH_DESIGNWARE=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_SPL_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_BAUDRATE=1500000
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_COUNTER_FREQUENCY=24000000
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SPL_GPIO=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_SF_DEFAULT_SPEED=20000000
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CONFIG_ENV_SIZE=0x8000
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@ -44,7 +45,6 @@ CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_LED=y
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@ -72,6 +72,7 @@ CONFIG_PHY_ROCKCHIP_TYPEC=y
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CONFIG_DM_PMIC_FAN53555=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_SPL_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_RAM_ROCKCHIP_LPDDR4=y
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CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_LED=y
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@ -50,7 +50,6 @@ CONFIG_ENV_SPI_MAX_HZ=50000000
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SYS_MMC_ENV_DEV=1
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CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_GPIO_HOG=y
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CONFIG_SPL_GPIO_HOG=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_MMC_DW=y
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@ -57,6 +56,7 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
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CONFIG_PHY_ROCKCHIP_TYPEC=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_SPL_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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# CONFIG_RAM_ROCKCHIP_DEBUG is not set
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CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_MMC_DW=y
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@ -56,6 +55,7 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
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CONFIG_PHY_ROCKCHIP_TYPEC=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_SPL_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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# CONFIG_RAM_ROCKCHIP_DEBUG is not set
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CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_DFU_MMC=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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@ -2,6 +2,7 @@ CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_COUNTER_FREQUENCY=24000000
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SPL_GPIO=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SIZE=0x8000
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CONFIG_ENV_OFFSET=0x3F8000
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@ -41,7 +42,6 @@ CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_ENV_IS_IN_SPI_FLASH=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SPL_DM_SEQ_ALIAS=y
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CONFIG_SATA=y
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CONFIG_SCSI_AHCI=y
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CONFIG_AHCI_PCI=y
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@ -65,6 +65,7 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y
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CONFIG_PHY_ROCKCHIP_TYPEC=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_SPL_DM_REGULATOR_FIXED=y
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CONFIG_REGULATOR_RK8XX=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_RAM_ROCKCHIP_LPDDR4=y
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