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riscv: fu540: dts: Correct reg size of clint node

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Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
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Pragnesh Patel 2020-10-20 11:03:02 +05:30 committed by Andes
parent 47d7e3b5eb
commit 7257455e7c
1 changed files with 1 additions and 1 deletions
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arch/riscv/dts/fu540-c000-u-boot.dtsi
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@ -62,7 +62,7 @@
&cpu2_intc 3 &cpu2_intc 7 &cpu2_intc 3 &cpu2_intc 7
&cpu3_intc 3 &cpu3_intc 7 &cpu3_intc 3 &cpu3_intc 7
&cpu4_intc 3 &cpu4_intc 7>; &cpu4_intc 3 &cpu4_intc 7>;
reg = <0x0 0x2000000 0x0 0xc0000>; reg = <0x0 0x2000000 0x0 0x10000>;
u-boot,dm-spl; u-boot,dm-spl;
}; };
prci: clock-controller@10000000 { prci: clock-controller@10000000 {