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colibri-imx6ull: add emmc variant

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Add code to build the eMMC variant of the Colibri iMX6ULL, i.e. the
'Colibri iMX6ULL 1GB' which has a eMMC instead of the raw NAND used
on other SKUs.

Related-to: ELB-4056, ELB-4057
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
This commit is contained in:
Max Krummenacher 2021-10-06 18:55:36 +02:00 committed by Stefano Babic
parent 3c80a4c781
commit 80ef6926e7
10 changed files with 290 additions and 48 deletions
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1
arch/arm/dts/Makefile
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@ -822,6 +822,7 @@ dtb-$(CONFIG_MX6UL) += \
dtb-$(CONFIG_MX6ULL) += \
imx6ull-14x14-evk.dtb \
imx6ull-colibri.dtb \
imx6ull-colibri-emmc.dtb \
imx6ull-myir-mys-6ulx-eval.dtb \
imx6ull-seeed-npi-imx6ull-dev-board.dtb \
imx6ull-phytec-segin-ff-rdk-emmc.dtb \

49
arch/arm/dts/imx6ull-colibri-emmc.dts Normal file
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@ -0,0 +1,49 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2021 Toradex AG
*/
#include "imx6ull-colibri.dtsi"
#include "imx6ull-colibri-u-boot.dtsi"
/ {
model = "Toradex Colibri iMX6ULL 1GB (eMMC)";
compatible = "toradex,colibri-imx6ull-emmc", "toradex,colibri-imx6ull", "fsl,imx6ull";
aliases {
mmc0 = &usdhc2;
mmc1 = &usdhc1;
};
};
/* eMMC */
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2emmc>;
assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>;
assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
assigned-clock-rates = <0>, <198000000>;
bus-width = <8>;
keep-power-in-suspend;
no-1-8-v;
non-removable;
vmmc-supply = <&reg_module_3v3>;
status = "okay";
};
&iomuxc {
pinctrl_usdhc2emmc: usdhc2emmcgrp {
fsl,pins = <
MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x17059
MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
>;
};
};

34
arch/arm/dts/imx6ull-colibri.dts
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@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2018-2019 Toradex AG
* Copyright 2018-2021 Toradex AG
*/
#include "imx6ull-colibri.dtsi"
@ -10,3 +10,35 @@
model = "Toradex Colibri iMX6ULL";
compatible = "toradex,colibri-imx6ull", "fsl,imx6ull";
};
/* NAND */
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
nand-on-flash-bbt;
nand-ecc-mode = "hw";
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
status = "okay";
};
&iomuxc {
pinctrl_gpmi_nand: gpmi-nand-grp {
fsl,pins = <
MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x100a9
MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0x100a9
MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0x100a9
MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0x100a9
MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0x100a9
MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0x100a9
MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0x100a9
MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0x100a9
MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0x100a9
MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0x100a9
MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0x100a9
MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0x100a9
MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0x100a9
MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0x100a9
>;
};
};

32
arch/arm/dts/imx6ull-colibri.dtsi
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@ -1,6 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2019 Toradex AG
* Copyright 2019-2021 Toradex AG
*/
/dts-v1/;
@ -92,17 +92,6 @@
};
};
/* NAND */
&gpmi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand>;
nand-on-flash-bbt;
nand-ecc-mode = "hw";
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
status = "okay";
};
/*
* I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
*/
@ -340,25 +329,6 @@
>;
};
pinctrl_gpmi_nand: gpmi-nand-grp {
fsl,pins = <
MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x100a9
MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0x100a9
MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0x100a9
MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0x100a9
MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0x100a9
MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0x100a9
MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0x100a9
MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0x100a9
MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0x100a9
MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0x100a9
MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0x100a9
MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0x100a9
MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0x100a9
MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0x100a9
>;
};
pinctrl_i2c1: i2c1-grp {
fsl,pins = <
MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0

48
board/toradex/colibri-imx6ull/Kconfig
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@ -1,5 +1,24 @@
if TARGET_COLIBRI_IMX6ULL
choice
prompt "Colibri iMX6ULL variant"
optional
config TARGET_COLIBRI_IMX6ULL_NAND
bool "Support Colibri iMX6ULL 256MB / 512MB (raw NAND) modules"
imply NAND_MXS
help
Choose this option if you build for a Toradex Colibri iMX6ULL
256MB or 512MB module which do have raw NAND on-module.
config TARGET_COLIBRI_IMX6ULL_EMMC
bool "Support Colibri iMX6ULL 1GB (eMMC) modules"
help
Choose this option if you build for a Toradex Colibri iMX6ULL
1GB module which does have eMMC on-module.
endchoice
config SYS_BOARD
default "colibri-imx6ull"
@ -7,11 +26,16 @@ config SYS_VENDOR
default "toradex"
config SYS_CONFIG_NAME
default "colibri-imx6ull"
default "colibri-imx6ull-tezi-recovery" if (!TARGET_COLIBRI_IMX6ULL_NAND && !TARGET_COLIBRI_IMX6ULL_EMMC)
config TDX_CFG_BLOCK
default y
if TARGET_COLIBRI_IMX6ULL_NAND
config SYS_CONFIG_NAME
default "colibri-imx6ull"
config TDX_HAVE_NAND
default y
@ -21,6 +45,28 @@ config TDX_CFG_BLOCK_OFFSET
config TDX_CFG_BLOCK_OFFSET2
default "133120"
endif
if TARGET_COLIBRI_IMX6ULL_EMMC
config SYS_CONFIG_NAME
default "colibri-imx6ull"
config TDX_HAVE_MMC
default y
config TDX_CFG_BLOCK_DEV
default "0"
config TDX_CFG_BLOCK_PART
default "1"
# Toradex config block in eMMC, at the end of 1st "boot sector"
config TDX_CFG_BLOCK_OFFSET
default "-512"
endif
config TDX_CFG_BLOCK_2ND_ETHADDR
default y

4
board/toradex/colibri-imx6ull/MAINTAINERS
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@ -4,8 +4,10 @@ W: http://developer.toradex.com/software/linux/linux-software
W: https://www.toradex.com/community
S: Maintained
F: arch/arm/dts/imx6ull-colibri.dts
F: arch/arm/dts/imx6ull-colibri-u-boot.dtsi
F: arch/arm/dts/imx6ull-colibri.dtsi
F: arch/arm/dts/imx6ull-colibri-emmc.dts
F: arch/arm/dts/imx6ull-colibri-u-boot.dtsi
F: board/toradex/colibri-imx6ull/
F: configs/colibri-imx6ull_defconfig
F: configs/colibri-imx6ull-emmc_defconfig
F: include/configs/colibri-imx6ull.h

29
board/toradex/colibri-imx6ull/colibri-imx6ull.c
View File

@ -43,6 +43,14 @@ DECLARE_GLOBAL_DATA_PTR;
#define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_48ohm | PAD_CTL_PUS_22K_UP)
#define FLASH_DETECTION_CTRL (PAD_CTL_HYS | PAD_CTL_PUE)
#define FLASH_DET_GPIO IMX_GPIO_NR(4, 1)
static const iomux_v3_cfg_t flash_detection_pads[] = {
MX6_PAD_NAND_WE_B__GPIO4_IO01 | MUX_PAD_CTRL(FLASH_DETECTION_CTRL),
};
static bool is_emmc;
int dram_init(void)
{
gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
@ -60,7 +68,7 @@ static void setup_gpmi_nand(void)
#endif /* CONFIG_NAND_MXS */
#ifdef CONFIG_DM_VIDEO
static iomux_v3_cfg_t const backlight_pads[] = {
static const iomux_v3_cfg_t backlight_pads[] = {
/* Backlight On */
MX6_PAD_JTAG_TMS__GPIO1_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL),
/* Backlight PWM<A> (multiplexed pin) */
@ -121,6 +129,16 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
/*
* Enable GPIO on NAND_WE_B/eMMC_RST with 100k pull-down. eMMC_RST
* is pulled high with 4.7k for eMMC devices. This allows to reliably
* detect eMMC/NAND flash
*/
imx_iomux_v3_setup_multiple_pads(flash_detection_pads, ARRAY_SIZE(flash_detection_pads));
gpio_request(FLASH_DET_GPIO, "flash-detection-gpio");
is_emmc = gpio_get_value(FLASH_DET_GPIO);
gpio_free(FLASH_DET_GPIO);
#ifdef CONFIG_FEC_MXC
setup_fec();
#endif
@ -149,8 +167,15 @@ int board_late_init(void)
* Wi-Fi/Bluetooth make sure we use the -wifi device tree.
*/
if (tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT_IT ||
tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT)
tdx_hw_tag.prodid == COLIBRI_IMX6ULL_WIFI_BT) {
env_set("variant", "-wifi");
} else {
if (is_emmc)
env_set("variant", "-emmc");
}
#else
if (is_emmc)
env_set("variant", "-emmc");
#endif
/*

88
configs/colibri-imx6ull-emmc_defconfig Normal file
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@ -0,0 +1,88 @@
CONFIG_ARM=y
CONFIG_ARCH_MX6=y
CONFIG_SYS_TEXT_BASE=0x87800000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SYS_MEMTEST_START=0x80000000
CONFIG_SYS_MEMTEST_END=0x88000000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFFFFDE00
CONFIG_MX6ULL=y
CONFIG_TARGET_COLIBRI_IMX6ULL=y
CONFIG_DM_GPIO=y
CONFIG_TARGET_COLIBRI_IMX6ULL_EMMC=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-colibri-emmc"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
CONFIG_BOOTDELAY=1
# CONFIG_USE_BOOTCOMMAND is not set
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="setenv fdtfile imx6ull-colibri${variant}-${fdt_board}.dtb"
# CONFIG_CONSOLE_MUX is not set
CONFIG_SYS_CONSOLE_IS_IN_ENV=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_SYS_PROMPT="Colibri iMX6ULL # "
# CONFIG_BOOTM_PLAN9 is not set
# CONFIG_BOOTM_RTEMS is not set
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_XIMG is not set
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_BMP=y
CONFIG_CMD_BOOTCOUNT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_REGULATOR=y
# CONFIG_ISO_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_PART=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_VERSION_VARIABLE=y
CONFIG_IP_DEFRAG=y
CONFIG_TFTP_BLOCKSIZE=16352
CONFIG_TFTP_TSIZE=y
CONFIG_BOUNCE_BUFFER=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_MXC=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_MICREL=y
CONFIG_DM_ETH=y
CONFIG_FEC_MXC=y
CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_SERIAL=y
CONFIG_MXC_UART=y
CONFIG_IMX_THERMAL=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Toradex"
CONFIG_USB_GADGET_VENDOR_NUM=0x1b67
CONFIG_USB_GADGET_PRODUCT_NUM=0x4000
CONFIG_CI_UDC=y
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_DM_VIDEO=y
CONFIG_SYS_WHITE_ON_BLACK=y
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
CONFIG_VIDEO_BMP_RLE8=y
CONFIG_BMP_16BPP=y
CONFIG_OF_LIBFDT_OVERLAY=y

2
configs/colibri-imx6ull_defconfig
View File

@ -10,6 +10,7 @@ CONFIG_MX6ULL=y
CONFIG_TARGET_COLIBRI_IMX6ULL=y
CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DM_GPIO=y
CONFIG_TARGET_COLIBRI_IMX6ULL_NAND=y
CONFIG_DEFAULT_DEVICE_TREE="imx6ull-colibri"
CONFIG_DISTRO_DEFAULTS=y
CONFIG_FIT=y
@ -71,7 +72,6 @@ CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_MTD_RAW_NAND=y
CONFIG_SYS_NAND_USE_FLASH_BBT=y
CONFIG_NAND_MXS=y
CONFIG_NAND_MXS_DT=y
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_MTD_UBI_FASTMAP=y

51
include/configs/colibri-imx6ull.h
View File

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2018-2019 Toradex AG
* Copyright 2018-2021 Toradex AG
*
* Configuration settings for the Colibri iMX6ULL module.
*
@ -26,6 +26,22 @@
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_SERVERIP 192.168.10.1
#if defined(CONFIG_TARGET_COLIBRI_IMX6ULL_EMMC)
#define UBOOT_UPDATE \
"uboot_hwpart=1\0" \
"uboot_blk=2\0" \
"set_blkcnt=setexpr blkcnt ${filesize} + 0x1ff && " \
"setexpr blkcnt ${blkcnt} / 0x200\0" \
"update_uboot=run set_blkcnt && mmc dev 0 ${uboot_hwpart} && " \
"mmc write ${loadaddr} ${uboot_blk} ${blkcnt}\0"
#elif defined(CONFIG_TARGET_COLIBRI_IMX6ULL_NAND)
#define UBOOT_UPDATE \
"update_uboot=nand erase.part u-boot1 && " \
"nand write ${loadaddr} u-boot1 ${filesize} && " \
"nand erase.part u-boot2 && " \
"nand write ${loadaddr} u-boot2 ${filesize}\0"
#endif
#define MEM_LAYOUT_ENV_SETTINGS \
"bootm_size=0x10000000\0" \
"fdt_addr_r=0x82100000\0" \
@ -34,12 +50,6 @@
"ramdisk_addr_r=0x82200000\0" \
"scriptaddr=0x87000000\0"
#define UBOOT_UPDATE \
"update_uboot=nand erase.part u-boot1 && " \
"nand write ${loadaddr} u-boot1 ${filesize} && " \
"nand erase.part u-boot2 && " \
"nand write ${loadaddr} u-boot2 ${filesize}\0"
#define NFS_BOOTCMD \
"nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
"nfsboot=run setup; " \
@ -60,17 +70,32 @@
"ubi read ${fdt_addr_r} dtb && " \
"run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
#if defined(CONFIG_TARGET_COLIBRI_IMX6ULL_NAND)
/* Run Distro Boot script if ubiboot fails */
#define CONFIG_BOOTCOMMAND "run ubiboot || run distro_bootcmd;"
#define DFU_ALT_NAND_INFO "imx6ull-bcb part 0,1;u-boot1 part 0,2;u-boot2 part 0,3;u-boot-env part 0,4;ubi partubi 0,5"
#define MODULE_EXTRA_ENV_SETTINGS \
"dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
UBI_BOOTCMD
#else
#define MODULE_EXTRA_ENV_SETTINGS ""
#endif
#if defined(CONFIG_TARGET_COLIBRI_IMX6ULL_NAND)
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(USB, usb, 0) \
func(DHCP, dhcp, na)
#elif defined(CONFIG_TARGET_COLIBRI_IMX6ULL_EMMC)
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
func(MMC, mmc, 0) \
func(USB, usb, 0) \
func(DHCP, dhcp, na)
#endif
#include <config_distro_bootcmd.h>
#define DFU_ALT_NAND_INFO "imx6ull-bcb part 0,1;u-boot1 part 0,2;u-boot2 part 0,3;u-boot-env part 0,4;ubi partubi 0,5"
#define CONFIG_EXTRA_ENV_SETTINGS \
BOOTENV \
MEM_LAYOUT_ENV_SETTINGS \
@ -80,12 +105,10 @@
"bootubipart=ubi\0" \
"console=ttymxc0\0" \
"defargs=user_debug=30\0" \
"dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
"fdt_board=eval-v3\0" \
"fdt_fixup=;\0" \
"ip_dyn=yes\0" \
"kernel_file=zImage\0" \
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
"setethupdate=if env exists ethaddr; then; else setenv ethaddr " \
"00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \
"${board}/flash_eth.img && source ${loadaddr}\0" \
@ -117,10 +140,16 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* environment organization */
/* Environment in eMMC, before config block at the end of 1st "boot sector" */
#ifdef CONFIG_TARGET_COLIBRI_IMX6ULL_NAND
/* NAND stuff */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
/* used to initialize CONFIG_SYS_NAND_BASE_LIST which is unused */
#define CONFIG_SYS_NAND_BASE -1
#endif
/* USB Configs */
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET