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arm: dts: Add Chameleonv3 devicetrees

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Add devicetrees for Google Chameleon V3 board

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Paweł Anikiel 2022-06-17 12:47:18 +02:00 committed by Tien Fong Chee
parent 882c00edeb
commit 8566b3682f
6 changed files with 118 additions and 0 deletions
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2
arch/arm/dts/Makefile
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@ -418,6 +418,8 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_agilex_socdk.dtb \ socfpga_agilex_socdk.dtb \
socfpga_arria5_secu1.dtb \ socfpga_arria5_secu1.dtb \
socfpga_arria5_socdk.dtb \ socfpga_arria5_socdk.dtb \
socfpga_arria10_chameleonv3_270_3.dtb \
socfpga_arria10_chameleonv3_480_2.dtb \
socfpga_arria10_socdk_sdmmc.dtb \ socfpga_arria10_socdk_sdmmc.dtb \
socfpga_cyclone5_mcvevk.dtb \ socfpga_cyclone5_mcvevk.dtb \
socfpga_cyclone5_is1.dtb \ socfpga_cyclone5_is1.dtb \

90
arch/arm/dts/socfpga_arria10_chameleonv3.dts Normal file
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@ -0,0 +1,90 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2022 Google LLC
*/
/dts-v1/;
#include "socfpga_arria10_mercury_aa1.dtsi"
/ {
model = "Google Chameleon V3";
compatible = "google,chameleon-v3",
"altr,socfpga-arria10", "altr,socfpga";
aliases {
serial0 = &uart0;
i2c0 = &i2c0;
i2c1 = &i2c1;
};
};
&gmac0 {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&i2c0 {
status = "okay";
ssm2603: ssm2603@1a {
compatible = "adi,ssm2603";
reg = <0x1a>;
};
};
&i2c1 {
status = "okay";
u80: u80@21 {
compatible = "nxp,pca9535";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names =
"SOM_AUD_MUTE",
"DP1_OUT_CEC_EN",
"DP2_OUT_CEC_EN",
"DP1_SOM_PS8469_CAD",
"DPD_SOM_PS8469_CAD",
"DP_OUT_PWR_EN",
"STM32_RST_L",
"STM32_BOOT0",
"FPGA_PROT",
"STM32_FPGA_COMM0",
"TP119",
"TP120",
"TP121",
"TP122",
"TP123",
"TP124";
};
};
&mmc {
status = "okay";
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&usb0 {
status = "okay";
dr_mode = "host";
};

8
arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi Normal file
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@ -0,0 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2022 Google LLC
*/
#include "socfpga_arria10_chameleonv3_270_3_handoff.h"
#include "socfpga_arria10-handoff.dtsi"
#include "socfpga_arria10_handoff_u-boot.dtsi"
#include "socfpga_arria10_mercury_aa1-u-boot.dtsi"

5
arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts Normal file
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@ -0,0 +1,5 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2022 Google LLC
*/
#include "socfpga_arria10_chameleonv3.dts"

8
arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi Normal file
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@ -0,0 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2022 Google LLC
*/
#include "socfpga_arria10_chameleonv3_480_2_handoff.h"
#include "socfpga_arria10-handoff.dtsi"
#include "socfpga_arria10_handoff_u-boot.dtsi"
#include "socfpga_arria10_mercury_aa1-u-boot.dtsi"

5
arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts Normal file
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@ -0,0 +1,5 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2022 Google LLC
*/
#include "socfpga_arria10_chameleonv3.dts"