random-mirrors/smaeul-u-boot
1
0
Fork 0
mirror of https://github.com/smaeul/u-boot.git synced 2025-10-13 20:36:02 +01:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch '2022-02-08-Kconfig-updates'

Browse Source 
- Assorted general code cleanups to make sure we use the right macros
  and use them correctly and buildman updates around kconfig.h itself.
- Convert some IDE and SCSI symbols to Kconfig.
- Convert CONFIG_REMAKE_ELF
- Introduce conversion deadline for DM_SCSI.
This commit is contained in:
Tom Rini 2022-02-09 09:29:07 -05:00
commit 8597032512
520 changed files with 1452 additions and 1975 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
Kconfig
View File

@ -353,6 +353,13 @@ config SPL_IMAGE
used to generate a combined image with SPL and main U-Boot
proper as one single image.
config REMAKE_ELF
bool "Recreate an ELF image from raw U-Boot binary"
help
Enable this to recreate an ELF image (u-boot.elf) from the raw
U-Boot binary (u-boot.bin), which may already have been statically
relocated and may already have a device-tree appended to it.
config BUILD_TARGET
string "Build target special images"
default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_ARRIA10

1
Makefile
View File

@ -1134,6 +1134,7 @@ endif
@# is enable to tell 'deprecated' that one of these symbols exists
$(call deprecated,CONFIG_TIMER,Timer drivers,v2023.01,$(if $(strip $(CONFIG_SYS_TIMER_RATE)$(CONFIG_SYS_TIMER_COUNTER)),x))
$(call deprecated,CONFIG_DM_SERIAL,Serial drivers,v2023.04,$(CONFIG_SERIAL))
$(call deprecated,CONFIG_DM_SCSI,SCSI drivers,v2023.04,$(CONFIG_SCSI))
@# Check that this build does not use CONFIG options that we do not
@# know about unless they are in Kconfig. All the existing CONFIG
@# options are whitelisted, so new ones should not be added.

29
README
View File

@ -720,17 +720,6 @@ The following options need to be configured:
CONFIG_SCSI) you must configure support for at
least one non-MTD partition type as well.
- IDE Reset method:
CONFIG_IDE_RESET - is this is defined, IDE Reset will
be performed by calling the function
ide_set_reset(int reset)
which has to be defined in a board specific file
- ATAPI Support:
CONFIG_ATAPI
Set this to enable ATAPI support.
- LBA48 Support
CONFIG_LBA48
@ -743,16 +732,6 @@ The following options need to be configured:
When enabled, makes the IDE subsystem use 64bit sector addresses.
Default is 32bit.
- SCSI Support:
CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
maximum numbers of LUNs, SCSI ID's and target
devices.
The environment variable 'scsidevs' is set to the number of
SCSI devices found during the last scan.
- NETWORK Support (PCI):
CONFIG_E1000_SPI
Utility code for direct access to the SPI bus on Intel 8257x.
@ -2393,14 +2372,6 @@ Low Level (hardware related) configuration options:
If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be
forced to a value that ensures that CCSR is not relocated.
- CONFIG_IDE_AHB:
Most IDE controllers were designed to be connected with PCI
interface. Only few of them were designed for AHB interface.
When software is doing ATA command and data transfer to
IDE devices through IDE-AHB controller, some additional
registers accessing to these kind of IDE-AHB controller
is required.
- CONFIG_SYS_IMMR: Physical address of the Internal Memory.
DO NOT CHANGE unless you know exactly what you're
doing! (11-4) [MPC8xx systems only]

3
api/api_storage.c
View File

@ -9,6 +9,7 @@
#include <common.h>
#include <api_public.h>
#include <part.h>
#include <scsi.h>
#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
#include <usb.h>
@ -71,7 +72,7 @@ void dev_stor_init(void)
specs[ENUM_SATA].name = "sata";
#endif
#if defined(CONFIG_SCSI)
specs[ENUM_SCSI].max_dev = CONFIG_SYS_SCSI_MAX_DEVICE;
specs[ENUM_SCSI].max_dev = SCSI_MAX_DEVICE;
specs[ENUM_SCSI].enum_started = 0;
specs[ENUM_SCSI].enum_ended = 0;
specs[ENUM_SCSI].type = DEV_TYP_STOR | DT_STOR_SCSI;

1
arch/Kconfig
View File

@ -172,7 +172,6 @@ config SANDBOX
imply FIRMWARE
imply HASH_VERIFY
imply LZMA
imply SCSI
imply TEE
imply AVB_VERIFY
imply LIBAVB

5
arch/arm/include/asm/arch-ls102xa/config.h
View File

@ -78,11 +78,6 @@
/* SATA */
#define AHCI_BASE_ADDR (CONFIG_SYS_IMMR + 0x02200000)
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
#define CONFIG_SYS_SCSI_MAX_LUN 1
#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
CONFIG_SYS_SCSI_MAX_LUN)
#ifdef CONFIG_DDR_SPD
#define CONFIG_VERY_BIG_RAM
#define CONFIG_SYS_LS1_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30)

2
arch/arm/mach-imx/Makefile
View File

@ -91,7 +91,7 @@ $(PLUGIN).bin:
endif
quiet_cmd_cpp_cfg = CFGS $@
cmd_cpp_cfg = $(CPP) $(cpp_flags) -x c -o $@ $<
cmd_cpp_cfg = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -x c -o $@ $<
# mkimage source config file
IMX_CONFIG = $(CONFIG_IMX_CONFIG:"%"=%)

1
arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
#define __ASSEMBLY__
FIT
BOOT_FROM sd

1
arch/arm/mach-imx/imx8m/imximage-8mn-ddr4.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
#define __ASSEMBLY__
FIT
ROM_VERSION v2

1
arch/arm/mach-imx/imx8m/imximage-8mn-lpddr4.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
#define __ASSEMBLY__
FIT
ROM_VERSION v2

1
arch/arm/mach-imx/imx8m/imximage-8mp-lpddr4.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
#define __ASSEMBLY__
FIT
ROM_VERSION v2

1
arch/arm/mach-imx/imx8m/imximage.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2018-2021 NXP
*/
#define __ASSEMBLY__
FIT
BOOT_FROM sd

1
arch/arm/mach-imx/spl_qspi.cfg
View File

@ -3,7 +3,6 @@
* Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
*/
#define __ASSEMBLY__
#include <config.h>
IMAGE_VERSION 2

1
arch/arm/mach-imx/spl_sd.cfg
View File

@ -3,7 +3,6 @@
* Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
*/
#define __ASSEMBLY__
#include <config.h>
IMAGE_VERSION 2

7
arch/arm/mach-kirkwood/include/mach/config.h
View File

@ -59,18 +59,11 @@
#ifdef CONFIG_IDE
#define __io
/* Data, registers and alternate blocks are at the same offset */
#define CONFIG_SYS_ATA_DATA_OFFSET (0x0100)
#define CONFIG_SYS_ATA_REG_OFFSET (0x0100)
#define CONFIG_SYS_ATA_ALT_OFFSET (0x0100)
/* Each 8-bit ATA register is aligned to a 4-bytes address */
#define CONFIG_SYS_ATA_STRIDE 4
/* Controller supports 48-bits LBA addressing */
#define CONFIG_LBA48
/* CONFIG_IDE requires some #defines for ATA registers */
#define CONFIG_SYS_IDE_MAXBUS 2
#define CONFIG_SYS_IDE_MAXDEVICE 2
/* ATA registers base is at SATA controller base */
#define CONFIG_SYS_ATA_BASE_ADDR MV_SATA_BASE
#endif /* CONFIG_IDE */
/* Use common timer */

2
arch/mips/lib/cache.c
View File

@ -38,7 +38,7 @@ static void probe_l2(void)
l2c = read_c0_config5() & MIPS_CONF5_L2C;
}
if (l2c && config_enabled(CONFIG_MIPS_CM)) {
if (l2c && IS_ENABLED(CONFIG_MIPS_CM)) {
gd->arch.l2_line_size = mips_cm_l2_line_size();
} else if (l2c) {
/* We don't know how to retrieve L2 config on this system */

1
board/advantech/imx8qm_rom7720_a1/imximage.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
#define __ASSEMBLY__
/* Boot from SD, sector size 0x400 */
BOOT_FROM SD 0x400

1
board/aristainetos/aristainetos2.cfg
View File

@ -21,7 +21,6 @@ IMAGE_VERSION 2
*/
BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
#ifdef CONFIG_IMX_HAB
CSF CONFIG_CSF_SIZE

1
board/beacon/imx8mm/imximage-8mm-lpddr4.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2021 NXP
*/
#define __ASSEMBLY__
BOOT_FROM sd
LOADER u-boot-spl-ddr.bin 0x7E1000

1
board/beacon/imx8mn/imximage-8mn-lpddr4.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2021 NXP
*/
#define __ASSEMBLY__
ROM_VERSION v2
BOOT_FROM sd

1
board/boundary/nitrogen6x/nitrogen6dl.cfg
View File

@ -17,7 +17,6 @@ IMAGE_VERSION 2
*/
BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
#ifdef CONFIG_IMX_HAB
CSF CONFIG_CSF_SIZE

1
board/boundary/nitrogen6x/nitrogen6dl2g.cfg
View File

@ -17,7 +17,6 @@ IMAGE_VERSION 2
*/
BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
#ifdef CONFIG_IMX_HAB
CSF CONFIG_CSF_SIZE

1
board/boundary/nitrogen6x/nitrogen6q.cfg
View File

@ -17,7 +17,6 @@ IMAGE_VERSION 2
*/
BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
#ifdef CONFIG_IMX_HAB
CSF CONFIG_CSF_SIZE

1
board/boundary/nitrogen6x/nitrogen6q2g.cfg
View File

@ -17,7 +17,6 @@ IMAGE_VERSION 2
*/
BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
#ifdef CONFIG_IMX_HAB
CSF CONFIG_CSF_SIZE

1
board/boundary/nitrogen6x/nitrogen6s.cfg
View File

@ -17,7 +17,6 @@ IMAGE_VERSION 2
*/
BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
#ifdef CONFIG_IMX_HAB
CSF CONFIG_CSF_SIZE

1
board/boundary/nitrogen6x/nitrogen6s1g.cfg
View File

@ -17,7 +17,6 @@ IMAGE_VERSION 2
*/
BOOT_FROM spi
#define __ASSEMBLY__
#include <config.h>
#ifdef CONFIG_IMX_HAB
CSF CONFIG_CSF_SIZE

1
board/compulab/imx8mm-cl-iot-gate/imximage-8mm-lpddr4.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2021 NXP
*/
#define __ASSEMBLY__
BOOT_FROM sd
LOADER u-boot-spl-ddr.bin 0x7e1000

1
board/congatec/cgtqmx8/imximage.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
#define __ASSEMBLY__
/* Boot from SD, sector size 0x400 */
BOOT_FROM SD 0x400

1
board/ea/mx7ulp_com/imximage.cfg
View File

@ -9,7 +9,6 @@
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/freescale/imx8mm_evk/imximage-8mm-lpddr4.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2021 NXP
*/
#define __ASSEMBLY__
BOOT_FROM sd
LOADER u-boot-spl-ddr.bin 0x7E1000

1
board/freescale/imx8mn_evk/imximage-8mn-ddr4.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2021 NXP
*/
#define __ASSEMBLY__
ROM_VERSION v2
BOOT_FROM sd

1
board/freescale/imx8mp_evk/imximage-8mp-lpddr4.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2021 NXP
*/
#define __ASSEMBLY__
ROM_VERSION v2
BOOT_FROM sd

1
board/freescale/imx8qm_mek/imximage.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2018 NXP
*/
#define __ASSEMBLY__
/* Boot from SD, sector size 0x400 */
BOOT_FROM SD 0x400

1
board/freescale/imx8qm_mek/uboot-container.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
#define __ASSEMBLY__
/* This file is to create a container image could be loaded by SPL */
BOOT_FROM SD 0x400

1
board/freescale/imx8qxp_mek/imximage.cfg
View File

@ -6,7 +6,6 @@
* and create imx8image boot image
*/
#define __ASSEMBLY__
/* Boot from SD, sector size 0x400 */
BOOT_FROM SD 0x400

1
board/freescale/imx8qxp_mek/uboot-container.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
#define __ASSEMBLY__
/* This file is to create a container image could be loaded by SPL */
BOOT_FROM SD 0x400

1
board/freescale/imxrt1020-evk/imximage.cfg
View File

@ -4,7 +4,6 @@
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/freescale/imxrt1050-evk/imximage.cfg
View File

@ -4,7 +4,6 @@
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/freescale/mx6slevk/imximage.cfg
View File

@ -7,7 +7,6 @@
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/freescale/mx6sllevk/imximage.cfg
View File

@ -8,7 +8,6 @@
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/freescale/mx6sxsabreauto/imximage.cfg
View File

@ -3,7 +3,6 @@
* Copyright (C) 2014 Freescale Semiconductor, Inc.
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/freescale/mx6sxsabresd/imximage.cfg
View File

@ -3,7 +3,6 @@
* Copyright (C) 2014 Freescale Semiconductor, Inc.
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/freescale/mx6ullevk/imximage.cfg
View File

@ -8,7 +8,6 @@
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/freescale/mx7dsabresd/imximage.cfg
View File

@ -8,7 +8,6 @@
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/freescale/mx7ulp_evk/imximage.cfg
View File

@ -8,7 +8,6 @@
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/gateworks/venice/imximage-8mm-lpddr4.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2021 Gateworks Corporation
*/
#define __ASSEMBLY__
BOOT_FROM sd
LOADER u-boot-spl-ddr.bin 0x7E1000

1
board/ge/bx50v3/bx50v3.cfg
View File

@ -13,7 +13,6 @@
IMAGE_VERSION 2
BOOT_FROM sd
#define __ASSEMBLY__
#include <config.h>
#include "asm/arch/mx6-ddr.h"
#include "asm/arch/iomux.h"

1
board/kontron/sl-mx8mm/imximage.cfg
View File

@ -3,7 +3,6 @@
* Copyright (C) 2019 Kontron Electronics GmbH
*/
#define __ASSEMBLY__
BOOT_FROM sd
LOADER u-boot-spl-ddr.bin 0x7E1000

1
board/novtech/meerkat96/imximage.cfg
View File

@ -9,7 +9,6 @@
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg
View File

@ -2,7 +2,6 @@
// Copyright (C) 2016 Freescale Semiconductor, Inc.
// Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua>
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg
View File

@ -2,7 +2,6 @@
// Copyright (C) 2016 Freescale Semiconductor, Inc.
// Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua>
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/phytec/phycore_imx8mm/imximage-8mm-sd.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2021 Phytec Messtechnik GmbH
*/
#define __ASSEMBLY__
BOOT_FROM sd
LOADER u-boot-spl-ddr.bin 0x7E1000

1
board/phytec/phycore_imx8mp/imximage-8mp-sd.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2021 NXP
*/
#define __ASSEMBLY__
ROM_VERSION v2
BOOT_FROM sd

1
board/ronetix/imx8mq-cm/imximage-8mq-lpddr4.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2021 NXP
*/
#define __ASSEMBLY__
BOOT_FROM sd
LOADER mkimage.flash.mkimage 0x7E1000

1
board/siemens/capricorn/imximage.cfg
View File

@ -6,7 +6,6 @@
* and create imx8image boot image
*/
#define __ASSEMBLY__
/* Boot from SD, sector size 0x400 */
BOOT_FROM SD 0x400

1
board/siemens/capricorn/uboot-container.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2019 NXP
*/
#define __ASSEMBLY__
/* This file is to create a container image could be loaded by SPL */
BOOT_FROM SD 0x400

1
board/softing/vining_2000/imximage.cfg
View File

@ -4,7 +4,6 @@
* Copyright (C) 2017-2019 softing automotive electronics gmbH
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/somlabs/visionsom-6ull/imximage.cfg
View File

@ -9,7 +9,6 @@
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/storopack/smegw01/imximage.cfg
View File

@ -8,7 +8,6 @@
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
IMAGE_VERSION 2

1
board/tbs/tbs2910/tbs2910.cfg
View File

@ -3,7 +3,6 @@
* Copyright (C) 2017 Soeren Moch <smoch@web.de>
*/
#define __ASSEMBLY__
#include "asm/arch/crm_regs.h"
#include "asm/arch/iomux.h"
#include "asm/arch/mx6-ddr.h"

1
board/technexion/pico-imx6ul/imximage.cfg
View File

@ -8,7 +8,6 @@
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/toradex/apalis-imx8/apalis-imx8-imximage.cfg
View File

@ -6,7 +6,6 @@
* and create imx8image boot image
*/
#define __ASSEMBLY__
/* Boot from SD, sector size 0x400 */
BOOT_FROM EMMC_FASTBOOT 0x400

1
board/toradex/apalis-imx8x/apalis-imx8x-imximage.cfg
View File

@ -6,7 +6,6 @@
* and create imx8image boot image
*/
#define __ASSEMBLY__
/* Boot from SD, sector size 0x400 */
BOOT_FROM EMMC_FASTBOOT 0x400

1
board/toradex/colibri-imx6ull/imximage.cfg
View File

@ -9,7 +9,6 @@
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/toradex/colibri-imx8x/colibri-imx8x-imximage.cfg
View File

@ -6,7 +6,6 @@
* and create imx8image boot image
*/
#define __ASSEMBLY__
/* Boot from SD, sector size 0x400 */
BOOT_FROM EMMC_FASTBOOT 0x400

1
board/toradex/colibri_imx7/imximage.cfg
View File

@ -9,7 +9,6 @@
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/toradex/verdin-imx8mm/imximage.cfg
View File

@ -3,7 +3,6 @@
* Copyright 2020-2021 Toradex
*/
#define __ASSEMBLY__
BOOT_FROM emmc_fastboot
LOADER u-boot-spl-ddr.bin 0x7e1000

2
board/toradex/verdin-imx8mp/imximage.cfg
View File

@ -3,8 +3,6 @@
* Copyright 2022 Toradex
*/
#define __ASSEMBLY__
ROM_VERSION v2
BOOT_FROM emmc_fastboot
LOADER u-boot-spl-ddr.bin 0x920000

1
board/tq/tqma6/tqma6dl.cfg
View File

@ -11,7 +11,6 @@
/* image version */
IMAGE_VERSION 2
#define __ASSEMBLY__
#include <config.h>
/*

1
board/tq/tqma6/tqma6q.cfg
View File

@ -11,7 +11,6 @@
/* image version */
IMAGE_VERSION 2
#define __ASSEMBLY__
#include <config.h>
/*

1
board/tq/tqma6/tqma6s.cfg
View File

@ -11,7 +11,6 @@
/* image version */
IMAGE_VERSION 2
#define __ASSEMBLY__
#include <config.h>
/*

2
board/variscite/imx8mn_var_som/imximage-8mn-ddr4.cfg
View File

@ -3,8 +3,6 @@
* Copyright 2021 Collabora Ltd.
*/
#define __ASSEMBLY__
ROM_VERSION v2
BOOT_FROM sd
LOADER u-boot-spl-ddr.bin 0x912000

1
board/warp/imximage.cfg
View File

@ -7,7 +7,6 @@
*
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
/* image version */

1
board/warp7/imximage.cfg
View File

@ -8,7 +8,6 @@
* The syntax is taken as close as possible with the kwbimage
*/
#define __ASSEMBLY__
#include <config.h>
IMAGE_VERSION 2

15
common/bloblist.c
View File

@ -430,18 +430,23 @@ void bloblist_reloc(void *to, uint to_size, void *from, uint from_size)
int bloblist_init(void)
{
bool fixed = IS_ENABLED(CONFIG_BLOBLIST_FIXED);
int ret = -ENOENT;
ulong addr, size;
bool expected;
/**
* Wed expect to find an existing bloblist in the first phase of U-Boot
* that runs
* We don't expect to find an existing bloblist in the first phase of
* U-Boot that runs. Also we have no way to receive the address of an
* allocated bloblist from a previous stage, so it must be at a fixed
* address.
*/
expected = !u_boot_first_phase();
expected = fixed && !u_boot_first_phase();
if (spl_prev_phase() == PHASE_TPL && !IS_ENABLED(CONFIG_TPL_BLOBLIST))
expected = false;
addr = bloblist_addr();
if (fixed)
addr = IF_ENABLED_INT(CONFIG_BLOBLIST_FIXED,
CONFIG_BLOBLIST_ADDR);
size = CONFIG_BLOBLIST_SIZE;
if (expected) {
ret = bloblist_check(addr, size);
@ -460,6 +465,8 @@ int bloblist_init(void)
if (!ptr)
return log_msg_ret("alloc", -ENOMEM);
addr = map_to_sysmem(ptr);
} else if (!fixed) {
return log_msg_ret("!fixed", ret);
}
log_debug("Creating new bloblist size %lx at %lx\n", size,
addr);

8
configs/M5253DEMO_defconfig
View File

@ -20,6 +20,14 @@ CONFIG_CMD_FAT=y
CONFIG_MAC_PARTITION=y
CONFIG_ENV_ADDR=0xFF804000
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_IDE_MAXBUS=1
CONFIG_SYS_ATA_STRIDE=4
CONFIG_SYS_ATA_DATA_OFFSET=0xA0
CONFIG_SYS_ATA_REG_OFFSET=0xA0
CONFIG_SYS_ATA_ALT_OFFSET=0xC0
CONFIG_SYS_ATA_IDE0_OFFSET=0
CONFIG_ATAPI=y
CONFIG_IDE_RESET=y
CONFIG_SYS_I2C_LEGACY=y
CONFIG_SYS_I2C_FSL=y
CONFIG_SYS_FSL_I2C_OFFSET=0x280

1
configs/MPC837XERDB_defconfig
View File

@ -170,6 +170,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_ADDR=0xFE080000
CONFIG_DM=y
CONFIG_FSL_SATA=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_SYS_BR0_PRELIM=0xFE001001
CONFIG_SYS_OR0_PRELIM=0xFF800193

1
configs/P1010RDB-PA_36BIT_NAND_defconfig
View File

@ -54,6 +54,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y

1
configs/P1010RDB-PA_36BIT_NOR_defconfig
View File

@ -36,6 +36,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y

1
configs/P1010RDB-PA_36BIT_SDCARD_defconfig
View File

@ -48,6 +48,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y

1
configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
View File

@ -50,6 +50,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y

1
configs/P1010RDB-PA_NAND_defconfig
View File

@ -53,6 +53,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y

1
configs/P1010RDB-PA_NOR_defconfig
View File

@ -35,6 +35,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y

1
configs/P1010RDB-PA_SDCARD_defconfig
View File

@ -47,6 +47,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y

1
configs/P1010RDB-PA_SPIFLASH_defconfig
View File

@ -49,6 +49,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y

1
configs/P1010RDB-PB_36BIT_NAND_defconfig
View File

@ -55,6 +55,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y

1
configs/P1010RDB-PB_36BIT_NOR_defconfig
View File

@ -37,6 +37,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y

1
configs/P1010RDB-PB_36BIT_SDCARD_defconfig
View File

@ -49,6 +49,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y

1
configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
View File

@ -51,6 +51,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y

1
configs/P1010RDB-PB_NAND_defconfig
View File

@ -54,6 +54,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y

1
configs/P1010RDB-PB_NOR_defconfig
View File

@ -36,6 +36,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y

1
configs/P1010RDB-PB_SDCARD_defconfig
View File

@ -48,6 +48,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y

1
configs/P1010RDB-PB_SPIFLASH_defconfig
View File

@ -50,6 +50,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y

1
configs/P2041RDB_NAND_defconfig
View File

@ -40,6 +40,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_SYS_BR0_PRELIM=0xFFA00C21

1
configs/P2041RDB_SDCARD_defconfig
View File

@ -41,6 +41,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_SYS_BR0_PRELIM=0xE8001001

1
configs/P2041RDB_SPIFLASH_defconfig
View File

@ -42,6 +42,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_SYS_BR0_PRELIM=0xE8001001

1
configs/P2041RDB_defconfig
View File

@ -37,6 +37,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_SYS_BR0_PRELIM_BOOL=y
CONFIG_SYS_BR0_PRELIM=0xE8001001

1
configs/P3041DS_NAND_defconfig
View File

@ -38,6 +38,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y

1
configs/P3041DS_SDCARD_defconfig
View File

@ -39,6 +39,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y

1
configs/P3041DS_SPIFLASH_defconfig
View File

@ -40,6 +40,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_FSL_CAAM=y
CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y

Some files were not shown because too many files have changed in this diff Show More