random-mirrors/smaeul-u-boot
1
0
Fork 0
mirror of https://github.com/smaeul/u-boot.git synced 2025-11-04 05:50:17 +00:00
Code Issues Packages Projects Releases Wiki Activity

armv8: fsl-lsch3: Instantiate TZASC configuration in 2 groups

Browse Source 
Number of TZASC instances may vary across NXP SoCs.
So put TZASC configuration under instance specific defines.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Ashish kumar 2017-04-07 11:40:32 +05:30 committed by York Sun
parent df1a51df3b
commit 85a9a14e4b
2 changed files with 21 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
arch/arm/cpu/armv8/fsl-layerscape/Kconfig
View File

@ -64,6 +64,8 @@ config ARCH_LS2080A
select SYS_FSL_SEC_COMPAT_5
select SYS_FSL_SEC_LE
select SYS_FSL_SRDS_2
select FSL_TZASC_1
select FSL_TZASC_2
select SYS_FSL_ERRATUM_A008336
select SYS_FSL_ERRATUM_A008511
select SYS_FSL_ERRATUM_A008514
@ -238,6 +240,12 @@ config SYS_FSL_SRDS_2
config SYS_HAS_SERDES
bool
config FSL_TZASC_1
bool
config FSL_TZASC_2
bool
endmenu
menu "Layerscape clock tree configuration"

24
arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S
View File

@ -229,38 +229,40 @@ ENTRY(lowlevel_init)
* NOTE: As per the CCSR map doc, TZASC 3 and TZASC 4 are just
* placeholders.
*/
#ifdef CONFIG_FSL_TZASC_1
ldr x1, =TZASC_GATE_KEEPER(0)
ldr w0, [x1] /* Filter 0 Gate Keeper Register */
orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */
str w0, [x1]
ldr x1, =TZASC_GATE_KEEPER(1)
ldr w0, [x1] /* Filter 0 Gate Keeper Register */
orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */
str w0, [x1]
ldr x1, =TZASC_REGION_ATTRIBUTES_0(0)
ldr w0, [x1] /* Region-0 Attributes Register */
orr w0, w0, #1 << 31 /* Set Sec global write en, Bit[31] */
orr w0, w0, #1 << 30 /* Set Sec global read en, Bit[30] */
str w0, [x1]
ldr x1, =TZASC_REGION_ID_ACCESS_0(0)
ldr w0, [x1] /* Region-0 Access Register */
mov w0, #0xFFFFFFFF /* Set nsaid_wr_en and nsaid_rd_en */
str w0, [x1]
#endif
#ifdef CONFIG_FSL_TZASC_2
ldr x1, =TZASC_GATE_KEEPER(1)
ldr w0, [x1] /* Filter 0 Gate Keeper Register */
orr w0, w0, #1 << 0 /* Set open_request for Filter 0 */
str w0, [x1]
ldr x1, =TZASC_REGION_ATTRIBUTES_0(1)
ldr w0, [x1] /* Region-1 Attributes Register */
orr w0, w0, #1 << 31 /* Set Sec global write en, Bit[31] */
orr w0, w0, #1 << 30 /* Set Sec global read en, Bit[30] */
str w0, [x1]
ldr x1, =TZASC_REGION_ID_ACCESS_0(0)
ldr w0, [x1] /* Region-0 Access Register */
mov w0, #0xFFFFFFFF /* Set nsaid_wr_en and nsaid_rd_en */
str w0, [x1]
ldr x1, =TZASC_REGION_ID_ACCESS_0(1)
ldr w0, [x1] /* Region-1 Attributes Register */
mov w0, #0xFFFFFFFF /* Set nsaid_wr_en and nsaid_rd_en */
str w0, [x1]
#endif
isb
dsb sy
#endif