From 8bbd8aee0cc2f96e2d3979aa677da7a2d494f86b Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Thu, 1 Dec 2022 22:47:01 -0600 Subject: [PATCH] sysreset: Add BL808 sysreset driver Signed-off-by: Samuel Holland --- drivers/sysreset/Kconfig | 6 +++++ drivers/sysreset/Makefile | 1 + drivers/sysreset/sysreset_bl808.c | 42 +++++++++++++++++++++++++++++++ 3 files changed, 49 insertions(+) create mode 100644 drivers/sysreset/sysreset_bl808.c diff --git a/drivers/sysreset/Kconfig b/drivers/sysreset/Kconfig index 03f7fdd5978..131ed88152f 100644 --- a/drivers/sysreset/Kconfig +++ b/drivers/sysreset/Kconfig @@ -66,6 +66,12 @@ config POWEROFF_GPIO Support for system poweroff using a GPIO pin. This can be used for systems having a single GPIO to trigger a system poweroff. +config SYSRESET_BL808 + bool "Enable support for BL808 system reset" + depends on TARGET_BOUFFALO_BL808 + help + This enables the system reset driver support for the BL808 SoC. + config SYSRESET_GPIO bool "Enable support for GPIO reset driver" select DM_GPIO diff --git a/drivers/sysreset/Makefile b/drivers/sysreset/Makefile index 0ed3bbf356a..95dfe37840e 100644 --- a/drivers/sysreset/Makefile +++ b/drivers/sysreset/Makefile @@ -8,6 +8,7 @@ obj-$(CONFIG_ARCH_ROCKCHIP) += sysreset_rockchip.o obj-$(CONFIG_ARCH_STI) += sysreset_sti.o obj-$(CONFIG_SANDBOX) += sysreset_sandbox.o obj-$(CONFIG_POWEROFF_GPIO) += poweroff_gpio.o +obj-$(CONFIG_SYSRESET_BL808) += sysreset_bl808.o obj-$(CONFIG_SYSRESET_GPIO) += sysreset_gpio.o obj-$(CONFIG_SYSRESET_MPC83XX) += sysreset_mpc83xx.o obj-$(CONFIG_SYSRESET_MICROBLAZE) += sysreset_microblaze.o diff --git a/drivers/sysreset/sysreset_bl808.c b/drivers/sysreset/sysreset_bl808.c new file mode 100644 index 00000000000..c6c2e73310f --- /dev/null +++ b/drivers/sysreset/sysreset_bl808.c @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0+ + +#include +#include +#include +#include + +struct bl808_sysreset_plat { + void *base; +}; + +static int bl808_sysreset_request(struct udevice *dev, enum sysreset_t type) +{ + struct bl808_sysreset_plat *plat = dev_get_plat(dev); + + setbits_le32(plat->base + GLB_SWRST_CFG2_OFFSET, + GLB_REG_CTRL_PWRON_RST_MSK); + + return -EINPROGRESS; +} + +static struct sysreset_ops bl808_sysreset_ops = { + .request = bl808_sysreset_request, +}; + +static int bl808_sysreset_of_to_plat(struct udevice *dev) +{ + struct bl808_sysreset_plat *plat = dev_get_plat(dev); + + plat->base = dev_read_addr_ptr(dev); + if (!plat->base) + return -ENOMEM; + + return 0; +} + +U_BOOT_DRIVER(bl808_sysreset) = { + .name = "bl808_sysreset", + .id = UCLASS_SYSRESET, + .of_to_plat = bl808_sysreset_of_to_plat, + .ops = &bl808_sysreset_ops, +};