mirror of
				https://github.com/smaeul/u-boot.git
				synced 2025-11-03 21:48:15 +00:00 
			
		
		
		
	Merge branch 'master' of git://git.denx.de/u-boot
This commit is contained in:
		
						commit
						8f171a56b5
					
				@ -37,7 +37,7 @@
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#define	MXS_I2C_MAX_TIMEOUT	1000000
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					#define	MXS_I2C_MAX_TIMEOUT	1000000
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void mxs_i2c_reset(void)
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					static void mxs_i2c_reset(void)
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{
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					{
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	struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
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						struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
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	int ret;
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						int ret;
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@ -59,7 +59,7 @@ void mxs_i2c_reset(void)
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	i2c_set_bus_speed(speed);
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						i2c_set_bus_speed(speed);
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}
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					}
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void mxs_i2c_setup_read(uint8_t chip, int len)
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					static void mxs_i2c_setup_read(uint8_t chip, int len)
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{
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					{
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	struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
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						struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
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@ -77,7 +77,7 @@ void mxs_i2c_setup_read(uint8_t chip, int len)
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	writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
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						writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
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}
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					}
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void mxs_i2c_write(uchar chip, uint addr, int alen,
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					static void mxs_i2c_write(uchar chip, uint addr, int alen,
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			uchar *buf, int blen, int stop)
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								uchar *buf, int blen, int stop)
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{
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					{
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	struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
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						struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
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@ -121,7 +121,7 @@ void mxs_i2c_write(uchar chip, uint addr, int alen,
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	writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
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						writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
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}
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					}
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int mxs_i2c_wait_for_ack(void)
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					static int mxs_i2c_wait_for_ack(void)
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{
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					{
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	struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
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						struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
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	uint32_t tmp;
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						uint32_t tmp;
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@ -156,8 +156,6 @@
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#define CONFIG_HARD_I2C			1
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					#define CONFIG_HARD_I2C			1
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#define CONFIG_SYS_I2C_SPEED		100000
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					#define CONFIG_SYS_I2C_SPEED		100000
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#define CONFIG_SYS_I2C_SLAVE		1
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					#define CONFIG_SYS_I2C_SLAVE		1
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#define CONFIG_SYS_I2C_BUS		0
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#define CONFIG_SYS_I2C_BUS_SELECT	1
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					 | 
				
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#define CONFIG_DRIVER_OMAP34XX_I2C	1
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					#define CONFIG_DRIVER_OMAP34XX_I2C	1
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#undef CONFIG_CMD_NET
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					#undef CONFIG_CMD_NET
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@ -150,8 +150,6 @@
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#define CONFIG_HARD_I2C			1
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					#define CONFIG_HARD_I2C			1
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#define CONFIG_SYS_I2C_SPEED		100000
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					#define CONFIG_SYS_I2C_SPEED		100000
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#define CONFIG_SYS_I2C_SLAVE		1
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					#define CONFIG_SYS_I2C_SLAVE		1
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#define CONFIG_SYS_I2C_BUS		0
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#define CONFIG_SYS_I2C_BUS_SELECT	1
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#define CONFIG_DRIVER_OMAP34XX_I2C	1
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					#define CONFIG_DRIVER_OMAP34XX_I2C	1
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#undef CONFIG_CMD_NET
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					#undef CONFIG_CMD_NET
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@ -157,8 +157,6 @@
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#define CONFIG_HARD_I2C
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					#define CONFIG_HARD_I2C
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#define CONFIG_SYS_I2C_SPEED		100000
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					#define CONFIG_SYS_I2C_SPEED		100000
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#define CONFIG_SYS_I2C_SLAVE		1
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					#define CONFIG_SYS_I2C_SLAVE		1
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#define CONFIG_SYS_I2C_BUS		0
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					 | 
				
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#define CONFIG_SYS_I2C_BUS_SELECT	1
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#define CONFIG_DRIVER_OMAP34XX_I2C
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					#define CONFIG_DRIVER_OMAP34XX_I2C
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#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
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					#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
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					#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
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@ -108,8 +108,6 @@
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#define CONFIG_HARD_I2C			1
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					#define CONFIG_HARD_I2C			1
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#define CONFIG_SYS_I2C_SPEED		100000
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					#define CONFIG_SYS_I2C_SPEED		100000
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#define CONFIG_SYS_I2C_SLAVE		1
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					#define CONFIG_SYS_I2C_SLAVE		1
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#define CONFIG_SYS_I2C_BUS		0
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					 | 
				
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#define CONFIG_SYS_I2C_BUS_SELECT	1
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#define CONFIG_DRIVER_OMAP34XX_I2C	1
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					#define CONFIG_DRIVER_OMAP34XX_I2C	1
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/* TWL4030 */
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					/* TWL4030 */
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@ -141,8 +141,6 @@
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#define CONFIG_HARD_I2C
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					#define CONFIG_HARD_I2C
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#define CONFIG_SYS_I2C_SPEED		100000
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					#define CONFIG_SYS_I2C_SPEED		100000
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#define CONFIG_SYS_I2C_SLAVE		1
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					#define CONFIG_SYS_I2C_SLAVE		1
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#define CONFIG_SYS_I2C_BUS		0
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					 | 
				
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#define CONFIG_SYS_I2C_BUS_SELECT	1
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#define CONFIG_DRIVER_OMAP34XX_I2C	1
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					#define CONFIG_DRIVER_OMAP34XX_I2C	1
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/*
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					/*
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@ -129,8 +129,6 @@
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#define CONFIG_HARD_I2C			1
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					#define CONFIG_HARD_I2C			1
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#define CONFIG_SYS_I2C_SPEED		100000
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					#define CONFIG_SYS_I2C_SPEED		100000
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#define CONFIG_SYS_I2C_SLAVE		1
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					#define CONFIG_SYS_I2C_SLAVE		1
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#define CONFIG_SYS_I2C_BUS		0
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					 | 
				
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#define CONFIG_SYS_I2C_BUS_SELECT	1
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					 | 
				
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#define CONFIG_DRIVER_OMAP34XX_I2C	1
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					#define CONFIG_DRIVER_OMAP34XX_I2C	1
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/*
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					/*
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@ -151,7 +151,6 @@
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#define CONFIG_HARD_I2C
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					#define CONFIG_HARD_I2C
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#define CONFIG_SYS_I2C_SPEED		100000
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					#define CONFIG_SYS_I2C_SPEED		100000
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#define CONFIG_SYS_I2C_SLAVE		1
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					#define CONFIG_SYS_I2C_SLAVE		1
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#define CONFIG_SYS_I2C_BUS		0
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					 | 
				
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#define CONFIG_DRIVER_OMAP34XX_I2C
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					#define CONFIG_DRIVER_OMAP34XX_I2C
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/* RTC */
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					/* RTC */
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@ -178,8 +178,6 @@
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#define CONFIG_HARD_I2C			1
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					#define CONFIG_HARD_I2C			1
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#define CONFIG_SYS_I2C_SPEED		100000
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					#define CONFIG_SYS_I2C_SPEED		100000
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#define CONFIG_SYS_I2C_SLAVE		1
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					#define CONFIG_SYS_I2C_SLAVE		1
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#define CONFIG_SYS_I2C_BUS		0
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					 | 
				
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#define CONFIG_SYS_I2C_BUS_SELECT	1
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					 | 
				
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#define CONFIG_I2C_MULTI_BUS		1
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					#define CONFIG_I2C_MULTI_BUS		1
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#define CONFIG_DRIVER_OMAP34XX_I2C	1
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					#define CONFIG_DRIVER_OMAP34XX_I2C	1
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#define CONFIG_VIDEO_OMAP3	/* DSS Support			*/
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					#define CONFIG_VIDEO_OMAP3	/* DSS Support			*/
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@ -100,8 +100,6 @@
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#define CONFIG_SYS_I2C_SPEED		100000
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					#define CONFIG_SYS_I2C_SPEED		100000
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#define CONFIG_SYS_I2C_SLAVE		1
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					#define CONFIG_SYS_I2C_SLAVE		1
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#define CONFIG_SYS_I2C_BUS		0
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					 | 
				
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#define CONFIG_SYS_I2C_BUS_SELECT	1
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					 | 
				
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/*
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					/*
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 * PISMO support
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					 * PISMO support
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@ -138,8 +138,6 @@
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#define CONFIG_SYS_I2C_SPEED		100000
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					#define CONFIG_SYS_I2C_SPEED		100000
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#define CONFIG_SYS_I2C_SLAVE		1
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					#define CONFIG_SYS_I2C_SLAVE		1
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#define CONFIG_SYS_I2C_BUS		0
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					 | 
				
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#define CONFIG_SYS_I2C_BUS_SELECT	1
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					 | 
				
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#define CONFIG_I2C_MULTI_BUS
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					#define CONFIG_I2C_MULTI_BUS
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/*
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					/*
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@ -142,8 +142,6 @@
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#define CONFIG_HARD_I2C			1
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					#define CONFIG_HARD_I2C			1
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#define CONFIG_SYS_I2C_SPEED		100000
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					#define CONFIG_SYS_I2C_SPEED		100000
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#define CONFIG_SYS_I2C_SLAVE		0
 | 
					#define CONFIG_SYS_I2C_SLAVE		0
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#define CONFIG_SYS_I2C_BUS		0 /* This isn't used anywhere ?? */
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					 | 
				
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#define CONFIG_SYS_I2C_BUS_SELECT	1 /* This isn't used anywhere ?? */
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					 | 
				
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#define CONFIG_DRIVER_OMAP34XX_I2C	1
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					#define CONFIG_DRIVER_OMAP34XX_I2C	1
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#define CONFIG_I2C_MULTI_BUS		1
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					#define CONFIG_I2C_MULTI_BUS		1
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@ -126,8 +126,6 @@
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#define CONFIG_HARD_I2C			1
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					#define CONFIG_HARD_I2C			1
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#define CONFIG_SYS_I2C_SPEED		100000
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					#define CONFIG_SYS_I2C_SPEED		100000
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#define CONFIG_SYS_I2C_SLAVE		1
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					#define CONFIG_SYS_I2C_SLAVE		1
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#define CONFIG_SYS_I2C_BUS		0
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					 | 
				
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#define CONFIG_SYS_I2C_BUS_SELECT	1
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					 | 
				
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#define CONFIG_DRIVER_OMAP34XX_I2C	1
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					#define CONFIG_DRIVER_OMAP34XX_I2C	1
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/*
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					/*
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@ -132,8 +132,6 @@
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#define CONFIG_HARD_I2C			1
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					#define CONFIG_HARD_I2C			1
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#define CONFIG_SYS_I2C_SPEED		100000
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					#define CONFIG_SYS_I2C_SPEED		100000
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#define CONFIG_SYS_I2C_SLAVE		1
 | 
					#define CONFIG_SYS_I2C_SLAVE		1
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#define CONFIG_SYS_I2C_BUS		0
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					 | 
				
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#define CONFIG_SYS_I2C_BUS_SELECT	1
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					 | 
				
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#define CONFIG_DRIVER_OMAP34XX_I2C	1
 | 
					#define CONFIG_DRIVER_OMAP34XX_I2C	1
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/* OMITTED:  single 1 Gbit MT29F1G NAND flash */
 | 
					/* OMITTED:  single 1 Gbit MT29F1G NAND flash */
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@ -136,8 +136,6 @@
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#define CONFIG_HARD_I2C			1
 | 
					#define CONFIG_HARD_I2C			1
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#define CONFIG_SYS_I2C_SPEED		100000
 | 
					#define CONFIG_SYS_I2C_SPEED		100000
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#define CONFIG_SYS_I2C_SLAVE		1
 | 
					#define CONFIG_SYS_I2C_SLAVE		1
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			||||||
#define CONFIG_SYS_I2C_BUS		0
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					 | 
				
			||||||
#define CONFIG_SYS_I2C_BUS_SELECT	1
 | 
					 | 
				
			||||||
#define CONFIG_DRIVER_OMAP34XX_I2C	1
 | 
					#define CONFIG_DRIVER_OMAP34XX_I2C	1
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/*
 | 
					/*
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@ -156,8 +156,6 @@
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#define CONFIG_HARD_I2C			1
 | 
					#define CONFIG_HARD_I2C			1
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			||||||
#define CONFIG_SYS_I2C_SPEED		100000
 | 
					#define CONFIG_SYS_I2C_SPEED		100000
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			||||||
#define CONFIG_SYS_I2C_SLAVE		1
 | 
					#define CONFIG_SYS_I2C_SLAVE		1
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			||||||
#define CONFIG_SYS_I2C_BUS		0
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					 | 
				
			||||||
#define CONFIG_SYS_I2C_BUS_SELECT	1
 | 
					 | 
				
			||||||
#define CONFIG_DRIVER_OMAP34XX_I2C	1
 | 
					#define CONFIG_DRIVER_OMAP34XX_I2C	1
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			||||||
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			||||||
/*
 | 
					/*
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@ -91,8 +91,6 @@
 | 
				
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#define CONFIG_HARD_I2C			1
 | 
					#define CONFIG_HARD_I2C			1
 | 
				
			||||||
#define CONFIG_SYS_I2C_SPEED		100000
 | 
					#define CONFIG_SYS_I2C_SPEED		100000
 | 
				
			||||||
#define CONFIG_SYS_I2C_SLAVE		1
 | 
					#define CONFIG_SYS_I2C_SLAVE		1
 | 
				
			||||||
#define CONFIG_SYS_I2C_BUS		0
 | 
					 | 
				
			||||||
#define CONFIG_SYS_I2C_BUS_SELECT	1
 | 
					 | 
				
			||||||
#define CONFIG_DRIVER_OMAP34XX_I2C	1
 | 
					#define CONFIG_DRIVER_OMAP34XX_I2C	1
 | 
				
			||||||
#define CONFIG_I2C_MULTI_BUS		1
 | 
					#define CONFIG_I2C_MULTI_BUS		1
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			||||||
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			||||||
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			|||||||
@ -131,8 +131,6 @@
 | 
				
			|||||||
#define CONFIG_HARD_I2C
 | 
					#define CONFIG_HARD_I2C
 | 
				
			||||||
#define CONFIG_SYS_I2C_SPEED		400000
 | 
					#define CONFIG_SYS_I2C_SPEED		400000
 | 
				
			||||||
#define CONFIG_SYS_I2C_SLAVE		1
 | 
					#define CONFIG_SYS_I2C_SLAVE		1
 | 
				
			||||||
#define CONFIG_SYS_I2C_BUS		0
 | 
					 | 
				
			||||||
#define CONFIG_SYS_I2C_BUS_SELECT	1
 | 
					 | 
				
			||||||
#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50		/* base address */
 | 
					#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50		/* base address */
 | 
				
			||||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1		/* bytes of address */
 | 
					#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1		/* bytes of address */
 | 
				
			||||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	0x07
 | 
					#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	0x07
 | 
				
			||||||
 | 
				
			|||||||
@ -98,8 +98,6 @@
 | 
				
			|||||||
#define CONFIG_HARD_I2C
 | 
					#define CONFIG_HARD_I2C
 | 
				
			||||||
#define CONFIG_SYS_I2C_SPEED		100000
 | 
					#define CONFIG_SYS_I2C_SPEED		100000
 | 
				
			||||||
#define CONFIG_SYS_I2C_SLAVE		1
 | 
					#define CONFIG_SYS_I2C_SLAVE		1
 | 
				
			||||||
#define CONFIG_SYS_I2C_BUS		0
 | 
					 | 
				
			||||||
#define CONFIG_SYS_I2C_BUS_SELECT	1
 | 
					 | 
				
			||||||
#define CONFIG_DRIVER_OMAP34XX_I2C	1
 | 
					#define CONFIG_DRIVER_OMAP34XX_I2C	1
 | 
				
			||||||
 | 
					
 | 
				
			||||||
/* TWL4030 */
 | 
					/* TWL4030 */
 | 
				
			||||||
 | 
				
			|||||||
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