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video: Add skeleton driver for ZynqMP Display port driver

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The reason for this driver is to use call power management driver to enable
it in PMUFW. There is missing functionality now but should be added in
near future.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/598cb9515bbabc803f72e287464e3d107cd106a3.1645627920.git.michal.simek@xilinx.com
This commit is contained in:
Michal Simek 2022-02-23 15:52:02 +01:00
parent 90ab7fafb6
commit 98cacab765
3 changed files with 75 additions and 0 deletions
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8
drivers/video/Kconfig
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@ -680,6 +680,14 @@ config VIDEO_SEPS525
Enable support for the Syncoam PM-OLED display driver (RGB 160x128).
Currently driver is supporting only SPI interface.
config VIDEO_ZYNQMP_DPSUB
bool "Enable video support for ZynqMP Display Port"
depends on DM_VIDEO && ZYNQMP_POWER_DOMAIN
help
Enable support for Xilinx ZynqMP Display Port. Currently this file
is used as placeholder for driver. The main reason is to record
compatible string and calling power domain driver.
source "drivers/video/nexell/Kconfig"
config VIDEO

1
drivers/video/Makefile
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@ -74,6 +74,7 @@ obj-$(CONFIG_VIDEO_TEGRA20) += tegra.o
obj-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o
obj-$(CONFIG_VIDEO_VESA) += vesa.o
obj-$(CONFIG_VIDEO_SEPS525) += seps525.o
obj-$(CONFIG_VIDEO_ZYNQMP_DPSUB) += zynqmp_dpsub.o
obj-y += bridge/
obj-y += sunxi/

66
drivers/video/zynqmp_dpsub.c Normal file
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@ -0,0 +1,66 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2021 Xilinx Inc.
*/
#include <common.h>
#include <cpu_func.h>
#include <dm.h>
#include <errno.h>
#include <video.h>
#include <dm/device_compat.h>
#define WIDTH 640
#define HEIGHT 480
/**
* struct zynqmp_dpsub_priv - Private structure
* @dev: Device uclass for video_ops
*/
struct zynqmp_dpsub_priv {
struct udevice *dev;
};
static int zynqmp_dpsub_probe(struct udevice *dev)
{
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
struct zynqmp_dpsub_priv *priv = dev_get_priv(dev);
uc_priv->bpix = VIDEO_BPP16;
uc_priv->xsize = WIDTH;
uc_priv->ysize = HEIGHT;
uc_priv->rot = 0;
priv->dev = dev;
/* Only placeholder for power domain driver */
return 0;
}
static int zynqmp_dpsub_bind(struct udevice *dev)
{
struct video_uc_plat *plat = dev_get_uclass_plat(dev);
plat->size = WIDTH * HEIGHT * 16;
return 0;
}
static const struct video_ops zynqmp_dpsub_ops = {
};
static const struct udevice_id zynqmp_dpsub_ids[] = {
{ .compatible = "xlnx,zynqmp-dpsub-1.7" },
{ }
};
U_BOOT_DRIVER(zynqmp_dpsub_video) = {
.name = "zynqmp_dpsub_video",
.id = UCLASS_VIDEO,
.of_match = zynqmp_dpsub_ids,
.ops = &zynqmp_dpsub_ops,
.plat_auto = sizeof(struct video_uc_plat),
.bind = zynqmp_dpsub_bind,
.probe = zynqmp_dpsub_probe,
.priv_auto = sizeof(struct zynqmp_dpsub_priv),
};