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arm: vf610: lpuart: fix status register handling
The status register 1 (S1) is not writeable, hence we should not write it. In order to clear the RDRF flag we only need to read the data register. Also, when stressing U-Boot a lot with serial input, an overflow can occur which asserts the S1_OR flag (while not asserting the S1_RDRF flag). To clear this flag we again just need to read the data register, hence add this flag to the abort conditions for the while loop. Insert a compiler barrier to make sure reading the data register gets executed after reading the status register. Signed-off-by: Stefan Agner <stefan@agner.ch>
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@ -14,6 +14,7 @@
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#define US1_TDRE (1 << 7)
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#define US1_TDRE (1 << 7)
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#define US1_RDRF (1 << 5)
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#define US1_RDRF (1 << 5)
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#define US1_OR (1 << 3)
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#define UC2_TE (1 << 3)
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#define UC2_TE (1 << 3)
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#define UC2_RE (1 << 2)
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#define UC2_RE (1 << 2)
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@ -38,14 +39,10 @@ static void lpuart_serial_setbrg(void)
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static int lpuart_serial_getc(void)
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static int lpuart_serial_getc(void)
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{
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{
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u8 status;
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while (!(__raw_readb(&base->us1) & (US1_RDRF | US1_OR)))
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while (!(__raw_readb(&base->us1) & US1_RDRF))
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WATCHDOG_RESET();
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WATCHDOG_RESET();
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status = __raw_readb(&base->us1);
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barrier();
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status |= US1_RDRF;
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__raw_writeb(status, &base->us1);
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return __raw_readb(&base->ud);
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return __raw_readb(&base->ud);
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}
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}
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