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clk: sunxi: d1: Set CPU frequency in SPL

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Signed-off-by: Samuel Holland <samuel@sholland.org>
This commit is contained in:
Samuel Holland 2022-11-24 11:04:52 -06:00
parent cf5606cc19
commit b1107c0e34
3 changed files with 15 additions and 1 deletions
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11
drivers/clk/sunxi/clk_d1.c
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@ -6,7 +6,7 @@
#include <common.h>
#include <clk-uclass.h>
#include <dm.h>
#include <errno.h>
#include <asm/io.h>
#include <clk/sunxi.h>
#include <dt-bindings/clock/sun20i-d1-ccu.h>
#include <dt-bindings/reset/sun20i-d1-ccu.h>
@ -76,9 +76,18 @@ static struct ccu_reset d1_resets[] = {
[RST_BUS_LRADC] = RESET(0xa9c, BIT(16)),
};
static void d1_ccu_init(struct udevice *dev)
{
struct ccu_plat *plat = dev_get_plat(dev);
/* Set PLL_CPUX to 1008 MHz. */
clrsetbits_le32(plat->base + 0x000, 0xff << 8, 0x29 << 8);
}
const struct ccu_desc d1_ccu_desc = {
.gates = d1_gates,
.resets = d1_resets,
.num_gates = ARRAY_SIZE(d1_gates),
.num_resets = ARRAY_SIZE(d1_resets),
.init = d1_ccu_init,
};

4
drivers/clk/sunxi/clk_sunxi.c
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@ -79,6 +79,7 @@ static int sunxi_clk_bind(struct udevice *dev)
static int sunxi_clk_probe(struct udevice *dev)
{
struct ccu_plat *plat = dev_get_plat(dev);
struct clk_bulk clk_bulk;
struct reset_ctl_bulk rst_bulk;
int ret;
@ -91,6 +92,9 @@ static int sunxi_clk_probe(struct udevice *dev)
if (!ret)
reset_deassert_bulk(&rst_bulk);
if (IS_ENABLED(CONFIG_SPL_BUILD) && plat->desc->init)
plat->desc->init(dev);
return 0;
}

1
include/clk/sunxi.h
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@ -72,6 +72,7 @@ struct ccu_desc {
const struct ccu_reset *resets;
u8 num_gates;
u8 num_resets;
void (*init)(struct udevice *dev);
};
/**