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lpc32xx: Kconfig: switch to CONFIG_CONS_INDEX

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There's nothing special or unique to the lpc32xx that requires its own config
parameter for specifying the console uart index. Therefore instead of using
the lpc32xx-specific CONFIG_SYS_LPC32XX_UART include parameter, use the
already-available CONFIG_CONS_INDEX from Kconfig.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Trevor Woerner 2021-06-10 22:37:02 -04:00 committed by Tom Rini
parent 3a37386f18
commit bd4dbf9e43
11 changed files with 11 additions and 19 deletions
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4
arch/arm/include/asm/arch-lpc32xx/config.h
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@ -12,8 +12,8 @@
/* Basic CPU architecture */ /* Basic CPU architecture */
/* UART configuration */ /* UART configuration */
#if (CONFIG_SYS_LPC32XX_UART == 1) || (CONFIG_SYS_LPC32XX_UART == 2) || \ #if (CONFIG_CONS_INDEX == 1) || (CONFIG_CONS_INDEX == 2) || \
(CONFIG_SYS_LPC32XX_UART == 7) (CONFIG_CONS_INDEX == 7)
#if !defined(CONFIG_LPC32XX_HSUART) #if !defined(CONFIG_LPC32XX_HSUART)
#define CONFIG_LPC32XX_HSUART #define CONFIG_LPC32XX_HSUART
#endif #endif

3
arch/arm/mach-lpc32xx/devices.c
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@ -23,8 +23,7 @@ void lpc32xx_uart_init(unsigned int uart_id)
return; return;
/* Disable loopback mode, if it is set by S1L bootloader */ /* Disable loopback mode, if it is set by S1L bootloader */
clrbits_le32(&ctrl->loop, clrbits_le32(&ctrl->loop, UART_LOOPBACK(uart_id));
UART_LOOPBACK(CONFIG_SYS_LPC32XX_UART));
if (uart_id < 3 || uart_id > 6) if (uart_id < 3 || uart_id > 6)
return; return;

2
board/timll/devkit3250/devkit3250.c
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@ -38,7 +38,7 @@ void reset_periph(void)
int board_early_init_f(void) int board_early_init_f(void)
{ {
lpc32xx_uart_init(CONFIG_SYS_LPC32XX_UART); lpc32xx_uart_init(CONFIG_CONS_INDEX);
lpc32xx_i2c_init(1); lpc32xx_i2c_init(1);
lpc32xx_i2c_init(2); lpc32xx_i2c_init(2);
lpc32xx_ssp_init(); lpc32xx_ssp_init();

2
board/timll/devkit3250/devkit3250_spl.c
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@ -49,7 +49,7 @@ void spl_board_init(void)
/* First of all silence buzzer controlled by GPO_20 */ /* First of all silence buzzer controlled by GPO_20 */
writel((1 << 20), &gpio->p3_outp_clr); writel((1 << 20), &gpio->p3_outp_clr);
lpc32xx_uart_init(CONFIG_SYS_LPC32XX_UART); lpc32xx_uart_init(CONFIG_CONS_INDEX);
preloader_console_init(); preloader_console_init();
ddr_init(&dram_64mb); ddr_init(&dram_64mb);

2
board/work-microwave/work_92105/work_92105.c
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@ -37,7 +37,7 @@ void reset_periph(void)
int board_early_init_f(void) int board_early_init_f(void)
{ {
/* initialize serial port for console */ /* initialize serial port for console */
lpc32xx_uart_init(CONFIG_SYS_LPC32XX_UART); lpc32xx_uart_init(CONFIG_CONS_INDEX);
/* enable I2C, SSP, MAC, NAND */ /* enable I2C, SSP, MAC, NAND */
lpc32xx_i2c_init(1); /* only I2C1 has devices, I2C2 has none */ lpc32xx_i2c_init(1); /* only I2C1 has devices, I2C2 has none */
lpc32xx_ssp_init(); lpc32xx_ssp_init();

2
board/work-microwave/work_92105/work_92105_spl.c
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@ -58,7 +58,7 @@ const struct emc_dram_settings dram_128mb = {
void spl_board_init(void) void spl_board_init(void)
{ {
/* initialize serial port for console */ /* initialize serial port for console */
lpc32xx_uart_init(CONFIG_SYS_LPC32XX_UART); lpc32xx_uart_init(CONFIG_CONS_INDEX);
/* initialize console */ /* initialize console */
preloader_console_init(); preloader_console_init();
/* init DDR and NAND to chainload U-Boot */ /* init DDR and NAND to chainload U-Boot */

2
configs/devkit3250_defconfig
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@ -51,6 +51,8 @@ CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_ADDR=31 CONFIG_PHY_ADDR=31
CONFIG_PHY_SMSC=y CONFIG_PHY_SMSC=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_CONS_INDEX=5
CONFIG_SYS_NS16550=y CONFIG_SYS_NS16550=y
CONFIG_SPI=y CONFIG_SPI=y
CONFIG_USB=y CONFIG_USB=y

2
configs/work_92105_defconfig
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@ -48,5 +48,7 @@ CONFIG_MTD_RAW_NAND=y
CONFIG_PHYLIB=y CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_SMSC=y CONFIG_PHY_SMSC=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_CONS_INDEX=5
CONFIG_SYS_NS16550=y CONFIG_SYS_NS16550=y
CONFIG_SPI=y CONFIG_SPI=y

5
include/configs/devkit3250.h
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@ -30,11 +30,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \
- GENERATED_GBL_DATA_SIZE) - GENERATED_GBL_DATA_SIZE)
/*
* Serial Driver
*/
#define CONFIG_SYS_LPC32XX_UART 5 /* UART5 */
/* /*
* DMA * DMA
*/ */

5
include/configs/work_92105.h
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@ -35,11 +35,6 @@
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_512K \ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_512K \
- GENERATED_GBL_DATA_SIZE) - GENERATED_GBL_DATA_SIZE)
/*
* Serial Driver
*/
#define CONFIG_SYS_LPC32XX_UART 5 /* UART5 - NS16550 */
/* /*
* Ethernet Driver * Ethernet Driver
*/ */

1
scripts/config_whitelist.txt
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@ -2734,7 +2734,6 @@ CONFIG_SYS_LOW
CONFIG_SYS_LOWMEM_BASE CONFIG_SYS_LOWMEM_BASE
CONFIG_SYS_LOW_RES_TIMER CONFIG_SYS_LOW_RES_TIMER
CONFIG_SYS_LPAE_SDRAM_BASE CONFIG_SYS_LPAE_SDRAM_BASE
CONFIG_SYS_LPC32XX_UART
CONFIG_SYS_LS1_DDR_BLOCK1_SIZE CONFIG_SYS_LS1_DDR_BLOCK1_SIZE
CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH
CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS