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	powerpc: cpm2 boards: update fcc register logic
In the recent dropping of !NET_MULTI code (commit e2a53458a7ab37523304), I misread the logic in include/net.h. Some of it was used by NET_MULTI code as glue between the multi/non-multi worlds for cpm2 boards. Rather than restore the block of code, push the logic to the board config headers where it all belongs. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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				@ -89,8 +89,8 @@
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 * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
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 * - Enable Full Duplex in FSMR
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 */
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# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF1CS_CLK11|CMXFCR_TF1CS_CLK12)
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# define CONFIG_SYS_CMXFCR_MASK1	(CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE1	(CMXFCR_RF1CS_CLK11|CMXFCR_TF1CS_CLK12)
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# define CONFIG_SYS_CPMFCR_RAMTYPE	0
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# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE|FCC_PSMR_LPB)
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@ -102,8 +102,8 @@
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 * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
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 * - Enable Full Duplex in FSMR
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 */
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# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
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# define CONFIG_SYS_CMXFCR_MASK2	(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
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# define CONFIG_SYS_CPMFCR_RAMTYPE	0
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# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE|FCC_PSMR_LPB)
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@ -93,8 +93,8 @@
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 * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
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 * - Enable Full Duplex in FSMR
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 */
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# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF1CS_CLK11|CMXFCR_TF1CS_CLK12)
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# define CONFIG_SYS_CMXFCR_MASK1	(CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE1	(CMXFCR_RF1CS_CLK11|CMXFCR_TF1CS_CLK12)
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# define CONFIG_SYS_CPMFCR_RAMTYPE	0
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# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE|FCC_PSMR_LPB)
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@ -106,8 +106,8 @@
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 * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
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 * - Enable Full Duplex in FSMR
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 */
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# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
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# define CONFIG_SYS_CMXFCR_MASK2	(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
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# define CONFIG_SYS_CPMFCR_RAMTYPE	0
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# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE|FCC_PSMR_LPB)
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@ -154,8 +154,8 @@
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 * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
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 * - Enable Full Duplex in FSMR
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 */
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# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK9)
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# define CONFIG_SYS_CMXFCR_MASK1	(CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE1	(CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK9)
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# define CONFIG_SYS_CPMFCR_RAMTYPE	0
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# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE|FCC_PSMR_LPB)
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@ -82,8 +82,8 @@
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 * - Select bus for bd/buffers (see 28-13)
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 * - Half duplex
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 */
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# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC3 | CMXFCR_RF3CS_MSK | CMXFCR_TF3CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF3CS_CLK14 | CMXFCR_TF3CS_CLK16)
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# define CONFIG_SYS_CMXFCR_MASK3	(CMXFCR_FC3 | CMXFCR_RF3CS_MSK | CMXFCR_TF3CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE3	(CMXFCR_RF3CS_CLK14 | CMXFCR_TF3CS_CLK16)
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# define CONFIG_SYS_CPMFCR_RAMTYPE	0
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# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE|FCC_PSMR_LPB)
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@ -72,8 +72,8 @@
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#if CONFIG_ETHER_INDEX == 3
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#define CONFIG_SYS_PHY_ADDR		0
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#define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF3CS_CLK14 | CMXFCR_TF3CS_CLK16)
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#define CONFIG_SYS_CMXFCR_MASK		(CMXFCR_FC3 | CMXFCR_RF3CS_MSK | CMXFCR_TF3CS_MSK)
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#define CONFIG_SYS_CMXFCR_VALUE3	(CMXFCR_RF3CS_CLK14 | CMXFCR_TF3CS_CLK16)
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#define CONFIG_SYS_CMXFCR_MASK3		(CMXFCR_FC3 | CMXFCR_RF3CS_MSK | CMXFCR_TF3CS_MSK)
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#endif /* CONFIG_ETHER_INDEX == 3 */
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@ -128,20 +128,20 @@
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#if   CONFIG_ETHER_INDEX == 1
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# define CONFIG_SYS_PHY_ADDR		0
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# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF1CS_CLK11 | CMXFCR_TF1CS_CLK10)
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# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE1	(CMXFCR_RF1CS_CLK11 | CMXFCR_TF1CS_CLK10)
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# define CONFIG_SYS_CMXFCR_MASK1	(CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK)
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#elif CONFIG_ETHER_INDEX == 2
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#if CONFIG_ADSTYPE == CONFIG_SYS_8272ADS	/* RxCLK is CLK15, TxCLK is CLK16 */
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# define CONFIG_SYS_PHY_ADDR		3
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# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK15 | CMXFCR_TF2CS_CLK16)
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# define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK15 | CMXFCR_TF2CS_CLK16)
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#else					/* RxCLK is CLK13, TxCLK is CLK14 */
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# define CONFIG_SYS_PHY_ADDR		0
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# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
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# define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
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#endif /* CONFIG_ADSTYPE == CONFIG_SYS_8272ADS */
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# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
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# define CONFIG_SYS_CMXFCR_MASK2	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
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#endif	/* CONFIG_ETHER_INDEX */
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@ -122,8 +122,8 @@
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 * - Select bus for bd/buffers (see 28-13)
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 * - Half duplex
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 */
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# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
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# define CONFIG_SYS_CMXFCR_MASK2	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
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# define CONFIG_SYS_CPMFCR_RAMTYPE	0
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# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)
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@ -333,8 +333,8 @@
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   * - Select bus for bd/buffers
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   * - Full duplex
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   */
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  #define CONFIG_SYS_CMXFCR_MASK       (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
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  #define CONFIG_SYS_CMXFCR_VALUE      (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
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  #define CONFIG_SYS_CMXFCR_MASK2      (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
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  #define CONFIG_SYS_CMXFCR_VALUE2     (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
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  #define CONFIG_SYS_CPMFCR_RAMTYPE    0
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  #define CONFIG_SYS_FCC_PSMR          (FCC_PSMR_FDE)
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  #define FETH2_RST		0x01
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@ -107,8 +107,8 @@
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 * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
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 * - Enable Half Duplex in FSMR
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 */
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# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
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# define CONFIG_SYS_CMXFCR_MASK3	(CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE3	(CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
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# define CONFIG_SYS_CPMFCR_RAMTYPE	0
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/*#define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE|FCC_PSMR_LPB) */
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# define CONFIG_SYS_FCC_PSMR		0
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@ -80,8 +80,8 @@
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 * - BDs/buffers on 60x bus
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 * - Full duplex
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 */
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#define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK)
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#define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF1CS_CLK11 | CMXFCR_TF1CS_CLK10)
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#define CONFIG_SYS_CMXFCR_MASK1		(CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK)
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#define CONFIG_SYS_CMXFCR_VALUE1	(CMXFCR_RF1CS_CLK11 | CMXFCR_TF1CS_CLK10)
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#define CONFIG_SYS_CPMFCR_RAMTYPE	0
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#define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)
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@ -92,8 +92,8 @@
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 * - BDs/buffers on 60x bus
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 * - Full duplex
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 */
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#define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
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#define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK15 | CMXFCR_TF2CS_CLK14)
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#define CONFIG_SYS_CMXFCR_MASK2		(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
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#define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK15 | CMXFCR_TF2CS_CLK14)
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#define CONFIG_SYS_CPMFCR_RAMTYPE	0
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#define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)
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@ -260,8 +260,8 @@
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     * - Select bus for bd/buffers
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     * - Full duplex
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     */
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    #define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
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    #define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
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    #define CONFIG_SYS_CMXFCR_MASK2	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
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    #define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
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    #define CONFIG_SYS_CPMFCR_RAMTYPE	0
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    #define CONFIG_SYS_FCC_PSMR	(FCC_PSMR_FDE)
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@ -153,8 +153,8 @@
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 * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
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 * - Enable Full Duplex in FSMR
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 */
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# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF1CS_CLK12|CMXFCR_TF1CS_CLK11)
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# define CONFIG_SYS_CMXFCR_MASK1	(CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE1	(CMXFCR_RF1CS_CLK12|CMXFCR_TF1CS_CLK11)
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# define CONFIG_SYS_CPMFCR_RAMTYPE	0
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# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE|FCC_PSMR_LPB)
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@ -166,8 +166,8 @@
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 * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
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 * - Enable Full Duplex in FSMR
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 */
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# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
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# define CONFIG_SYS_CMXFCR_MASK3	(CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE3	(CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
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# define CONFIG_SYS_CPMFCR_RAMTYPE	0
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# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE|FCC_PSMR_LPB)
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@ -181,7 +181,7 @@
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 *  - RX clk is CLK11
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 *  - TX clk is CLK12
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 */
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# define CONFIG_SYS_CMXSCR_VALUE	(CMXSCR_RS1CS_CLK11 | CMXSCR_TS1CS_CLK12)
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# define CONFIG_SYS_CMXSCR_VALUE1	(CMXSCR_RS1CS_CLK11 | CMXSCR_TS1CS_CLK12)
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#elif defined(CONFIG_ETHER_ON_FCC) && (CONFIG_ETHER_INDEX == 2)
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@ -191,8 +191,8 @@
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 * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
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 * - Enable Full Duplex in FSMR
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 */
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# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
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# define CONFIG_SYS_CMXFCR_MASK2	(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
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# define CONFIG_SYS_CPMFCR_RAMTYPE	0
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# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE|FCC_PSMR_LPB)
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@ -208,8 +208,8 @@
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 * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
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 * - Enable Full Duplex in FSMR
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 */
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# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
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# define CONFIG_SYS_CMXFCR_MASK2	(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
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# define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
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# define CONFIG_SYS_CPMFCR_RAMTYPE	0
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# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE|FCC_PSMR_LPB)
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@ -76,8 +76,8 @@
 | 
			
		||||
 * - Select bus for bd/buffers (see 28-13)
 | 
			
		||||
 * - Full duplex
 | 
			
		||||
 */
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK2	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
 | 
			
		||||
# define CONFIG_SYS_CPMFCR_RAMTYPE	0
 | 
			
		||||
# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)
 | 
			
		||||
 | 
			
		||||
 | 
			
		||||
@ -200,8 +200,8 @@
 | 
			
		||||
 * - RAM for BD/Buffers is on the local Bus (see 28-13)
 | 
			
		||||
 * - Enable Half Duplex in FSMR
 | 
			
		||||
 */
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK3	(CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE3	(CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
 | 
			
		||||
 | 
			
		||||
/*
 | 
			
		||||
 * - RAM for BD/Buffers is on the local Bus (see 28-13)
 | 
			
		||||
 | 
			
		||||
@ -240,8 +240,8 @@
 | 
			
		||||
 * - Select bus for bd/buffers (see 28-13)
 | 
			
		||||
 * - Enable Full Duplex in FSMR
 | 
			
		||||
 */
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK2	(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
 | 
			
		||||
# define CONFIG_SYS_CPMFCR_RAMTYPE	0
 | 
			
		||||
# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)
 | 
			
		||||
 | 
			
		||||
@ -253,8 +253,8 @@
 | 
			
		||||
 * - Select bus for bd/buffers (see 28-13)
 | 
			
		||||
 * - Enable Full Duplex in FSMR
 | 
			
		||||
 */
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK3	(CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE3	(CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
 | 
			
		||||
# define CONFIG_SYS_CPMFCR_RAMTYPE	0
 | 
			
		||||
# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)
 | 
			
		||||
 | 
			
		||||
 | 
			
		||||
@ -89,8 +89,8 @@
 | 
			
		||||
 * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
 | 
			
		||||
 * - Enable Full Duplex in FSMR
 | 
			
		||||
 */
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK11)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK1	(CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE1	(CMXFCR_RF1CS_CLK10|CMXFCR_TF1CS_CLK11)
 | 
			
		||||
# define CONFIG_SYS_CPMFCR_RAMTYPE	0
 | 
			
		||||
# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE|FCC_PSMR_LPB)
 | 
			
		||||
 | 
			
		||||
@ -110,8 +110,8 @@
 | 
			
		||||
 * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
 | 
			
		||||
 * - Enable Full Duplex in FSMR
 | 
			
		||||
 */
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK2	(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
 | 
			
		||||
# define CONFIG_SYS_CPMFCR_RAMTYPE	0
 | 
			
		||||
# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE|FCC_PSMR_LPB)
 | 
			
		||||
 | 
			
		||||
@ -131,8 +131,8 @@
 | 
			
		||||
 * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
 | 
			
		||||
 * - Enable Full Duplex in FSMR
 | 
			
		||||
 */
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK3	(CMXFCR_FC3|CMXFCR_RF3CS_MSK|CMXFCR_TF3CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE3	(CMXFCR_RF3CS_CLK15|CMXFCR_TF3CS_CLK16)
 | 
			
		||||
# define CONFIG_SYS_CPMFCR_RAMTYPE	0
 | 
			
		||||
# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE|FCC_PSMR_LPB)
 | 
			
		||||
 | 
			
		||||
 | 
			
		||||
@ -83,8 +83,8 @@
 | 
			
		||||
 * - Rx-CLK is CLK11
 | 
			
		||||
 * - Tx-CLK is CLK12
 | 
			
		||||
 */
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF1CS_CLK11 | CMXFCR_TF1CS_CLK12)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE1	(CMXFCR_RF1CS_CLK11 | CMXFCR_TF1CS_CLK12)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK1	(CMXFCR_FC1 | CMXFCR_RF1CS_MSK | CMXFCR_TF1CS_MSK)
 | 
			
		||||
/*
 | 
			
		||||
 * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
 | 
			
		||||
 */
 | 
			
		||||
 | 
			
		||||
@ -372,8 +372,8 @@
 | 
			
		||||
 * - Select bus for bd/buffers (see 28-13)
 | 
			
		||||
 * - Enable Full Duplex in FSMR
 | 
			
		||||
 */
 | 
			
		||||
#define CONFIG_SYS_CMXFCR_MASK		(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
 | 
			
		||||
#define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
 | 
			
		||||
#define CONFIG_SYS_CMXFCR_MASK2		(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
 | 
			
		||||
#define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
 | 
			
		||||
#define CONFIG_SYS_CPMFCR_RAMTYPE	0
 | 
			
		||||
#define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)
 | 
			
		||||
#endif	/* CONFIG_ETHER_INDEX */
 | 
			
		||||
 | 
			
		||||
@ -82,8 +82,8 @@
 | 
			
		||||
 * - Select bus for bd/buffers (see 28-13)
 | 
			
		||||
 * - Enable Full Duplex in FSMR
 | 
			
		||||
 */
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK2	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
 | 
			
		||||
# define CONFIG_SYS_CPMFCR_RAMTYPE	(0)
 | 
			
		||||
# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)
 | 
			
		||||
 | 
			
		||||
 | 
			
		||||
@ -203,7 +203,7 @@
 | 
			
		||||
 *  - RX clk is CLK11
 | 
			
		||||
 *  - TX clk is CLK12
 | 
			
		||||
 */
 | 
			
		||||
# define CONFIG_SYS_CMXSCR_VALUE	(CMXSCR_RS1CS_CLK11  | CMXSCR_TS1CS_CLK12)
 | 
			
		||||
# define CONFIG_SYS_CMXSCR_VALUE1	(CMXSCR_RS1CS_CLK11  | CMXSCR_TS1CS_CLK12)
 | 
			
		||||
 | 
			
		||||
#elif defined(CONFIG_ETHER_ON_FCC) && (CONFIG_ETHER_INDEX == 2)
 | 
			
		||||
 | 
			
		||||
@ -213,8 +213,8 @@
 | 
			
		||||
 * - Select bus for bd/buffers (see 28-13)
 | 
			
		||||
 * - Enable Full Duplex in FSMR
 | 
			
		||||
 */
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_MASK2	(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
 | 
			
		||||
# define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
 | 
			
		||||
# define CONFIG_SYS_CPMFCR_RAMTYPE	0
 | 
			
		||||
# define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE | FCC_PSMR_LPB)
 | 
			
		||||
 | 
			
		||||
 | 
			
		||||
@ -260,8 +260,8 @@
 | 
			
		||||
     * - Select bus for bd/buffers
 | 
			
		||||
     * - Full duplex
 | 
			
		||||
     */
 | 
			
		||||
    #define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
 | 
			
		||||
    #define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
 | 
			
		||||
    #define CONFIG_SYS_CMXFCR_MASK2	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
 | 
			
		||||
    #define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
 | 
			
		||||
    #define CONFIG_SYS_CPMFCR_RAMTYPE	0
 | 
			
		||||
    #define CONFIG_SYS_FCC_PSMR	(FCC_PSMR_FDE)
 | 
			
		||||
 | 
			
		||||
 | 
			
		||||
@ -255,8 +255,8 @@
 | 
			
		||||
   * - Select bus for bd/buffers
 | 
			
		||||
   * - Full duplex
 | 
			
		||||
   */
 | 
			
		||||
  #define CONFIG_SYS_CMXFCR_MASK       (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
 | 
			
		||||
  #define CONFIG_SYS_CMXFCR_VALUE      (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
 | 
			
		||||
  #define CONFIG_SYS_CMXFCR_MASK2      (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
 | 
			
		||||
  #define CONFIG_SYS_CMXFCR_VALUE2     (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
 | 
			
		||||
  #define CONFIG_SYS_CPMFCR_RAMTYPE    0
 | 
			
		||||
#if 0
 | 
			
		||||
  #define CONFIG_SYS_FCC_PSMR          (FCC_PSMR_FDE)
 | 
			
		||||
 | 
			
		||||
@ -285,8 +285,8 @@
 | 
			
		||||
   * - Select bus for bd/buffers
 | 
			
		||||
   * - Full duplex
 | 
			
		||||
   */
 | 
			
		||||
  #define CONFIG_SYS_CMXFCR_MASK	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
 | 
			
		||||
  #define CONFIG_SYS_CMXFCR_VALUE	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
 | 
			
		||||
  #define CONFIG_SYS_CMXFCR_MASK2	(CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
 | 
			
		||||
  #define CONFIG_SYS_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
 | 
			
		||||
  #define CONFIG_SYS_CPMFCR_RAMTYPE	0
 | 
			
		||||
#if 0
 | 
			
		||||
  #define CONFIG_SYS_FCC_PSMR		(FCC_PSMR_FDE)
 | 
			
		||||
 | 
			
		||||
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