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	ARM: uniphier: unify low-level debug init code
Move init code of low-level debug into a single file. This is helpful to create an image that runs on multiple SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
		
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				@ -10,6 +10,8 @@ obj-y += spl.o
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obj-y += memconf.o
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obj-y += ddrphy_training.o
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obj-$(CONFIG_DEBUG_LL) += debug_ll.o
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else
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obj-y += late_lowlevel_init.o
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										112
									
								
								arch/arm/mach-uniphier/debug_ll.S
									
									
									
									
									
										Normal file
									
								
							
							
						
						
									
										112
									
								
								arch/arm/mach-uniphier/debug_ll.S
									
									
									
									
									
										Normal file
									
								
							@ -0,0 +1,112 @@
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/*
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 * On-chip UART initializaion for low-level debugging
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 *
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 * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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 *
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 * SPDX-License-Identifier:	GPL-2.0+
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 */
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#include <linux/serial_reg.h>
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#include <linux/linkage.h>
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#include <mach/bcu-regs.h>
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#include <mach/sc-regs.h>
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#include <mach/sg-regs.h>
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#if !defined(CONFIG_DEBUG_SEMIHOSTING)
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#include CONFIG_DEBUG_LL_INCLUDE
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#endif
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#define BAUDRATE		115200
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#define DIV_ROUND(x, d)		(((x) + ((d) / 2)) / (d))
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ENTRY(debug_ll_init)
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	ldr		r0, =SG_REVISION
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	ldr		r1, [r0]
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	and		r1, r1, #SG_REVISION_TYPE_MASK
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	mov		r1, r1, lsr #SG_REVISION_TYPE_SHIFT
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#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3)
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#define PH1_SLD3_UART_CLK		36864000
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	cmp		r1, #0x25
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	bne		ph1_sld3_end
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	sg_set_pinsel	64, 1, 4, 4, r0, r1	@ TXD0 -> TXD0
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	ldr		r0, =BCSCR5
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	ldr		r1, =0x24440000
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	str		r1, [r0]
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	ldr		r0, =SC_CLKCTRL
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	ldr		r1, [r0]
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	orr		r1, r1, #SC_CLKCTRL_CEN_PERI
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	str		r1, [r0]
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	ldr		r3, =DIV_ROUND(PH1_SLD3_UART_CLK, 16 * BAUDRATE)
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	b		init_uart
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ph1_sld3_end:
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4)
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#define PH1_LD4_UART_CLK		36864000
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	cmp		r1, #0x26
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	bne		ph1_ld4_end
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	ldr		r0, =SG_IECTRL
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	ldr		r1, [r0]
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	orr		r1, r1, #1
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	str		r1, [r0]
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	sg_set_pinsel	88, 1, 8, 4, r0, r1	@ HSDOUT6 -> TXD0
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	ldr		r3, =DIV_ROUND(PH1_LD4_UART_CLK, 16 * BAUDRATE)
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	b		init_uart
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ph1_ld4_end:
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
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#define PH1_PRO4_UART_CLK		73728000
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	cmp		r1, #0x28
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	bne		ph1_pro4_end
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	sg_set_pinsel	128, 0, 4, 8, r0, r1	@ TXD0 -> TXD0
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	ldr		r0, =SG_LOADPINCTRL
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	mov		r1, #1
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	str		r1, [r0]
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	ldr		r0, =SC_CLKCTRL
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	ldr		r1, [r0]
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	orr		r1, r1, #SC_CLKCTRL_CEN_PERI
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	str		r1, [r0]
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	ldr		r3, =DIV_ROUND(PH1_PRO4_UART_CLK, 16 * BAUDRATE)
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	b		init_uart
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ph1_pro4_end:
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
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#define PH1_SLD8_UART_CLK		80000000
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	cmp		r1, #0x29
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	bne		ph1_sld8_end
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	ldr		r0, =SG_IECTRL
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	ldr		r1, [r0]
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	orr		r1, r1, #1
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	str		r1, [r0]
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	sg_set_pinsel	70, 3, 8, 4, r0, r1	@ HSDOUT0 -> TXD0
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	ldr		r3, =DIV_ROUND(PH1_SLD8_UART_CLK, 16 * BAUDRATE)
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	b		init_uart
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ph1_sld8_end:
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#endif
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init_uart:
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	addruart	r0, r1, r2
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	mov		r1, #UART_LCR_WLEN8 << 8
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	str		r1, [r0, #0x10]
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	str		r3, [r0, #0x24]
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	mov		pc, lr
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ENDPROC(debug_ll_init)
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@ -1,23 +0,0 @@
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/*
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 * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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 *
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 * SPDX-License-Identifier:	GPL-2.0+
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 */
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#include <linux/serial_reg.h>
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#if !defined(CONFIG_DEBUG_SEMIHOSTING)
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#include CONFIG_DEBUG_LL_INCLUDE
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#endif
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#define BAUDRATE		115200
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#define DIV_ROUND(x, d)		(((x) + ((d) / 2)) / (d))
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#define DIVISOR			DIV_ROUND(UART_CLK, 16 * BAUDRATE)
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	.macro		init_debug_uart, ra, rb, rc
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	addruart	\ra, \rb, \rc
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	mov		\rb, #UART_LCR_WLEN8 << 8
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	str		\rb, [\ra, #0x10]
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	ldr		\rb, =DIVISOR
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	str		\rb, [\ra, #0x24]
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	.endm
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@ -27,7 +27,7 @@ ENTRY(lowlevel_init)
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	mcr	p15, 0, r0, c1, c0, 0
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#ifdef CONFIG_DEBUG_LL
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	bl	setup_lowlevel_debug
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	bl	debug_ll_init
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#endif
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	/*
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@ -3,7 +3,6 @@
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#
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ifdef CONFIG_SPL_BUILD
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obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o
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obj-y += bcu_init.o pll_init.o early_clkrst_init.o \
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	pll_spectrum.o umc_init.o ddrphy_init.o
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obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o
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@ -1,29 +0,0 @@
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/*
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 * On-chip UART initializaion for low-level debugging
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 *
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 * Copyright (C) 2014 Panasonic Corporation
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 *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
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 *
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 * SPDX-License-Identifier:	GPL-2.0+
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 */
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#include <linux/linkage.h>
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#include <mach/sg-regs.h>
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#define UART_CLK		36864000
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#include <mach/debug-uart.S>
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ENTRY(setup_lowlevel_debug)
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		ldr		r0, =SG_IECTRL
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		ldr		r1, [r0]
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		orr		r1, r1, #1
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		str		r1, [r0]
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		/* UART Port 0 */
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		sg_set_pinsel	85, 1, 8, 4, r0, r1
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		sg_set_pinsel	88, 1, 8, 4, r0, r1
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		init_debug_uart	r0, r1, r2
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		mov		pc, lr
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ENDPROC(setup_lowlevel_debug)
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@ -3,7 +3,6 @@
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#
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ifdef CONFIG_SPL_BUILD
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obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o
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obj-y += pll_init.o early_clkrst_init.o \
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	pll_spectrum.o umc_init.o ddrphy_init.o
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obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o
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@ -1,34 +0,0 @@
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/*
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 * On-chip UART initializaion for low-level debugging
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 *
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 * Copyright (C) 2014 Panasonic Corporation
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 *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
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 *
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 * SPDX-License-Identifier:	GPL-2.0+
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 */
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#include <linux/linkage.h>
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#include <mach/sc-regs.h>
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#include <mach/sg-regs.h>
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#define UART_CLK		73728000
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#include <mach/debug-uart.S>
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ENTRY(setup_lowlevel_debug)
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		/* UART Port 0 */
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		sg_set_pinsel	127, 0, 4, 8, r0, r1
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		sg_set_pinsel	128, 0, 4, 8, r0, r1
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		ldr		r0, =SG_LOADPINCTRL
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		mov		r1, #1
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		str		r1, [r0]
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		ldr		r0, =SC_CLKCTRL
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		ldr		r1, [r0]
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		orr		r1, r1, #SC_CLKCTRL_CEN_PERI
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		str		r1, [r0]
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		init_debug_uart	r0, r1, r2
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		mov		pc, lr
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ENDPROC(setup_lowlevel_debug)
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@ -3,7 +3,6 @@
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#
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ifdef CONFIG_SPL_BUILD
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obj-$(CONFIG_DEBUG_LL) += lowlevel_debug.o
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obj-y += bcu_init.o memconf.o sg_init.o pll_init.o early_clkrst_init.o \
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	early_pinctrl.o pll_spectrum.o umc_init.o
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obj-$(CONFIG_MICRO_SUPPORT_CARD) += sbc_init.o
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@ -1,33 +0,0 @@
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/*
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 * On-chip UART initializaion for low-level debugging
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 *
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 * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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 *
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 * SPDX-License-Identifier:	GPL-2.0+
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 */
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#include <linux/linkage.h>
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#include <mach/bcu-regs.h>
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#include <mach/sc-regs.h>
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#include <mach/sg-regs.h>
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#define UART_CLK		36864000
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#include <mach/debug-uart.S>
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ENTRY(setup_lowlevel_debug)
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		sg_set_pinsel	63, 0, 4, 4, r0, r1
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		sg_set_pinsel	64, 1, 4, 4, r0, r1
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		ldr		r0, =BCSCR5
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		ldr		r1, =0x24440000
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		str		r1, [r0]
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		ldr		r0, =SC_CLKCTRL
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		ldr		r1, [r0]
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		orr		r1, r1, #SC_CLKCTRL_CEN_PERI
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		str		r1, [r0]
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		init_debug_uart	r0, r1, r2
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		mov		pc, lr
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ENDPROC(setup_lowlevel_debug)
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@ -1,29 +0,0 @@
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/*
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 * On-chip UART initializaion for low-level debugging
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 *
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 * Copyright (C) 2014 Panasonic Corporation
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 *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
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 *
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 * SPDX-License-Identifier:	GPL-2.0+
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 */
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#include <linux/linkage.h>
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#include <mach/sg-regs.h>
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#define UART_CLK		80000000
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#include <mach/debug-uart.S>
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ENTRY(setup_lowlevel_debug)
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		ldr		r0, =SG_IECTRL
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		ldr		r1, [r0]
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		orr		r1, r1, #1
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		str		r1, [r0]
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		/* UART Port 0 */
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		sg_set_pinsel	70, 3, 8, 4, r0, r1
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		sg_set_pinsel	71, 3, 8, 4, r0, r1
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		init_debug_uart	r0, r1, r2
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		mov		pc, lr
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ENDPROC(setup_lowlevel_debug)
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