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arm64: Save esr in pt_regs

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To avoid passing around an extra register everywhere, save esr in
pt_regs like the rest. For proper alignment we need to have a second
(unused) register. All the printfs have to be adjusted, since
it's now an unsigned long and not an int.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
This commit is contained in:
Sean Anderson 2022-03-22 17:17:35 -04:00 committed by Tom Rini
parent 93c3d32970
commit e97ac4780d
5 changed files with 26 additions and 26 deletions
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6
arch/arm/cpu/armv8/exceptions.S
View File

@ -84,7 +84,8 @@ _save_el_regs:
1: mrs x1, esr_el1 1: mrs x1, esr_el1
mrs x2, elr_el1 mrs x2, elr_el1
0: 0:
stp x2, x0, [sp, #-16]! stp x1, x0, [sp, #-16]!
stp xzr, x2, [sp, #-16]!
mov x0, sp mov x0, sp
ret ret
@ -98,7 +99,7 @@ _save_el_regs:
* This is the first part of the shared routine called into from all entries. * This is the first part of the shared routine called into from all entries.
*/ */
exception_exit: exception_exit:
ldp x2, x0, [sp],#16 ldp xzr, x2, [sp],#16
switch_el x11, 3f, 2f, 1f switch_el x11, 3f, 2f, 1f
3: msr elr_el3, x2 3: msr elr_el3, x2
b _restore_regs b _restore_regs
@ -118,6 +119,7 @@ exception_exit:
* This is the second part of the shared routine called into from all entries. * This is the second part of the shared routine called into from all entries.
*/ */
_restore_regs: _restore_regs:
ldp xzr, x0, [sp],#16
ldp x1, x2, [sp],#16 ldp x1, x2, [sp],#16
ldp x3, x4, [sp],#16 ldp x3, x4, [sp],#16
ldp x5, x6, [sp],#16 ldp x5, x6, [sp],#16

2
arch/arm/include/asm/proc-armv/ptrace.h
View File

@ -21,7 +21,9 @@
* on the stack during an exception. * on the stack during an exception.
*/ */
struct pt_regs { struct pt_regs {
unsigned long unused;
unsigned long elr; unsigned long elr;
unsigned long esr;
unsigned long regs[31]; unsigned long regs[31];
}; };

7
arch/arm/include/asm/u-boot-arm.h
View File

@ -46,13 +46,8 @@ void do_software_interrupt(struct pt_regs *pt_regs);
void do_prefetch_abort(struct pt_regs *pt_regs); void do_prefetch_abort(struct pt_regs *pt_regs);
void do_data_abort(struct pt_regs *pt_regs); void do_data_abort(struct pt_regs *pt_regs);
void do_not_used(struct pt_regs *pt_regs); void do_not_used(struct pt_regs *pt_regs);
#ifdef CONFIG_ARM64
void do_fiq(struct pt_regs *pt_regs, unsigned int esr);
void do_irq(struct pt_regs *pt_regs, unsigned int esr);
#else
void do_fiq(struct pt_regs *pt_regs); void do_fiq(struct pt_regs *pt_regs);
void do_irq(struct pt_regs *pt_regswq); void do_irq(struct pt_regs *pt_regs);
#endif
void reset_misc(void); void reset_misc(void);

33
arch/arm/lib/interrupts_64.c
View File

@ -66,10 +66,11 @@ void show_regs(struct pt_regs *regs)
/* /*
* do_bad_sync handles the impossible case in the Synchronous Abort vector. * do_bad_sync handles the impossible case in the Synchronous Abort vector.
*/ */
void do_bad_sync(struct pt_regs *pt_regs, unsigned int esr) void do_bad_sync(struct pt_regs *pt_regs)
{ {
efi_restore_gd(); efi_restore_gd();
printf("Bad mode in \"Synchronous Abort\" handler, esr 0x%08x\n", esr); printf("Bad mode in \"Synchronous Abort\" handler, esr 0x%08lx\n",
pt_regs->esr);
show_regs(pt_regs); show_regs(pt_regs);
show_efi_loaded_images(pt_regs); show_efi_loaded_images(pt_regs);
panic("Resetting CPU ...\n"); panic("Resetting CPU ...\n");
@ -78,10 +79,10 @@ void do_bad_sync(struct pt_regs *pt_regs, unsigned int esr)
/* /*
* do_bad_irq handles the impossible case in the Irq vector. * do_bad_irq handles the impossible case in the Irq vector.
*/ */
void do_bad_irq(struct pt_regs *pt_regs, unsigned int esr) void do_bad_irq(struct pt_regs *pt_regs)
{ {
efi_restore_gd(); efi_restore_gd();
printf("Bad mode in \"Irq\" handler, esr 0x%08x\n", esr); printf("Bad mode in \"Irq\" handler, esr 0x%08lx\n", pt_regs->esr);
show_regs(pt_regs); show_regs(pt_regs);
show_efi_loaded_images(pt_regs); show_efi_loaded_images(pt_regs);
panic("Resetting CPU ...\n"); panic("Resetting CPU ...\n");
@ -90,10 +91,10 @@ void do_bad_irq(struct pt_regs *pt_regs, unsigned int esr)
/* /*
* do_bad_fiq handles the impossible case in the Fiq vector. * do_bad_fiq handles the impossible case in the Fiq vector.
*/ */
void do_bad_fiq(struct pt_regs *pt_regs, unsigned int esr) void do_bad_fiq(struct pt_regs *pt_regs)
{ {
efi_restore_gd(); efi_restore_gd();
printf("Bad mode in \"Fiq\" handler, esr 0x%08x\n", esr); printf("Bad mode in \"Fiq\" handler, esr 0x%08lx\n", pt_regs->esr);
show_regs(pt_regs); show_regs(pt_regs);
show_efi_loaded_images(pt_regs); show_efi_loaded_images(pt_regs);
panic("Resetting CPU ...\n"); panic("Resetting CPU ...\n");
@ -102,10 +103,10 @@ void do_bad_fiq(struct pt_regs *pt_regs, unsigned int esr)
/* /*
* do_bad_error handles the impossible case in the Error vector. * do_bad_error handles the impossible case in the Error vector.
*/ */
void do_bad_error(struct pt_regs *pt_regs, unsigned int esr) void do_bad_error(struct pt_regs *pt_regs)
{ {
efi_restore_gd(); efi_restore_gd();
printf("Bad mode in \"Error\" handler, esr 0x%08x\n", esr); printf("Bad mode in \"Error\" handler, esr 0x%08lx\n", pt_regs->esr);
show_regs(pt_regs); show_regs(pt_regs);
show_efi_loaded_images(pt_regs); show_efi_loaded_images(pt_regs);
panic("Resetting CPU ...\n"); panic("Resetting CPU ...\n");
@ -114,10 +115,10 @@ void do_bad_error(struct pt_regs *pt_regs, unsigned int esr)
/* /*
* do_sync handles the Synchronous Abort exception. * do_sync handles the Synchronous Abort exception.
*/ */
void do_sync(struct pt_regs *pt_regs, unsigned int esr) void do_sync(struct pt_regs *pt_regs)
{ {
efi_restore_gd(); efi_restore_gd();
printf("\"Synchronous Abort\" handler, esr 0x%08x\n", esr); printf("\"Synchronous Abort\" handler, esr 0x%08lx\n", pt_regs->esr);
show_regs(pt_regs); show_regs(pt_regs);
show_efi_loaded_images(pt_regs); show_efi_loaded_images(pt_regs);
panic("Resetting CPU ...\n"); panic("Resetting CPU ...\n");
@ -126,10 +127,10 @@ void do_sync(struct pt_regs *pt_regs, unsigned int esr)
/* /*
* do_irq handles the Irq exception. * do_irq handles the Irq exception.
*/ */
void do_irq(struct pt_regs *pt_regs, unsigned int esr) void do_irq(struct pt_regs *pt_regs)
{ {
efi_restore_gd(); efi_restore_gd();
printf("\"Irq\" handler, esr 0x%08x\n", esr); printf("\"Irq\" handler, esr 0x%08lx\n", pt_regs->esr);
show_regs(pt_regs); show_regs(pt_regs);
show_efi_loaded_images(pt_regs); show_efi_loaded_images(pt_regs);
panic("Resetting CPU ...\n"); panic("Resetting CPU ...\n");
@ -138,10 +139,10 @@ void do_irq(struct pt_regs *pt_regs, unsigned int esr)
/* /*
* do_fiq handles the Fiq exception. * do_fiq handles the Fiq exception.
*/ */
void do_fiq(struct pt_regs *pt_regs, unsigned int esr) void do_fiq(struct pt_regs *pt_regs)
{ {
efi_restore_gd(); efi_restore_gd();
printf("\"Fiq\" handler, esr 0x%08x\n", esr); printf("\"Fiq\" handler, esr 0x%08lx\n", pt_regs->esr);
show_regs(pt_regs); show_regs(pt_regs);
show_efi_loaded_images(pt_regs); show_efi_loaded_images(pt_regs);
panic("Resetting CPU ...\n"); panic("Resetting CPU ...\n");
@ -153,10 +154,10 @@ void do_fiq(struct pt_regs *pt_regs, unsigned int esr)
* it is defined with weak attribute and can be redefined * it is defined with weak attribute and can be redefined
* in processor specific code. * in processor specific code.
*/ */
void __weak do_error(struct pt_regs *pt_regs, unsigned int esr) void __weak do_error(struct pt_regs *pt_regs)
{ {
efi_restore_gd(); efi_restore_gd();
printf("\"Error\" handler, esr 0x%08x\n", esr); printf("\"Error\" handler, esr 0x%08lx\n", pt_regs->esr);
show_regs(pt_regs); show_regs(pt_regs);
show_efi_loaded_images(pt_regs); show_efi_loaded_images(pt_regs);
panic("Resetting CPU ...\n"); panic("Resetting CPU ...\n");

4
arch/arm/mach-imx/imx8m/soc.c
View File

@ -1295,7 +1295,7 @@ void imx_tmu_arch_init(void *reg_base)
#if defined(CONFIG_IMX8MQ) || defined(CONFIG_IMX8MM) || defined(CONFIG_IMX8MN) #if defined(CONFIG_IMX8MQ) || defined(CONFIG_IMX8MM) || defined(CONFIG_IMX8MN)
bool serror_need_skip = true; bool serror_need_skip = true;
void do_error(struct pt_regs *pt_regs, unsigned int esr) void do_error(struct pt_regs *pt_regs)
{ {
/* /*
* If stack is still in ROM reserved OCRAM not switch to SPL, * If stack is still in ROM reserved OCRAM not switch to SPL,
@ -1320,7 +1320,7 @@ void do_error(struct pt_regs *pt_regs, unsigned int esr)
} }
efi_restore_gd(); efi_restore_gd();
printf("\"Error\" handler, esr 0x%08x\n", esr); printf("\"Error\" handler, esr 0x%08lx\n", pt_regs->esr);
show_regs(pt_regs); show_regs(pt_regs);
panic("Resetting CPU ...\n"); panic("Resetting CPU ...\n");
} }