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pinctrl: nuvoton: set output state before enabling the output

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The default output state may be different to request,
change the configuration sequence to avoid glitch.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
This commit is contained in:
Jim Liu 2023-05-09 15:07:34 +08:00 committed by Tom Rini
parent 703da6d707
commit f517f61ba8
3 changed files with 7 additions and 7 deletions
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6
drivers/gpio/npcm_gpio.c
View File

@ -37,14 +37,14 @@ static int npcm_gpio_direction_output(struct udevice *dev, unsigned int offset,
{ {
struct npcm_gpio_priv *priv = dev_get_priv(dev); struct npcm_gpio_priv *priv = dev_get_priv(dev);
clrbits_le32(priv->base + GPIO_IEM, BIT(offset));
writel(BIT(offset), priv->base + GPIO_OES);
if (value) if (value)
setbits_le32(priv->base + GPIO_DOUT, BIT(offset)); setbits_le32(priv->base + GPIO_DOUT, BIT(offset));
else else
clrbits_le32(priv->base + GPIO_DOUT, BIT(offset)); clrbits_le32(priv->base + GPIO_DOUT, BIT(offset));
clrbits_le32(priv->base + GPIO_IEM, BIT(offset));
writel(BIT(offset), priv->base + GPIO_OES);
return 0; return 0;
} }

4
drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
View File

@ -1552,12 +1552,12 @@ static int npcm7xx_pinconf_set(struct udevice *dev, unsigned int pin,
setbits_le32(base + NPCM7XX_GP_N_OES, BIT(gpio)); setbits_le32(base + NPCM7XX_GP_N_OES, BIT(gpio));
case PIN_CONFIG_OUTPUT: case PIN_CONFIG_OUTPUT:
dev_dbg(dev, "set pin %d output %d\n", pin, arg); dev_dbg(dev, "set pin %d output %d\n", pin, arg);
clrbits_le32(base + NPCM7XX_GP_N_IEM, BIT(gpio));
setbits_le32(base + NPCM7XX_GP_N_OES, BIT(gpio));
if (arg) if (arg)
setbits_le32(base + NPCM7XX_GP_N_DOUT, BIT(gpio)); setbits_le32(base + NPCM7XX_GP_N_DOUT, BIT(gpio));
else else
clrbits_le32(base + NPCM7XX_GP_N_DOUT, BIT(gpio)); clrbits_le32(base + NPCM7XX_GP_N_DOUT, BIT(gpio));
clrbits_le32(base + NPCM7XX_GP_N_IEM, BIT(gpio));
setbits_le32(base + NPCM7XX_GP_N_OES, BIT(gpio));
break; break;
case PIN_CONFIG_DRIVE_PUSH_PULL: case PIN_CONFIG_DRIVE_PUSH_PULL:
dev_dbg(dev, "set pin %d push pull\n", pin); dev_dbg(dev, "set pin %d push pull\n", pin);

4
drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c
View File

@ -900,12 +900,12 @@ static int npcm8xx_pinconf_set(struct udevice *dev, unsigned int selector,
setbits_le32(base + GPIO_OES, BIT(gpio)); setbits_le32(base + GPIO_OES, BIT(gpio));
case PIN_CONFIG_OUTPUT: case PIN_CONFIG_OUTPUT:
dev_dbg(dev, "set pin %d output %d\n", pin, arg); dev_dbg(dev, "set pin %d output %d\n", pin, arg);
clrbits_le32(base + GPIO_IEM, BIT(gpio));
setbits_le32(base + GPIO_OES, BIT(gpio));
if (arg) if (arg)
setbits_le32(base + GPIO_DOUT, BIT(gpio)); setbits_le32(base + GPIO_DOUT, BIT(gpio));
else else
clrbits_le32(base + GPIO_DOUT, BIT(gpio)); clrbits_le32(base + GPIO_DOUT, BIT(gpio));
clrbits_le32(base + GPIO_IEM, BIT(gpio));
setbits_le32(base + GPIO_OES, BIT(gpio));
break; break;
case PIN_CONFIG_DRIVE_PUSH_PULL: case PIN_CONFIG_DRIVE_PUSH_PULL:
dev_dbg(dev, "set pin %d push pull\n", pin); dev_dbg(dev, "set pin %d push pull\n", pin);