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ARM: socfpga: Add default FPGA bitstream fitImage for Arria10 SoCDK

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Add default fitImage file bundling FPGA bitstreams for Arria10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
This commit is contained in:
Tien Fong Chee 2019-05-07 17:42:25 +08:00 committed by Marek Vasut
parent 5c2ae96b60
commit f78b505f81
1 changed files with 38 additions and 0 deletions
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38
board/altera/arria10-socdk/fit_spl_fpga.its Normal file
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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019 Intel Corporation <www.intel.com>
*
*/
/dts-v1/;
/ {
description = "FIT image with FPGA bistream";
#address-cells = <1>;
images {
fpga-periph-1 {
description = "FPGA peripheral bitstream";
data = /incbin/("../../../ghrd_10as066n2.periph.rbf");
type = "fpga";
arch = "arm";
compression = "none";
};
fpga-core-1 {
description = "FPGA core bitstream";
data = /incbin/("../../../ghrd_10as066n2.core.rbf");
type = "fpga";
arch = "arm";
compression = "none";
};
};
configurations {
default = "config-1";
config-1 {
description = "Boot with FPGA early IO release config";
fpga = "fpga-periph-1", "fpga-core-1";
};
};
};