fpga: add option for loading FPGA secure bitstreams

It allows using this feature without enabling the "fpga loads"
command.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Co-developed-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Tested-by: Ricardo Salveti <ricardo@foundries.io>
Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com>
Link: https://lore.kernel.org/r/20220722141614.297383-2-oleksandr.suvorov@foundries.io
Signed-off-by: Michal Simek <michal.simek@amd.com>
This commit is contained in:
Oleksandr Suvorov 2022-07-22 17:16:02 +03:00 committed by Michal Simek
parent 8c09cb6f4d
commit fb2b88567d
5 changed files with 20 additions and 5 deletions

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@ -1038,8 +1038,9 @@ config CMD_FPGA_LOADP
a partial bitstream. a partial bitstream.
config CMD_FPGA_LOAD_SECURE config CMD_FPGA_LOAD_SECURE
bool "fpga loads - loads secure bitstreams (Xilinx only)" bool "fpga loads - loads secure bitstreams"
depends on CMD_FPGA depends on CMD_FPGA
select FPGA_LOAD_SECURE
help help
Enables the fpga loads command which is used to load secure Enables the fpga loads command which is used to load secure
(authenticated or encrypted or both) bitstreams on to FPGA. (authenticated or encrypted or both) bitstreams on to FPGA.

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@ -104,4 +104,18 @@ config SYS_FPGA_PROG_FEEDBACK
help help
Enable printing of hash marks during FPGA configuration. Enable printing of hash marks during FPGA configuration.
config FPGA_LOAD_SECURE
bool "Enable loading secure bitstreams"
depends on FPGA
help
Enables the fpga loads() functions that are used to load secure
(authenticated or encrypted or both) bitstreams on to FPGA.
config SPL_FPGA_LOAD_SECURE
bool "Enable loading secure bitstreams for SPL"
depends on SPL_FPGA
help
Enables the fpga loads() functions that are used to load secure
(authenticated or encrypted or both) bitstreams on to FPGA.
endmenu endmenu

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@ -220,7 +220,7 @@ int fpga_fsload(int devnum, const void *buf, size_t size,
} }
#endif #endif
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) #if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
int fpga_loads(int devnum, const void *buf, size_t size, int fpga_loads(int devnum, const void *buf, size_t size,
struct fpga_secure_info *fpga_sec_info) struct fpga_secure_info *fpga_sec_info)
{ {

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@ -172,7 +172,7 @@ int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
} }
#endif #endif
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) #if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
int xilinx_loads(xilinx_desc *desc, const void *buf, size_t bsize, int xilinx_loads(xilinx_desc *desc, const void *buf, size_t bsize,
struct fpga_secure_info *fpga_sec_info) struct fpga_secure_info *fpga_sec_info)
{ {

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@ -245,7 +245,7 @@ static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
return ret; return ret;
} }
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD) #if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
static int zynqmp_loads(xilinx_desc *desc, const void *buf, size_t bsize, static int zynqmp_loads(xilinx_desc *desc, const void *buf, size_t bsize,
struct fpga_secure_info *fpga_sec_info) struct fpga_secure_info *fpga_sec_info)
{ {
@ -306,7 +306,7 @@ static int zynqmp_pcap_info(xilinx_desc *desc)
struct xilinx_fpga_op zynqmp_op = { struct xilinx_fpga_op zynqmp_op = {
.load = zynqmp_load, .load = zynqmp_load,
#if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD) #if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
.loads = zynqmp_loads, .loads = zynqmp_loads,
#endif #endif
.info = zynqmp_pcap_info, .info = zynqmp_pcap_info,