14913 Commits

Author SHA1 Message Date
Icenowy Zheng
ab3b53f30f sunxi: add PineCube board
PineCube is an IP camera development kit released by Pine64.

It comes with the following compoents:

- A mainboard with Sochip S3 SoC, a 16MByte SPI Flash, AXP209 PMIC,
a power-only microUSB connector, a USB Type-A connector, a 10/100Mbps
Ethernet port and FPC connectors for camera and daughter board.
- An OV5640-based camera module which is connected to the parallel CSI
bus of the mainboard.
- A daughterboard with several buttons, a SD slot, some IR LEDs, a
microphone and a speaker connector.

As the device tree is synchronized in a previous commit, just add it to
Makefile, create a new MAINTAINER item and provide a defconfig.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-01-11 23:19:33 +00:00
Tom Rini
d71be19902 Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-11 13:55:03 -05:00
Christian Hewitt
ca62ed2dac ARM: dts: import Beelink GT-King/Pro DTs from Linux 5.10
Import the Beelink GT-King/Pro and supporting meson-g12b-w400.dtsi file
from Linux 5.10.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Christian Hewitt
d45dba838a ARM: dts: import WeTek Core2 DTs from Linux 5.10
Import the WeTek Core2 and supporting meson-gx-p23x-q20x.dtsi files
from Linux 5.10.

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Pascal Vizeli
d42e7964d9 meson: Add soc_rev to environment
Add SoC revision to environment. This can be useful to select the
correct device tree at runtime (N2/N2+).

Signed-off-by: Pascal Vizeli <pvizeli@syshack.ch>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Stefan Agner
cf47c0e23a ARM: meson: isolate loading of socinfo
Move loading of socinfo into a separate function so the value can be
reused later.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Jerome Brunet
ade0100a91 arm64: meson: add support for libretech-cc v2
Add support for the Amlogic based libretech cc version 2.
As version 1, it is based on the s905x SoC.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
[narmstrong: Fixed libretech-cc.rst bullet points]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Jerome Brunet
4ac6946bac arm64: dts: import libretech-cc-v2 from linux v5.10-rc1
Sync the libretech cc v2 device tree from Linux v5.10-rc1
commit 3650b228f83a ("Linux 5.10-rc1")

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Neil Armstrong
ee73135365 ARM: dts: sync Amlogic GX & AXG from Linux 5.10-rc1
Synced from Linux commit 3650b228f83a ("Linux 5.10-rc1")

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-01-11 14:59:54 +01:00
Hugh Cole-Baker
92cb207af1 rockchip: pinebook-pro: default to SPI bus 1 for SPI-flash
SPI flash on this machine is located on bus 1, default to using bus 1
for SPI flash and stop aliasing it to bus 0.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Fixes: c4cea2bb ("rockchip: Enable building a SPI ROM image on bob")
2021-01-08 08:40:43 -05:00
Nicolas Ferre
aeaef07c51 ARM: dts: sama7g5ek: fix TXC pin configuration
TXC line is directly connected from the SoC to the KSZ9131 PHY. There
is a transient state on this signal, before configuring it to RGMII,
which leads to packet transmit being blocked.
Keeping a pull-up when muxing this pin as function A (G0_TXCK) fixes
the issue.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
9b614c87bb ARM: dts: sama7g5ek: add i2c1 bus and eeproms
Add node for flx1 i2c1 subnode (and alias to bus 0)
This bus has two eeprom devices connected.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
1c629fd033 ARM: dts: at91: sama7g5: add flexcom1 and i2c subnode
Add flexcom1 and i2c subnode.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
7f4c89cc5c ARM: dts: at91: sama7g5ek: enable sdmmc0 with pinctrl
Enable sdmmc0 on this board. A non-removable eMMC is connected on this
block.
Configure pincontrol accordingly.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
523c10c1fd ARM: dts: at91: sama7g5: add node for sdmmc0
Add node for sdmmc0 block.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Eugen Hristev
9b6f157e19 ARM: dts: at91: sama7g5: add assigned clocks for sdmmc1
SDMMC1 requires clock specification with assigned-clocks, such that
the PMC will know which parent to assign and the initial start-up frequency.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:16 +02:00
Claudiu Beznea
3e5853e6a1 ARM: dts: sama7g5: add GMAC1
Add GMAC1.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
e95af87e9b ARM: dts: sama7g5: add GMAC0
Add GMAC0.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Eugen Hristev
7d41a8da84 ARM: dts: at91: sama7g5ek: add pinctrl for sdmmc1 and flx3
Add pinctrl for sdmmc1 and flx3.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:15 +02:00
Eugen Hristev
47a13af586 ARM: dts: at91: sama7g5: add pinctrl node
Add pioA pinctrl node.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
b032230f87 ARM: dts: sama7g5: add pit64b support
Add DT bindings for PIT64B driver.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
13f986b748 ARM: dts: sama7g5: add CPU bindings
Add CPU DT bindings.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
394f520709 ARM: dts: sama7g5: switch to PMC bindings
Get rid of software defined MCK and switch to PMC bindings
for IPs currently present in device tree.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
33fa0b6cef ARM: dts: sama7g5: add PMC bindings
Add DT bindings for PMC driver.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
09f19f7770 ARM: dts: sama7g5: add slow clock bindings
Add DT bindings for slow clock driver.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
072c975940 ARM: dts: sama7g5: add u-boot,dm-pre-reloc bindings for xtals
Add dm-pre-reloc DT binding property for cristals.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
5e19ade9e5 ARM: dts: sama7g5: add slow rc and main rc oscillators
Add slow rc and main rc oscillators to dtsi.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Claudiu Beznea
3b86096a59 ARM: dts: sama7g5: move clock frequencies for xtals in board file
Move clock frequencies for crystals on board specific files.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-01-07 09:44:15 +02:00
Eugen Hristev
1d463d6735 board: atmel: sama7g5ek: add initial support for sama7g5ek
Add initial support for sama7g5 evaluation kit board.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:15 +02:00
Eugen Hristev
626879b794 ARM: dts: sama7g5: add initial DT for sama7g5 SoC
Add initial basic devicetree for sama7g5 SoC

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-01-07 09:44:15 +02:00
Tom Rini
bc0b99bd8b Xilinx changes for v2021.04
arm64:
 - DT updates
 
 microblaze:
 - Add support for NOR device support
 
 spi:
 - Fix unaligned data write issue
 
 nand:
 - Minor code change
 
 xilinx:
 - Fru fix in limit calculation
 - Fill git repo link for all Xilinx boards
 
 video:
 - Add support for seps525 spi display
 
 tools:
 - Minor Vitis file support
 
 cmd/common
 - Minor code indentation fixes
 
 serial:
 - Uartlite debug uart initialization fix
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Merge tag 'xilinx-for-v2021.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2021.04

arm64:
- DT updates

microblaze:
- Add support for NOR device support

spi:
- Fix unaligned data write issue

nand:
- Minor code change

xilinx:
- Fru fix in limit calculation
- Fill git repo link for all Xilinx boards

video:
- Add support for seps525 spi display

tools:
- Minor Vitis file support

cmd/common
- Minor code indentation fixes

serial:
- Uartlite debug uart initialization fix
2021-01-06 07:57:33 -05:00
Marek Vasut
ec4efd5ae7 ARM: dts: stm32: Fix GPIO hog flags on DHCOM DRC02
The GPIO hog flags are ignored by gpiolib-of.c now, set the flags to 0.
Since GPIO_ACTIVE_HIGH is defined as 0, this change only increases the
correctness of the DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-01-06 11:01:31 +01:00
Marek Vasut
1a6de002e5 ARM: dts: stm32: Fix GPIO hog flags on DHCOM PicoITX
The GPIO hog flags are ignored by gpiolib-of.c now, set the flags to 0.
Due to a change in gpiolib-of.c, setting flags to GPIO_ACTIVE_LOW and
using output-low DT property leads to the GPIO being set high instead.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-01-06 11:01:31 +01:00
Tom Rini
b11f634b1c Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
 dtoc: Tidy up and add more tests
 ns16550 code clean-up
 x86 and sandbox minor fixes for of-platdata
 dtoc prepration for adding build-time instantiation
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Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into next

Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
dtoc: Tidy up and add more tests
ns16550 code clean-up
x86 and sandbox minor fixes for of-platdata
dtoc prepration for adding build-time instantiation
2021-01-05 22:34:43 -05:00
Tom Rini
720620e691 Prepare v2021.01-rc5
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Merge tag 'v2021.01-rc5' into next

Prepare v2021.01-rc5

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-05 16:20:26 -05:00
Simon Glass
65e25bea59 dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()
In the spirit of using the same base name for all of these related macros,
rename this to have the operation at the end. This is not widely used so
the impact is fairly small.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
20e442ab2d dm: Rename U_BOOT_DEVICE() to U_BOOT_DRVINFO()
The current macro is a misnomer since it does not declare a device
directly. Instead, it declares driver_info record which U-Boot uses at
runtime to create a device.

The distinction seems somewhat minor most of the time, but is becomes
quite confusing when we actually want to declare a device, with
of-platdata. We are left trying to distinguish between a device which
isn't actually device, and a device that is (perhaps an 'instance'?)

It seems better to rename this macro to describe what it actually is. The
macros is not widely used, since boards should use devicetree to declare
devices.

Rename it to U_BOOT_DRVINFO(), which indicates clearly that this is
declaring a new driver_info record, not a device.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Simon Glass
f10643cf8a dm: core: Access device ofnode through functions
At present ofnode is present in the device even if it is never used. With
of-platdata this field is not used, so can be removed. In preparation for
this, change the access to go through inline functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:41 -07:00
Simon Glass
0fd3d91152 dm: Use access methods for dev/uclass private data
Most drivers use these access methods but a few do not. Update them.

In some cases the access is not permitted, so mark those with a FIXME tag
for the maintainer to check.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Pratyush Yadav <p.yadav@ti.com>
2021-01-05 12:24:40 -07:00
Simon Glass
38d6b7ebda spl: Drop bd_info in the data section
This uses up space in the SPL binary but it always starts as zero. Also
some boards cannot support data in TPL (e.g. Intel Apollo Lake).

Use malloc() to allocate this structure instead, by moving the init a
little later, after malloc() is inited. Make this function optional since
it pulls in malloc().

This reduces the TPL binary size on coral by about 64 bytes

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:24:40 -07:00
Simon Glass
2d6bf754ce serial: Rename ns16550 functions to lower case
Lower case should be used for function names. Update this driver and its
callers accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05 12:24:40 -07:00
Simon Glass
d30c7209df serial: Update NS16550_t and struct NS16550
Typedefs should not be used in U-Boot and structs should be lower case.
Update the code to use struct ns16550 consistently.

Put a header guard on the file while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>

Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2021-01-05 12:24:40 -07:00
Harini Katakam
0e3a7aa7a9 arm64: zynqmp: Add Ethernet node for zcu1285 revA
This patch add ethernet node gem1 to zcu1285 RevB.
GMII to RGMII converter sits between MAC and external
phy connected over GMII to MAC and RGMMI to external phy

Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-05 11:54:53 +01:00
Siva Durga Prasad Paladugu
59fbd5c1f8 arm64: zynqmp: Add ethernet node for zcu1275 revB
This patch add ethernet node gem1 to zcu1275 RevB.
GMII to RGMII converter sits between MAC and external
phy connected over GMII to MAC and RGMMI to external phy.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-05 11:54:44 +01:00
Michal Simek
2d381d2fe2 arm64: zynqmp: Sync DT with Linux kernel
All changes are recorded in lore.kernel.org. Here are links to that patches
for the record.
Link: https://lore.kernel.org/r/f59a63d8cb941592de6d2dee8afa6f120b2e40c8.1601379794.git.michal.simek@xilinx.com
Link: https://lore.kernel.org/r/68f20a2b2bb0feee80bc3348619c2ee98aa69963.1598263539.git.michal.simek@xilinx.com
Link: https://lore.kernel.org/r/f767fe007e446a2299fda9905e75b723c650a424.1605021644.git.michal.simek@xilinx.com
Link: https://lore.kernel.org/r/cc294ae1a79ef845af6809ddb4049f0c0f5bb87a.1598259551.git.michal.simek@xilinx.com
Link: https://lore.kernel.org/r/20200629081744.13916-1-krzk@kernel.org

And there are other minor changes (just moving things around).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-01-04 10:51:27 +01:00
Sughosh Ganu
e1ee06dde7 qemu: arm: Initialise virtio devices in board_late_init
On the qemu arm platform, the virtio devices are initialised in the
board_init function, which gets called before the initr_pci. With
this sequence, the virtio block devices on the pci bus are not
initialised. Move the initialisation of the virtio devices to
board_late_init which gets called after the call to initr_pci.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2020-12-31 14:41:31 +01:00
Tom Rini
ab865a8ee5 Fixes for 2021.1
----------------
 
 CI: https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/5680
 
 - fixes for Variscite dart6ul
 - imx8mp : increase malloc area
 - fixes for bx50v3
 - imx8m: HS400ES and UHS for EVK
 - imx8qm-rom7720: fix phy bind
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Merge tag 'u-boot-imx-20201227' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Fixes for 2021.1
----------------

CI: https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/5680

- fixes for Variscite dart6ul
- imx8mp : increase malloc area
- fixes for bx50v3
- imx8m: HS400ES and UHS for EVK
- imx8qm-rom7720: fix phy bind
2020-12-28 07:44:03 -05:00
Stefan Roese
ce040932b5 arm: mvebu: armada-xp-gp.dts: Add spi0 alias
For correct spi bus detection the spi0 alias is needed in the DT.
Otherwise this error will ocurr in U-Boot:

Invalid bus 0 (err=-19)
Failed to initialize SPI flash at 0:0 (error -19)

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dennis Gilmore <dgilmore@redhat.com>
Tested-by: Dennis Gilmore <dgilmore@redhat.com>
2020-12-28 09:42:06 +01:00
Stefan Roese
33fc6fc105 arm: mvebu: Add armada-xp-gp-u-boot.dtsi for U-Boot properties
Add some missing "u-boot,dm-pre-reloc;" properties to UART0, SPI
controller and SPI NOR flash node to enable usage in SPL. Otherwise
these devices will not be available.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dennis Gilmore <dgilmore@redhat.com>
Tested-by: Dennis Gilmore <dgilmore@redhat.com>
2020-12-28 09:42:06 +01:00
Heinrich Schuchardt
e6abe163bf imx: mx7: clock: use correct format strings
Use %u and not %d for unsigned values.
Print kHz and not khz.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-12-26 14:56:09 +01:00