12 Commits

Author SHA1 Message Date
Samuel Holland
76b66aa70a pinctrl: sunxi: Add SPI0 pinmuxes
Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:59 -06:00
Samuel Holland
6ff4c32b72 pinctrl: sunxi: a64: Add the PWM pinmux
This is the only possible mux setting for the PWM peripheral.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:59 -06:00
Samuel Holland
84504cb0fc pinctrl: sunxi: Add MMC pinmuxes
Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:59 -06:00
Samuel Holland
656d6c58dc pinctrl: sunxi: Add I2C pinmuxes
Where multiple options were available, the one matching board.c and the
device trees was chosen.

Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
42559c6c73 pinctrl: sunxi: Add sun8i EMAC pinmuxes
Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
d8b645f7c6 pinctrl: sunxi: Add sunxi GMAC pinmuxes
Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
26ea1a104f pinctrl: sunxi: Add sun4i EMAC pinmuxes
Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
a5b5ff4bad pinctrl: sunxi: Add UART pinmuxes
This includes UART0 and R_UART (s_uart) on all supported platforms, plus
the additional UART configurations from arch/arm/mach-sunxi/board.c.

Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
8fb28fc535 sunxi: pinctrl: Implement pin configuration
The sunxi pinctrl hardware has bias and drive control. Add driver
support for configuring those options.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
6f4f724dea sunxi: pinctrl: Implement get_pin_muxing function
The pinmux command uses this function to display pinmux status.

Since the driver cannot map pin numbers to a list of supported
functions, only functions which are common across all pins can be
reported by name.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
6bde55b05b sunxi: pinctrl: Implement pin muxing functions
Implement the operations to get pin and function names, and to set the
mux for a pin. The pin count and pin names are calculated as if each
bank has the maximum number of pins. Function names are simply the index
into a list of { function name, mux value } pairs.

We assume all pins associated with a function use the same mux value for
that function. This is generally true within a group of pins on a single
port, but generally false when some peripheral can be muxed to multiple
ports. For example, A64 UART3 uses mux 3 on port D, and mux 2 on port H.
But all of the port D pins use the same mux value, and so do all of the
port H pins. This applies even when the pins for some function are not
contiguous, and when the lower-numbered mux values are unused. A good
example of both of these cases is SPI0 on most SoCs.

This strategy saves a lot of space (which is especially important for
SPL), but where the mux value for a certain function differs across
ports, it forces us to choose a single port for that function at build
time. Since almost all boards use the default (i.e. reference design)
pin muxes[1], this is unlikely to be a problem.

[1]: See commit dda9fa734f81 ("sunxi: Simplify MMC pinmux selection")

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
34c2a14a6e sunxi: pinctrl: Create the driver skeleton
Create a do-nothing driver for each sunxi pin controller variant.

Since only one driver can automatically bind to a DT node, since the
GPIO driver already requires a manual binding process, and since the
pinctrl driver needs access to some of the same information, refactor
the GPIO driver to be bound by the pinctrl driver. This commit should
cause no functional change.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00