20288 Commits

Author SHA1 Message Date
Samuel Holland
f901a4b2ef Merge branch 'patch/axp-gpio' into allwinner 2021-11-20 13:48:45 -06:00
Samuel Holland
f64595453e Merge branch 'patch/axp-vbus' into allwinner 2021-11-20 13:48:23 -06:00
Samuel Holland
65845c59b4 Merge branch 'patch/dm-pinctrl' into allwinner 2021-11-20 13:48:01 -06:00
Samuel Holland
712c061d0f Merge branch 'patch/sunxi-gpio' into allwinner 2021-11-20 13:47:58 -06:00
Samuel Holland
fe65e4ea08 Merge branch 'patch/rtl8211e' into allwinner 2021-11-20 13:47:56 -06:00
Samuel Holland
4a4cdec696 gpio: axp: Add pull-down support for AXP22x/AXP8xx variant
The AXP221 and newer PMICs support a pull-down function on their GPIOs.
Add support for it.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:47:06 -06:00
Samuel Holland
07be891f06 gpio: axp: Add support for getting the pin function
Implement the .get_function operation, so the gpio command can report
the current function. Since the GPIOF_FUNC (versus GPIOF_UNUSED) mux
values vary among the PMICs, report all non-GPIO mux values as UNKNOWN.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:47:06 -06:00
Samuel Holland
bcb7a7e923 gpio: axp: Select variant from compatible at runtime
There are three major variants of the AXP PMIC GPIO functionality (plus
PMICs with no GPIOs at all). Except for GPIO3 on the AXP209, which uses
a different register layout, it is straightforward to support all three
variants with a single driver. Do this, and in the process remove the
GPIO-related definitions from the PMIC-specific headers, and therefore
the dependency on AXP_PMIC_BUS.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:47:06 -06:00
Samuel Holland
c6addcc353 gpio: axp: Use DM_PMIC functions for register access
Now that the PMIC driver implements the DM_PMIC uclass, those functions
can be used instead of the platform-specific "pmic_bus" functions.

Since the driver still uses the single set of register definitions from
axpXXX.h (as selected by AXPxxx_POWER), it still depends on one of those
choices, and therefore also AXP_PMIC_BUS.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:47:06 -06:00
Samuel Holland
cb3b23f82b gpio: axp: Bind via device tree
Now that the PMIC has a DM driver and binds device tree subnodes, the
GPIO device can be bound that way, instead of from inside board code.

Since the driver still uses the single set of register definitions from
axpXXX.h (as selected by AXPxxx_POWER), it does not differentiate among
the supported compatibles.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:47:06 -06:00
Samuel Holland
b66fca56b2 gpio: axp: Consistently use the "axp_gpio" order
This is less confusing than half of the driver using "axp_gpio" and the
other half using "gpio_axp".

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:47:06 -06:00
Samuel Holland
00f5a05a78 phy: sun4i-usb: Use DM_GPIO for id/vbus_det GPIOs
Now that the sunxi_gpio driver handles pull-up/down via the driver
model, we can switch to DM_GPIO for these pins with no loss in
functionality. Since the driver now gets its pin configuration from
the device tree, we can remove the Kconfig symbols.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:47:03 -06:00
Samuel Holland
78a34aca1b gpio: axp/sunxi: Remove virtual VBUS enable GPIO
Now that this functionality is modeled using the device tree and
regulator uclass, the named GPIO is not referenced anywhere. Remove
it, along with the rest of the support for AXP virtual GPIOs.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:47:03 -06:00
Samuel Holland
ab483a495b phy: sun4i-usb: Control USB supplies via regulator uclass
The device tree binding for the PHY provides VBUS supplies as regulator
references. Now that all boards have the appropriate regulator uclass
drivers enabled, the PHY driver can switch to using them. This replaces
direct GPIO usage, which in some cases needed a special DM-incompatible
"virtual" GPIO from the PMIC.

The following boards provided a value for CONFIG_USB0_VBUS_PIN, but are
missing the "usb0_vbus-supply" property in their device tree. None of
them have the MUSB controller enabled in host or OTG mode, so they
should see no impact:
 - Ainol_AW1_defconfig / sun7i-a20-ainol-aw1
 - Ampe_A76_defconfig / sun5i-a13-ampe-a76
 - CHIP_pro_defconfig / sun5i-gr8-chip-pro
 - Cubieboard4_defconfig / sun9i-a80-cubieboard4
 - Merrii_A80_Optimus_defconfig / sun9i-a80-optimus
 - Sunchip_CX-A99_defconfig / sun9i-a80-cx-a99
 - Yones_Toptech_BD1078_defconfig / sun7i-a20-yones-toptech-bd1078
 - Yones_Toptech_BS1078_V2_defconfig /
   sun6i-a31s-yones-toptech-bs1078-v2
 - iNet_3F_defconfig / sun4i-a10-inet-3f
 - iNet_3W_defconfig / sun4i-a10-inet-3w
 - iNet_86VS_defconfig / sun5i-a13-inet-86vs
 - iNet_D978_rev2_defconfig / sun8i-a33-inet-d978-rev2
 - icnova-a20-swac_defconfig / sun7i-a20-icnova-swac
 - sun8i_a23_evb_defconfig / sun8i-a23-evb

Similarly, the following boards set CONFIG_USB1_VBUS_PIN, but do not
have "usb1_vbus-supply" in their device tree. Neither of them have USB
enabled at all, so again there should be no impact:
 - Cubieboard4_defconfig / sun9i-a80-cubieboard4 (also for USB3)
 - sun8i_a23_evb_defconfig / sun8i-a23-evb

The following boards use a different pin for USB1 VBUS between their
defconfig and their device tree. Depending on which is correct, they
may be broken:
 - Linksprite_pcDuino3_Nano_defconfig (PH11) /
   sun7i-a20-pcduino3-nano (PD2)
 - icnova-a20-swac_defconfig (PG10) / sun7i-a20-icnova-swac (PH6)

Finally, this board has conflicting pins given for its USB2 VBUS:
 - Lamobo_R1_defconfig (PH3) / sun7i-a20-lamobo-r1 (PH12)

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:47:03 -06:00
Samuel Holland
ee0d7a9696 power: pmic: axp: Probe the drivevbus regulator from the DT
Now that some regulator driver exists for this PMIC, add support for
probing regulator drivers from the device tree subnodes.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:47:03 -06:00
Samuel Holland
386f47f9f5 power: regulator: Add a driver for the AXP PMIC drivevbus
The first AXP regulator converted to use the regulator uclass is the
drivevbus switch, since it is used by the USB PHY driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:47:03 -06:00
Samuel Holland
de0ed80286 gpio: axp/sunxi: Remove virtual VBUS detection GPIO
Now that this functionality is modeled using the device tree and
regulator uclass, the named GPIO is not referenced anywhere. Remove it.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:47:03 -06:00
Samuel Holland
9468272b0c power: regulator: Add a driver for the AXP USB power supply
This driver reports the presence/absence of voltage on the PMIC's USB
VBUS pin. This information is used by the USB PHY driver. The
corresponding Linux driver uses the power supply class, which does not
exist in U-Boot. UCLASS_REGULATOR seems to be the closest match.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:47:02 -06:00
Samuel Holland
0bfe20312a spi: sun4i_spi: Remove non-DM pin setup
This is now handled automatically by the pinctrl driver.

Cover-letter:
sunxi: Add and use a pinctrl driver
This series resolves some longstanding TODOs by implementing a pinctrl
driver for sunxi platforms and converting DM drivers to use it.

I am sending this as RFC because I have only tested this on a limited
amount of hardware, and there are quite a few magic numbers involved,
so it is likely I missed something. Also, I'm not sure the how best to
split up the patches by subsystem, or if that is necessary.

This series depends on the sunxi-gpio series I just sent.
END
Series-to: sunxi
Series-to: sjg
Series-prefix: RFC
Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:59 -06:00
Samuel Holland
76b66aa70a pinctrl: sunxi: Add SPI0 pinmuxes
Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:59 -06:00
Samuel Holland
ccf31a3f4d pwm: sunxi: Remove non-DM pin setup
This is now handled automatically by the pinctrl driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:59 -06:00
Samuel Holland
6ff4c32b72 pinctrl: sunxi: a64: Add the PWM pinmux
This is the only possible mux setting for the PWM peripheral.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:59 -06:00
Samuel Holland
84504cb0fc pinctrl: sunxi: Add MMC pinmuxes
Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:59 -06:00
Samuel Holland
9bd513bb10 i2c: sun8i_rsb: Only do non-DM pin setup for non-DM I2C
When the DM_I2C driver is loaded, the pin setup is done automatically
from the device tree by the pinctrl driver.

Clean up the code in the process: remove #ifdefs and recognize that the
pin configuration is the same for all sun8i/sun50i SoCs, not just those
which select CONFIG_MACH_SUN8I.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:59 -06:00
Samuel Holland
8febe346ce i2c: sun8i_rsb: Add support for DM clocks and resets
Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:59 -06:00
Samuel Holland
78343d2c1d i2c: sun6i_p2wi: Only do non-DM pin setup for non-DM I2C
When the DM_I2C driver is loaded, the pin setup is done automatically
from the device tree by the pinctrl driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:59 -06:00
Samuel Holland
c949a02c8a i2c: sun6i_p2wi: Add support for DM clocks and resets
Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
656d6c58dc pinctrl: sunxi: Add I2C pinmuxes
Where multiple options were available, the one matching board.c and the
device trees was chosen.

Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
a5d609f6ed net: sun8i_emac: Remove non-DM pin setup
This is now handled automatically by the pinctrl driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
42559c6c73 pinctrl: sunxi: Add sun8i EMAC pinmuxes
Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
d8b645f7c6 pinctrl: sunxi: Add sunxi GMAC pinmuxes
Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
e2eaaae5b6 net: sunxi_emac: Remove non-DM pin setup
This is now handled automatically by the pinctrl driver.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
26ea1a104f pinctrl: sunxi: Add sun4i EMAC pinmuxes
Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
a5b5ff4bad pinctrl: sunxi: Add UART pinmuxes
This includes UART0 and R_UART (s_uart) on all supported platforms, plus
the additional UART configurations from arch/arm/mach-sunxi/board.c.

Pin lists and mux values were taken from the Linux drivers.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
8fb28fc535 sunxi: pinctrl: Implement pin configuration
The sunxi pinctrl hardware has bias and drive control. Add driver
support for configuring those options.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
6f4f724dea sunxi: pinctrl: Implement get_pin_muxing function
The pinmux command uses this function to display pinmux status.

Since the driver cannot map pin numbers to a list of supported
functions, only functions which are common across all pins can be
reported by name.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
6bde55b05b sunxi: pinctrl: Implement pin muxing functions
Implement the operations to get pin and function names, and to set the
mux for a pin. The pin count and pin names are calculated as if each
bank has the maximum number of pins. Function names are simply the index
into a list of { function name, mux value } pairs.

We assume all pins associated with a function use the same mux value for
that function. This is generally true within a group of pins on a single
port, but generally false when some peripheral can be muxed to multiple
ports. For example, A64 UART3 uses mux 3 on port D, and mux 2 on port H.
But all of the port D pins use the same mux value, and so do all of the
port H pins. This applies even when the pins for some function are not
contiguous, and when the lower-numbered mux values are unused. A good
example of both of these cases is SPI0 on most SoCs.

This strategy saves a lot of space (which is especially important for
SPL), but where the mux value for a certain function differs across
ports, it forces us to choose a single port for that function at build
time. Since almost all boards use the default (i.e. reference design)
pin muxes[1], this is unlikely to be a problem.

[1]: See commit dda9fa734f81 ("sunxi: Simplify MMC pinmux selection")

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
34c2a14a6e sunxi: pinctrl: Create the driver skeleton
Create a do-nothing driver for each sunxi pin controller variant.

Since only one driver can automatically bind to a DT node, since the
GPIO driver already requires a manual binding process, and since the
pinctrl driver needs access to some of the same information, refactor
the GPIO driver to be bound by the pinctrl driver. This commit should
cause no functional change.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:58 -06:00
Samuel Holland
edcd39196e remoteproc: Add a driver for the Allwinner AR100
Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:47 -06:00
Samuel Holland
755c4c6e06 mmc: sunxi: Use DM_GPIO flags to set pull-up
Now that the sunxi_gpio driver handles pull-up/down via the driver
model, pin configuration does not need a platform-specific function.

Series-to: sunxi
Cover-letter:
gpio: sunxi: Handle pin configuration flags
This series updates the sunxi GPIO driver to handle pin pull-up/down,
so consumer drivers do not need to call the non-DM sunxi_gpio_set_*
functions. As an example, the last patch updates the MMC driver to use
this functionality. The helpers added here will also be used for the
upcoming DM_PINCTRL driver.
END
Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:30 -06:00
Samuel Holland
8923963ec4 gpio: sunxi: Implement .set_flags
This, along with gpio_flags_xlate(), allows the GPIO driver to handle
pull-up/down flags provided by consumer drivers or in the device tree.

Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:30 -06:00
Samuel Holland
7a6c3156db net: phy: realtek: Set correct bit for 8211e delays
commit cb1d40151489 ("net: phy: realtek: Add tx/rx delay config for
8211e") added support for all four possible delay combinations, but set
the wrong bit in the RXID and TXID cases. This broke Ethernet on boards
using one of those settings. Fix that by fixing the bit selection.

Series-to: net
Series-cc: sunxi
Series-cc: trini

Fixes: cb1d40151489 ("net: phy: realtek: Add tx/rx delay config for 8211e")
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:27 -06:00
Samuel Holland
4aeaf34336 net: phy: realtek: Add tx/rx delay config for 8211e
Some boards need to change the tx/rx delay config in order for
gigabit Ethernet to work.

In Linux commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx
delay config"), Realtek documented the bits for overriding the delays
from the hardware straps.

Copy the logic from linux, so the delay config is set from the PHY's
interface type (the phy-mode property in the device tree).

This removes the need for a one-off workaround for the Pine A64+ board.

Series-to: net
Series-cc: sunxi
Commit-notes:
This change is needed for the Allwinner D1 Nezha board, which has
incorrect hardware straps.
END
Signed-off-by: Samuel Holland <samuel@sholland.org>
2021-11-20 13:46:27 -06:00
Tom Rini
454a97485a - pinctrl: Correct the driver GPIO declaration
- meson64_android: handle errors on boot and run fastboot on boot failure
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Merge tag 'u-boot-amlogic-20211119' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- pinctrl: Correct the driver GPIO declaration
- meson64_android: handle errors on boot and run fastboot on boot failure
2021-11-19 16:33:33 -05:00
Simon Glass
886d36efdb pinctrl: meson: Correct the driver GPIO declaration
This should use the provided U_BOOT_DRIVER() macro so that the driver gets
added to the appropriate linker list. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 7c9dcfed50f ("pinctrl: meson: rework gx pmx function")
Reported-by: Tom Rini <trini@konsulko.com>
Tested-by: Tom Rini <trini@konsulko.com> on libretech-cc
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-11-19 18:15:26 +01:00
Mathew McBride
4a08dba019 drivers: tpm: atmel_twi: fix printf specifier compile warning
%d was being used as the specifier for size_t, leading to a
compiler warning

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-17 13:47:36 +02:00
Mathew McBride
fb30d99df8 drivers: tpm: atmel_twi: implement get_desc operation
Without get_desc, the tpm command will not provide a
description of the device in 'tpm device' or 'tpm info'.

Due to the characteristics of the Atmel TPM it isn't
possible to determine certain attributes (e.g open/close
status) without using the TPM stack (compare Infineon
and ST TPM drivers), so just print out the chip model
and udevice name as the identifier.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-17 13:47:33 +02:00
Mathew McBride
fdb4a5fcd7 drivers: tpm: atmel_twi: do not use an offset byte
This driver was broken due to an empty offset byte being prepended
at the start of every transmission.

The hardware does not mimic an EEPROM device with registers so
an offset byte is not required.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-17 13:47:31 +02:00
Mathew McBride
02f50d8ebb drivers: tpm: atmel_twi: drop non-DM_I2C compatibility
There are no users of this driver without DM_I2C

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-11-17 13:47:29 +02:00
Tom Rini
2ffa0e87df Xilinx changes for v2022.01-rc3
sdhci:
 - Fix emmc mini case with missing firmware interface
 
 zynqmp:
 - Restore JTAG interface if required
 - Allow overriding board name
 - Add support for DLC21
 - Fix one fallthrought statement description
 - Use config macro instead of name duplication
 - Save multiboot to variable
 
 firmware:
 - Handle ipi_req errors better
 - Use local buffer in case user doesn't need it instead of NULL/0 location
 
 spi:
 - gqsi: Fix write issue at low frequencies
 
 net:
 - gem: Disable broadcasts
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Merge tag 'xilinx-for-v2022.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2022.01-rc3

sdhci:
- Fix emmc mini case with missing firmware interface

zynqmp:
- Restore JTAG interface if required
- Allow overriding board name
- Add support for DLC21
- Fix one fallthrought statement description
- Use config macro instead of name duplication
- Save multiboot to variable

firmware:
- Handle ipi_req errors better
- Use local buffer in case user doesn't need it instead of NULL/0 location

spi:
- gqsi: Fix write issue at low frequencies

net:
- gem: Disable broadcasts
2021-11-16 09:51:04 -05:00