25253 Commits

Author SHA1 Message Date
Nishanth Menon
0cb6515cda arm: dts: k3-am625-beagleplay: Fix Boot
Since commit [1] A53 u-boot proper is broken. This is because nodes
marked as 'bootph-pre-ram' are not available at u-boot proper before
relocation.

To fix this we mark all nodes in u-boot.dtsi as 'bootph-all'.

[1]
9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")

Reported-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
2023-10-04 14:16:01 -04:00
Roger Quadros
6d35682fb6 arm: dts: k3-am625-sk: Mark dependent nodes for pre-relocation phase
CPSW node needs PHY, MDIO, pinmux, DMA and INTC nodes.
main_conf is required for phy_gmii_sel.
Mark them as 'bootph-all' so they are available in all
pre-relocation phases.

Fixes the below dts warnings:

<stdout>: Warning (reg_format): /bus@f0000/syscon@100000/phy@4044:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1)
<stdout>: Warning (reg_format): /bus@f0000/ethernet@8000000/ethernet-ports/port@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
<stdout>: Warning (unit_address_vs_reg): /bus@f0000/syscon@100000: node has a unit name, but no reg or ranges property
<stdout>: Warning (pci_device_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
<stdout>: Warning (simple_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (avoid_default_addr_size): /bus@f0000/syscon@100000/phy@4044: Relying on default #address-cells value
<stdout>: Warning (avoid_default_addr_size): /bus@f0000/syscon@100000/phy@4044: Relying on default #size-cells value
<stdout>: Warning (avoid_default_addr_size): /bus@f0000/ethernet@8000000/ethernet-ports/port@1: Relying on default #address-cells value
<stdout>: Warning (avoid_default_addr_size): /bus@f0000/ethernet@8000000/ethernet-ports/port@1: Relying on default #size-cells value
<stdout>: Warning (avoid_unnecessary_addr_size): Failed prerequisite 'avoid_default_addr_size'
<stdout>: Warning (unique_unit_address): Failed prerequisite 'avoid_default_addr_size'

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-04 14:16:01 -04:00
Roger Quadros
7e5b6f1cff arm: dts: k3-am625-sk: Fix boot
Since commit [1] A53 u-boot proper is broken.
This is because nodes marked as 'bootph-pre-ram' are
not available at u-boot proper before relocation.

To fix this we mark all nodes in sk-u-boot.dtsi as
'bootph-all'.

[1]
9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-04 14:16:01 -04:00
Roger Quadros
2f35889298 arm: dts: k3-am642-sk: Mark dependent nodes for pre-relocation phase
CPSW node needs PHY, MDIO, pinmux, DMA and INTC nodes.
Mark them as 'bootph-all' so they are available in all
pre-relocation phases.

Fixes below dts warnings:

<stdout>: Warning (reg_format): /bus@f4000/ethernet@8000000/mdio@f00/ethernet-phy@1:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
<stdout>: Warning (unit_address_vs_reg): /bus@f4000/ethernet@8000000/mdio@f00: node has a unit name, but no reg or ranges property
<stdout>: Warning (pci_device_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
<stdout>: Warning (simple_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
<stdout>: Warning (avoid_default_addr_size): /bus@f4000/ethernet@8000000/mdio@f00/ethernet-phy@1: Relying on default #address-cells value
<stdout>: Warning (avoid_default_addr_size): /bus@f4000/ethernet@8000000/mdio@f00/ethernet-phy@1: Relying on default #size-cells value
<stdout>: Warning (avoid_unnecessary_addr_size): Failed prerequisite 'avoid_default_addr_size'
<stdout>: Warning (unique_unit_address): Failed prerequisite 'avoid_default_addr_size'
<stdout>: Warning (msi_parent_property): /bus@f4000/bus@48000000/dma-controller@485c0100:msi-parent: Could not get phandle node for (cell 0)
<stdout>: Warning (msi_parent_property): /bus@f4000/bus@48000000/dma-controller@485c0000:msi-parent: Could not get phandle node for (cell 0)
<stdout>: Warning (phys_property): /bus@f4000/ethernet@8000000/ethernet-ports/port@2:phys: Could not get phandle node for (cell 0)

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-04 14:16:01 -04:00
Roger Quadros
f3285deeca arm: dts: k3-am642-sk: Fix boot
Since commit [1] A53 u-boot proper is broken.
This is because nodes marked as 'bootph-pre-ram' are
not available at u-boot proper before relocation.

To fix this we mark all nodes in sk-u-boot.dtsi as
'bootph-all'.

Move cbass_mcu node to -r5-sk.dts as it is only required
for R5 SPL.

[1]
9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-04 14:16:01 -04:00
Roger Quadros
398bd2965c arm: dts: k3-am64-evm: Mark dependent nodes for pre-relocation phase
CPSW node needs PHY, MDIO, pinmux, DMA and INTC nodes.
USB and MMC nodes need pinmux.

Mark them as 'bootph-all' so they are available in all
pre-relocation phases.

Fixes below dts warning:

<stdout>: Warning (dmas_property): /bus@f4000/ethernet@8000000:dmas: Could not get phandle node for (cell 0)

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-04 14:16:01 -04:00
Roger Quadros
c043ba97d8 arm: dts: k3-am64-evm: Fix boot
Since commit [1] A53 u-boot proper is broken.
This is because nodes marked as 'bootph-pre-ram' are
not available at u-boot proper before relocation.

To fix this we mark all nodes in sk-u-boot.dtsi as
'bootph-all'.

Move vtt_supply and cbass_mcu node to -r5-evm.dts as
it is only required for R5 SPL.

[1]
9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-04 14:16:01 -04:00
Tom Rini
b83e285866 STM32 MCU:
_ alignment with kernel DT v6.5 for stm32f429 and stm32f746
   _ rework way of displaying ST logo for stm32f746-disco and stm32f769-disco
 
 STM32 MPU:
   _ alignment with kernel DT v6.6-rc1
   _ add RNG support for stm32mp13
   _ add USB, USB boot and stm32prog command support for stm32mp13
   _ add support of USART1 clock for stm32mp1
   _ only print RAM and board code with SPL_DISPLAY_PRINT flag for
     stm32mp1
   _ rename update_sf to dh_update_sd_to_sf and add dh_update_sd_to_emmc
     for stm32mp15xx DHCOR
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Merge tag 'u-boot-stm32-20231004' of https://source.denx.de/u-boot/custodians/u-boot-stm

STM32 MCU:
  _ alignment with kernel DT v6.5 for stm32f429 and stm32f746
  _ rework way of displaying ST logo for stm32f746-disco and stm32f769-disco

STM32 MPU:
  _ alignment with kernel DT v6.6-rc1
  _ add RNG support for stm32mp13
  _ add USB, USB boot and stm32prog command support for stm32mp13
  _ add support of USART1 clock for stm32mp1
  _ only print RAM and board code with SPL_DISPLAY_PRINT flag for
    stm32mp1
  _ rename update_sf to dh_update_sd_to_sf and add dh_update_sd_to_emmc
    for stm32mp15xx DHCOR

[ Fix merge conflict at board/st/common/stm32mp_dfu.c ]
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-04 10:49:30 -04:00
Fabrice Gasnier
46b4d6fe18 ARM: dts: stm32: force b-session-valid for otg on stm32mp135f-dk board
stm32mp135f-dk board has a type-c connector to retrieve the connection
state. For now, simply force an active peripheral mode in u-boot for
flashing.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-10-04 13:32:41 +02:00
Patrice Chotard
f959118b66 ARM: dts: stm32mp: alignment with v6.6-rc1
Device tree alignment with Linux kernel v6.6.rc1.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-10-04 13:32:41 +02:00
Gatien Chevallier
1937fdbd47 ARM: dts: stm32: add RNG node for STM32MP13x platforms
Add RNG node for STM32MP13x platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:03 +02:00
Dario Binacchi
388f872691 ARM: dts: stm32f429: put can2 in secondary mode
commit 6b443faa313c519db755ff90be32758fd9c66453 Linux upstream.

This is a preparation patch for the upcoming support to manage CAN
peripherals in single configuration.

The addition ensures backwards compatibility.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230427204540.3126234-3-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
3fd60a4f43 ARM: dts: stm32: add pin map for CAN controller on stm32f4
commit 559a6e75b4bcf0fc9e41d34865e72cf742f67d8e Linux upstream.

Add pin configurations for using CAN controller on stm32f469-disco
board. They are located on the Arduino compatible connector CN5 (CAN1)
and on the extension connector CN12 (CAN2).

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230328073328.3949796-5-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
78692e51dd ARM: dts: stm32: add CAN support on stm32f429
commit 7355ad1950f41e755e6dc451834be3b94f82acd4 Linux upstream.

Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The
chip contains two CAN peripherals, CAN1 the primary and CAN2 the secondary,
that share some of the required logic like clock and filters. This means
that the secondary CAN can't be used without the primary CAN.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230328073328.3949796-4-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
1e4d99549f ARM: dts: stm32: support display on stm32f746-disco board
The patch applies the changes from Linux commit 10a970bc3ebfa ("ARM: dts:
stm32: support display on stm32f746-disco board") and removes the same
settings from stm32f746-disco-u-boot.dtsi.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
f0c76e7731 ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco
commit e4e724099f04072053cf411456e3e9aae48c4af1 Linux upstream.

In the schematics of document UM1907, the power supply for the micro SD
card is the same 3v3 voltage that is used to power other devices on the
board. By generalizing the name of the voltage regulator, it can be
referenced by other nodes in the device tree without creating
misunderstandings.

This patch is preparatory for future developments.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
92ddff674d ARM: dts: stm32: add pin map for LTDC on stm32f7
commit ba287d1a0137702a224b1f48673d529257b3c4bf Linux upstream.

Add pin configurations for using LTDC (LCD-tft Display Controller) on
stm32f746-disco board.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Raphaël Gallais-Pou <raphael.gallais-pou@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
f479f5dbb7 ARM: dts: stm32: add ltdc support on stm32f746 MCU
The patch applies the changes from Linux commit 008ef8b3a1a00 ("Add LTDC
(Lcd-tft Display Controller) support") and removes the same settings
from stm32f746-disco-u-boot.dtsi.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
5b9e395726 ARM: dts: stm32: add touchscreen on stm32f746-disco board
commit f0215440069c4fb12958d2d321e05faa2708a11d Linux upstream.

The patch adds support for touchscreen on the stm32f746-disco board.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
f37cf077ac ARM: dts: stm32: add pin map for i2c3 controller on stm32f7
commit 0637e66f8250c61f75042131fcb7f88ead2ad436 Linux upstream.

Add pin configurations for using i2c3 controller on stm32f7.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
3175c73b04 ARM: dts: stm32: use RCC macro for CRC node on stm32f746
commit 7a5f349e592c254f3c1ac34665b6c3905576efc2 Linux upstream.

The patch replaces the number 12 with the appropriate numerical constant
already defined in the file stm32f7-rcc.h.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
a5fc0bebef ARM: dts: stm32: add CAN support on stm32f746
commit 0920ccdf41e3078a4dd2567eb905ea154bc826e6 Linux upstream.

Add support for bxcan (Basic eXtended CAN controller) to STM32F746. The
chip contains three CAN peripherals, CAN1 and CAN2 in dual peripheral
configuration and CAN3 in single peripheral configuration:
- Dual CAN peripheral configuration:
  * CAN1: Primary bxCAN for managing the communication between a secondary
    bxCAN and the 512-byte SRAM memory.
  * CAN2: Secondary bxCAN with no direct access to the SRAM memory.
  This means that the two bxCAN cells share the 512-byte SRAM memory and
  CAN2 can't be used without enabling CAN1.
- Single CAN peripheral configuration:
  * CAN3: Primary bxCAN with dedicated Memory Access Controller unit and
    512-byte SRAM memory.

 -------------------------------------------------------------------------
| features | CAN1              | CAN2               | CAN 3               |
 -------------------------------------------------------------------------
| SRAM     | 512-byte shared between CAN1 & CAN2    | 512-byte            |
 -------------------------------------------------------------------------
| Filters  | 26 filters shared between CAN1 & CAN2  | 14 filters          |
 -------------------------------------------------------------------------

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230427204540.3126234-6-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Dario Binacchi
3d82c74be7 ARM: dts: stm32: add pin map for CAN controller on stm32f7
commit 011644249686f2675e142519cd59e81e04cfc231 Linux upstream.

Add pin configurations for using CAN controller on stm32f7.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/all/20230427204540.3126234-4-dario.binacchi@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Yu Chien Peter Lin
8a0d5f2f51 riscv: andesv5: Prefer using the generic RISC-V timer driver in S-mode
The Andes PLMT driver directly accesses the mtime MMIO region,
indicating its intended use in the M-mode boot stage. However,
since U-Boot proper (S-mode) also uses the PLMT driver, we need
to specifically mark the region as readable through PMPCFGx (or
S/U-mode read-only shared data region for Smepmp) in OpenSBI.

Granting permission for this case doesn't make sense. Instead,
we should use the generic RISC-V timer driver to read the mtime
through the TIME CSR. Therefore, we add the SPL_ANDES_PLMT_TIMER
config, which ensures that the PLMT driver is linked exclusively
against M-mode U-Boot or U-Boot SPL binaries.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2023-10-04 18:23:54 +08:00
Randolph
b68bf22fbb configs: andes: add vender prefix for target name
Modify "CONFIG_TARGET_AE350" to "CONFIG_TARGET_ANDES_AE350"

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-10-04 18:00:51 +08:00
Heinrich Schuchardt
e637e455ca riscv: enable CONFIG_DEBUG_UART by default
Most boards don't enable the pre-console buffer. So we will not see any
early messages. OpenSBI 1.3 provides us with the debug console extension
that can fill this gap.

For S-Mode U-Boot enable CONFIG_DEBUG_UART by default.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-10-04 17:59:49 +08:00
Chanho Park
9bcf9e49a2 riscv: bootstage: correct bootstage_report guard
Below warning can be occurred when CONFIG_BOOTSTAGE and
!CONFIG_SPL_BOOTSTAGE. It should be guarded by using CONFIG_IS_ENABLED
for SPL build.

arch/riscv/lib/bootm.c:46:9: warning: implicit declaration of
function 'bootstage_report'
   46 |         bootstage_report();
      |         ^~~~~~~~~~~~~~~~
      |         bootstage_error

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-10-04 17:55:17 +08:00
Tom Rini
65b9b3462b Merge branch 'next_pinctrl_sync' of https://source.denx.de/u-boot/custodians/u-boot-sh
- pinctrl re-sync for Renesas chips
2023-10-02 15:19:02 -04:00
Tom Rini
ac897385bb Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-02 10:55:44 -04:00
Marek Vasut
2501fd979e ARM: dts: renesas: Synchronize RZ R8A774E1 RZ/G2H DTs with Linux 6.5.3
Synchronize RZ R8A774E1 RZ/G2H DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:29 +02:00
Marek Vasut
be06fe57a3 ARM: dts: renesas: Synchronize RZ R8A774C0 RZ/G2E DTs with Linux 6.5.3
Synchronize RZ R8A774C0 RZ/G2E DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:29 +02:00
Marek Vasut
6da842bbac ARM: dts: renesas: Synchronize RZ R8A774B1 RZ/G2N DTs with Linux 6.5.3
Synchronize RZ R8A774B1 RZ/G2N DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:29 +02:00
Marek Vasut
7177dcf773 ARM: dts: renesas: Synchronize RZ R8A774A1 RZ/G2M DTs with Linux 6.5.3
Synchronize RZ R8A774A1 RZ/G2M DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Adam Ford <aford173@gmail.com>
2023-10-01 00:08:29 +02:00
Marek Vasut
ec2faaab65 ARM: dts: renesas: Synchronize RZ R7S72100 RZ/A1 DTs with Linux 6.5.3
Synchronize RZ R7S72100 RZ/A1 DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:29 +02:00
Marek Vasut
90e6730808 ARM: dts: renesas: Synchronize R-Car R8A779G0 V4H DTs with Linux 6.5.3
Synchronize R-Car R8A779G0 V4H DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:29 +02:00
Marek Vasut
9c61a0fdc2 ARM: dts: renesas: Synchronize R-Car R8A779F0 S4 DTs with Linux 6.5.3
Synchronize R-Car R8A779F0 S4 DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:29 +02:00
Marek Vasut
61128cff1d ARM: dts: renesas: Synchronize R-Car R8A779A0 E3 DTs with Linux 6.5.3
Synchronize R-Car R8A779A0 E3 DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:29 +02:00
Marek Vasut
a9513a0ae5 ARM: dts: renesas: Synchronize R-Car R8A77995 D3 DTs with Linux 6.5.3
Synchronize R-Car R8A77995 D3 DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:29 +02:00
Marek Vasut
a7be3fb54a ARM: dts: renesas: Synchronize R-Car R8A77990 E3 DTs with Linux 6.5.3
Synchronize R-Car R8A77990 E3 DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:29 +02:00
Marek Vasut
f8c24dabda ARM: dts: renesas: Synchronize R-Car R8A77980 V3H DTs with Linux 6.5.3
Synchronize R-Car R8A77980 V3H DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:29 +02:00
Marek Vasut
14fb8dc576 ARM: dts: renesas: Synchronize R-Car R8A77970 V3M DTs with Linux 6.5.3
Synchronize R-Car R8A77970 V3M DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:29 +02:00
Marek Vasut
01e0e5e53d ARM: dts: renesas: Synchronize R-Car R8A77965 M3-N DTs with Linux 6.5.3
Synchronize R-Car R8A77965 M3-N DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:29 +02:00
Marek Vasut
d1051fde6e ARM: dts: renesas: Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ DTs with Linux 6.5.3
Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:29 +02:00
Marek Vasut
f984d3889c ARM: dts: renesas: Synchronize R-Car R8A77951 H3 DTs with Linux 6.5.3
Synchronize R-Car R8A77951 H3 DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:29 +02:00
Marek Vasut
89932045ef ARM: dts: renesas: Synchronize R-Car R8A7794 E2 DTs with Linux 6.5.3
Synchronize R-Car R8A7794 E2 DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:29 +02:00
Marek Vasut
9ef28a83fe ARM: dts: renesas: Synchronize R-Car R8A7791 M2-W and R8A7793 M2-N DTs with Linux 6.5.3
Synchronize R-Car R8A7791 M2-W and R8A7793 M2-N DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:29 +02:00
Marek Vasut
2a0070b90e ARM: dts: renesas: Synchronize R-Car R8A7790 H2 DTs with Linux 6.5.3
Synchronize R-Car R8A7790 H2 DTs with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:29 +02:00
Marek Vasut
9d59be752c ARM: dts: renesas: Add compatible properties to KSZ9031 Ethernet PHYs on Salvator-X boards
Add compatible values to Ethernet PHY subnodes representing Micrel
KSZ9031 PHYs on R-Car Gen3 Salvator-X boards. This allows software
to identify the PHY model at any time, regardless of the state of
the PHY reset line.

This is a fix for missed addition of these properties on Salvator-X
boards.

Ported from Linux kernel commit 722d55f3a9bd810f3a1a31916cc74e2915a994ce .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Jesse Taube
6ab77bb14f Convert CFG_SYS_UBOOT_START to Kconfig
Commit 65cc0e2a65d2 ("global: Move remaining CONFIG_SYS_* to CFG_SYS_*")
renamed CONFIG_SYS_UBOOT_START to CFG_SYS_UBOOT_START. Unfortunately,
this meant that the value was no longer available to the Makefile. This
caused imxrt to fail to boot. All the other boards that used this
variable were unaffected because they were using the default value
which is CONFIG_TEXT_BASE.

This commit converts CFG_SYS_UBOOT_START to Kconfig and sets the default
value to CONFIG_TEXT_BASE.

Suggested-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-30 15:24:43 -04:00
Heinrich Schuchardt
16dbe3d9d4 riscv: set fdtfile on VisionFive 2
Multiple revisions of the StarFive VisionFive 2 board exist. They can be
identified by reading their EEPROM.

Linux uses two differently named device-tree files. To load the correct
device-tree we need to set $fdtfile to the device-tree file name that
matches the board revision.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Tested-by: Milan P. Stanić <mps@arvanta.net>
2023-09-26 10:43:02 +08:00