3 Commits

Author	SHA1	Message	Date
Manorit Chawdhry	5d1aac358f	arm: dts: k3-*-r5: Remove clocks from mcu_timer0 ... Updated PLL driver sequencing requires us to use udelay in the PLL driver as there is no poll bit to get the status of operations. tick-timer(mcu_timer0/main_timer0) setting up the clocks for itself is something that won't work as the PLL driver will be using udelay and PLLs are configured during clock probe which would end up in a recursive probe. tick-timer being used by K3 devices are configured by ROM and we really don't need to configure any of the clocks. Remove the clock dependency from R5 stage as we don't need to setup clocks for it. Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>	2024-12-06 16:38:16 -06:00
Manorit Chawdhry	8659144ae5	arm: dts: k3-*-r5: Add MPU clock in clocks property ... MPU clock had been missing. Distinguish multiple clocks with clock-names and add MPU clock as well. Link: https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j721s2/clocks.html#clocks-for-a72ss0-core0-device Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com> Reviewed-by: Aniket Limaye <a-limaye@ti.com>	2024-10-21 17:52:31 -06:00
Neha Malcom Francis	69060c71dd	arm: dts: k3-j721e-r5*: Introduce k3-j721e-r5.dtsi ... Introduce k3-j721e-r5.dtsi to be used by board R5 DTS files. This helps sync SoC changes across boards. Signed-off-by: Neha Malcom Francis <n-francis@ti.com> Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>	2024-06-07 13:58:54 -06:00